TW350167B - Flip-flop circuit - Google Patents

Flip-flop circuit

Info

Publication number
TW350167B
TW350167B TW086104103A TW86104103A TW350167B TW 350167 B TW350167 B TW 350167B TW 086104103 A TW086104103 A TW 086104103A TW 86104103 A TW86104103 A TW 86104103A TW 350167 B TW350167 B TW 350167B
Authority
TW
Taiwan
Prior art keywords
latch
circuit
pair
flip
transfer gates
Prior art date
Application number
TW086104103A
Other languages
Chinese (zh)
Inventor
Kenji Kasuga
Original Assignee
Fujitsu Ltd
Fujitsu Vlsi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Fujitsu Vlsi Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of TW350167B publication Critical patent/TW350167B/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356165Bistable circuits using complementary field-effect transistors using additional transistors in the feedback circuit
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541Scan latches or cell details
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

A flip-flop circuit, having a pair of latch circuits located at a preceding stage and a succeeding state is disclosed. Each latch circuit has a pair of inverter circuits connected in a closed loop. The pair of latch circuits are connected such that one inverter circuit constituting the latch circuit at the preceding stage also serves as one inverter circuit of the latch circuit at the succeeding stage. The flip-flop also has a plurality of transfer gates that connects the pair of latch circuits. The transfer gates are selectively opened and closed in accordance with complementary clock signals. In accordance with the operations of the transfer gates, at least the latch circuit at the preceding stage alternately performs a signal input operation and a signal latch and output operation to sequentially send out output signals based on input signals.
TW086104103A 1996-06-28 1997-09-27 Flip-flop circuit TW350167B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8169463A JPH1022793A (en) 1996-06-28 1996-06-28 Flip-flop circuit

Publications (1)

Publication Number Publication Date
TW350167B true TW350167B (en) 1999-01-11

Family

ID=15887044

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086104103A TW350167B (en) 1996-06-28 1997-09-27 Flip-flop circuit

Country Status (3)

Country Link
JP (1) JPH1022793A (en)
KR (1) KR100251469B1 (en)
TW (1) TW350167B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100604852B1 (en) 2004-05-15 2006-07-31 삼성전자주식회사 A control signal generator, a latch circuit for performing a scan function, and a flip-flop having the pulse generator and the latch
JP5889818B2 (en) * 2013-02-28 2016-03-22 株式会社東芝 Semiconductor integrated circuit device

Also Published As

Publication number Publication date
KR980006846A (en) 1998-03-30
KR100251469B1 (en) 2000-04-15
JPH1022793A (en) 1998-01-23

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees