TW350167B - Flip-flop circuit - Google Patents
Flip-flop circuitInfo
- Publication number
- TW350167B TW350167B TW086104103A TW86104103A TW350167B TW 350167 B TW350167 B TW 350167B TW 086104103 A TW086104103 A TW 086104103A TW 86104103 A TW86104103 A TW 86104103A TW 350167 B TW350167 B TW 350167B
- Authority
- TW
- Taiwan
- Prior art keywords
- latch
- circuit
- pair
- flip
- transfer gates
- Prior art date
Links
- 230000000295 complement effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356165—Bistable circuits using complementary field-effect transistors using additional transistors in the feedback circuit
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318541—Scan latches or cell details
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Manipulation Of Pulses (AREA)
Abstract
A flip-flop circuit, having a pair of latch circuits located at a preceding stage and a succeeding state is disclosed. Each latch circuit has a pair of inverter circuits connected in a closed loop. The pair of latch circuits are connected such that one inverter circuit constituting the latch circuit at the preceding stage also serves as one inverter circuit of the latch circuit at the succeeding stage. The flip-flop also has a plurality of transfer gates that connects the pair of latch circuits. The transfer gates are selectively opened and closed in accordance with complementary clock signals. In accordance with the operations of the transfer gates, at least the latch circuit at the preceding stage alternately performs a signal input operation and a signal latch and output operation to sequentially send out output signals based on input signals.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8169463A JPH1022793A (en) | 1996-06-28 | 1996-06-28 | Flip-flop circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW350167B true TW350167B (en) | 1999-01-11 |
Family
ID=15887044
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW086104103A TW350167B (en) | 1996-06-28 | 1997-09-27 | Flip-flop circuit |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH1022793A (en) |
| KR (1) | KR100251469B1 (en) |
| TW (1) | TW350167B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100604852B1 (en) | 2004-05-15 | 2006-07-31 | 삼성전자주식회사 | A control signal generator, a latch circuit for performing a scan function, and a flip-flop having the pulse generator and the latch |
| JP5889818B2 (en) * | 2013-02-28 | 2016-03-22 | 株式会社東芝 | Semiconductor integrated circuit device |
-
1996
- 1996-06-28 JP JP8169463A patent/JPH1022793A/en active Pending
-
1997
- 1997-06-04 KR KR1019970023095A patent/KR100251469B1/en not_active Expired - Fee Related
- 1997-09-27 TW TW086104103A patent/TW350167B/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR980006846A (en) | 1998-03-30 |
| KR100251469B1 (en) | 2000-04-15 |
| JPH1022793A (en) | 1998-01-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |