TW367604B - Barrier-less semiconductor plug structure - Google Patents

Barrier-less semiconductor plug structure

Info

Publication number
TW367604B
TW367604B TW085111767A TW85111767A TW367604B TW 367604 B TW367604 B TW 367604B TW 085111767 A TW085111767 A TW 085111767A TW 85111767 A TW85111767 A TW 85111767A TW 367604 B TW367604 B TW 367604B
Authority
TW
Taiwan
Prior art keywords
metal
passage
conductor layer
conductor
barrier
Prior art date
Application number
TW085111767A
Other languages
English (en)
Inventor
Qi-Zhong Hong
Wei-Yung Hsu
Shi-Puu Jeng
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW367604B publication Critical patent/TW367604B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/045—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
TW085111767A 1995-05-31 1996-09-26 Barrier-less semiconductor plug structure TW367604B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45543795A 1995-05-31 1995-05-31
US45517295A 1995-05-31 1995-05-31

Publications (1)

Publication Number Publication Date
TW367604B true TW367604B (en) 1999-08-21

Family

ID=27037752

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111767A TW367604B (en) 1995-05-31 1996-09-26 Barrier-less semiconductor plug structure

Country Status (4)

Country Link
EP (1) EP0746026A3 (zh)
JP (1) JPH08330429A (zh)
KR (1) KR100424835B1 (zh)
TW (1) TW367604B (zh)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2921773B2 (ja) * 1991-04-05 1999-07-19 三菱電機株式会社 半導体装置の配線接続構造およびその製造方法
JP3139781B2 (ja) * 1991-08-07 2001-03-05 沖電気工業株式会社 半導体装置およびその製造方法
KR940008323B1 (ko) * 1991-10-16 1994-09-12 삼성전자 주식회사 반도체장치의 층간접속방법
US5360995A (en) * 1993-09-14 1994-11-01 Texas Instruments Incorporated Buffered capped interconnect for a semiconductor device
US5420072A (en) * 1994-02-04 1995-05-30 Motorola, Inc. Method for forming a conductive interconnect in an integrated circuit

Also Published As

Publication number Publication date
JPH08330429A (ja) 1996-12-13
EP0746026A2 (en) 1996-12-04
EP0746026A3 (en) 1997-01-15
KR100424835B1 (ko) 2004-06-26
KR960043125A (ko) 1996-12-23

Similar Documents

Publication Publication Date Title
CN1096117C (zh) 半导体器件的互连线及其制造方法
KR970072102A (ko) 반도체장치 및 그 제조방법
TWI268573B (en) Semiconductor device and method for fabricating the same
KR960008558B1 (en) Low resistance contact structure and manufacturing method of high integrated semiconductor device
CA2162189A1 (en) Insulator for integrated circuits and process
EP0343667A3 (en) Contact structure for connecting electrode to a semiconductor device and a method of forming the same
EP0387098A3 (en) Process for making a multilevel interconnection structure
TW429599B (en) Method for forming inductors on the semiconductor substrate
TW359883B (en) Method for forming a multilayered wiring for a semiconductor device
GB2364170B (en) Dual damascene bond pad structure for lowering stress and allowing circuitry under pads and a process to form the same
GB2349505B (en) Method of fabricating a semiconductor device
TW367604B (en) Barrier-less semiconductor plug structure
IT1251005B (it) Struttura di interconnessione in un dispositivo a semiconduttore e relativo metodo
TW346658B (en) Method for manufacturing capacitor for semiconductor device
TW374230B (en) Method of forming multilevel-interconnection for a semiconductor device
TW372359B (en) Manufacturing process for borderless vias with respect to underlying metal
KR960039154A (ko) 반도체장치의 제조방법
EP0134692A3 (en) Multilayer semiconductor devices with embedded conductor structure
EP0228183A3 (en) Method for manufacturing semiconductor device
JPH0465129A (ja) 半導体素子のコンタクト構造
KR970018396A (ko) 다층배선의 형성 방법
TW370716B (en) Structure and method for manufacturing interconnects
TW356606B (en) Inductor for semiconductor device and method of making the same
KR100396684B1 (ko) 반도체장치의금속배선형성방법
JPS57202757A (en) Semiconductor device and manufacture thereof

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees