TW396504B - Reduction of black silicon in semiconductor fabrication - Google Patents

Reduction of black silicon in semiconductor fabrication Download PDF

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Publication number
TW396504B
TW396504B TW087117798A TW87117798A TW396504B TW 396504 B TW396504 B TW 396504B TW 087117798 A TW087117798 A TW 087117798A TW 87117798 A TW87117798 A TW 87117798A TW 396504 B TW396504 B TW 396504B
Authority
TW
Taiwan
Prior art keywords
wafer
layer
silicon
pad
stack
Prior art date
Application number
TW087117798A
Other languages
English (en)
Chinese (zh)
Inventor
Dung-Ching Perng
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW396504B publication Critical patent/TW396504B/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68Organic materials, e.g. photoresists
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6322Formation by thermal treatments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6518Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer
    • H10P14/6524Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer the substance being nitrogen
    • H10P14/6526Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer the substance being nitrogen introduced into an oxide material, e.g. changing SiO to SiON
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/694Inorganic materials composed of nitrides
    • H10P14/6943Inorganic materials composed of nitrides containing silicon
    • H10P14/69433Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/69Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/405Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Drying Of Semiconductors (AREA)
TW087117798A 1997-12-29 1998-10-27 Reduction of black silicon in semiconductor fabrication TW396504B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/998,858 US6033997A (en) 1997-12-29 1997-12-29 Reduction of black silicon in semiconductor fabrication

Publications (1)

Publication Number Publication Date
TW396504B true TW396504B (en) 2000-07-01

Family

ID=25545626

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087117798A TW396504B (en) 1997-12-29 1998-10-27 Reduction of black silicon in semiconductor fabrication

Country Status (6)

Country Link
US (1) US6033997A (2)
EP (1) EP0928018A3 (2)
JP (1) JPH11260808A (2)
KR (1) KR100562213B1 (2)
CN (1) CN1147924C (2)
TW (1) TW396504B (2)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6190955B1 (en) * 1998-01-27 2001-02-20 International Business Machines Corporation Fabrication of trench capacitors using disposable hard mask
DE19803186C1 (de) * 1998-01-28 1999-06-17 Bosch Gmbh Robert Verfahren zur Herstellung strukturierter Wafer
DE19944012B4 (de) 1999-09-14 2007-07-19 Infineon Technologies Ag Grabenkondensator mit Kondensatorelektroden und entsprechendes Herstellungsverfahren
US6482749B1 (en) * 2000-08-10 2002-11-19 Seh America, Inc. Method for etching a wafer edge using a potassium-based chemical oxidizer in the presence of hydrofluoric acid
US6821900B2 (en) 2001-01-09 2004-11-23 Infineon Technologies Ag Method for dry etching deep trenches in a substrate
TW488017B (en) * 2001-04-20 2002-05-21 Nanya Technology Corp Semiconductor manufacture method of black silicon removal
US6806200B2 (en) * 2002-11-08 2004-10-19 International Business Machines Corporation Method of improving etch uniformity in deep silicon etching
US6927172B2 (en) * 2003-02-24 2005-08-09 International Business Machines Corporation Process to suppress lithography at a wafer edge
US20050014364A1 (en) * 2003-07-18 2005-01-20 Infineon Technologies North America Corp. Method of suppressing the effect of shining spots present at the edge of a wafer
DE102004012280B4 (de) 2004-03-12 2005-12-29 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleiterstruktur
DE102004017747A1 (de) * 2004-04-06 2006-01-05 Infineon Technologies Ag Verfahren zur Herstellung von Halbleiterbauelementen und ein strukturiertes Substrat
US7226869B2 (en) * 2004-10-29 2007-06-05 Lam Research Corporation Methods for protecting silicon or silicon carbide electrode surfaces from morphological modification during plasma etch processing
US7291286B2 (en) * 2004-12-23 2007-11-06 Lam Research Corporation Methods for removing black silicon and black silicon carbide from surfaces of silicon and silicon carbide electrodes for plasma processing apparatuses
US20060261436A1 (en) * 2005-05-19 2006-11-23 Freescale Semiconductor, Inc. Electronic device including a trench field isolation region and a process for forming the same
US7491622B2 (en) * 2006-04-24 2009-02-17 Freescale Semiconductor, Inc. Process of forming an electronic device including a layer formed using an inductively coupled plasma
US20070249127A1 (en) * 2006-04-24 2007-10-25 Freescale Semiconductor, Inc. Electronic device including a semiconductor layer and a sidewall spacer and a process of forming the same
US7670895B2 (en) 2006-04-24 2010-03-02 Freescale Semiconductor, Inc Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer
US7528078B2 (en) 2006-05-12 2009-05-05 Freescale Semiconductor, Inc. Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer
US20080289651A1 (en) * 2007-05-25 2008-11-27 International Business Machines Corporation Method and apparatus for wafer edge cleaning

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214526A (ja) * 1985-03-20 1986-09-24 Toshiba Corp 半導体装置の製造方法
JP2645478B2 (ja) * 1988-10-07 1997-08-25 富士通株式会社 半導体装置の製造方法
US5072266A (en) * 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
US5256594A (en) * 1989-06-16 1993-10-26 Intel Corporation Masking technique for depositing gallium arsenide on silicon
FR2672731A1 (fr) * 1991-02-07 1992-08-14 France Telecom Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant.
JPH07115083A (ja) * 1993-10-14 1995-05-02 Sony Corp シリコン酸化膜に対するエッチング方法

Also Published As

Publication number Publication date
CN1221977A (zh) 1999-07-07
KR19990063530A (ko) 1999-07-26
EP0928018A3 (en) 2000-06-14
CN1147924C (zh) 2004-04-28
KR100562213B1 (ko) 2006-05-25
EP0928018A2 (en) 1999-07-07
US6033997A (en) 2000-03-07
JPH11260808A (ja) 1999-09-24

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