TWI302811B - Method for fabricating conductive blind via of circuit substrate - Google Patents

Method for fabricating conductive blind via of circuit substrate Download PDF

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Publication number
TWI302811B
TWI302811B TW095101551A TW95101551A TWI302811B TW I302811 B TWI302811 B TW I302811B TW 095101551 A TW095101551 A TW 095101551A TW 95101551 A TW95101551 A TW 95101551A TW I302811 B TWI302811 B TW I302811B
Authority
TW
Taiwan
Prior art keywords
layer
conductive
circuit substrate
hole
copper
Prior art date
Application number
TW095101551A
Other languages
English (en)
Other versions
TW200730047A (en
Inventor
Te Chun Wang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW095101551A priority Critical patent/TWI302811B/zh
Priority to US11/642,660 priority patent/US7698813B2/en
Publication of TW200730047A publication Critical patent/TW200730047A/zh
Application granted granted Critical
Publication of TWI302811B publication Critical patent/TWI302811B/zh

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/421Blind plated via connections
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1603Process or apparatus coating on selected surface areas
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1653Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1689After-treatment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/38Coating with copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34Pretreatment of metallic surfaces to be electroplated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0353Making conductive layer thin, e.g. by etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0361Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49156Manufacturing circuit on or in base with selective destruction of conductive paths
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49163Manufacturing circuit on or in base with sintering of base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

1302811 、ASEK1675 18923twf.doc/e 九、發明說明: 【發明所屬之技術領域】 本發明是有關於—種線. 作方法,且特別是有關於路基板(c職11substrate)的製 (conductive blind via)的製作方』重線路基板之導電盲孔 【先前技術】 circuit (卿議d咖 電==是 安㈣賴· θ々線層U以保護並隔離各圖 木化線路層,且各_化線路 接此外,線路基板的表多二 壯枯卞外界電子元件電性連接。在目前的半導體封 衣技射,由於線路基板具有佈線細密以及性能良好等優 點’故線路基板已成為晶片構裝之主流。 圖1、%不為習知之一種線路基板的示意圖。請參考圖 1,習知之線路基板100是由一核心層(c〇rela㈣11〇、一 圖案化線路層120、一介電層130以及至少-導電盲孔140 =構成。其中’圖案化線路層120設置於核心層110與介 包層130之間,且具有至少一材質為銅之捕捉塾(〇叩士紙 pad)122而導電盲孔mo貫穿介電層且與捕捉墊Η] 相接觸。 、在傳統的線路基板100中,其導電盲孔14〇之製作方 式疋先利用雷射鑽孔(laser drilling)的方式貫穿介電層 值得一提的是,在上述之線路基板中
1302811 、ASEK1675 18923twf.doc/e 以形成一盲孔142,此盲孔142暴露出捕捉墊122。接著, 利用無電鍍的方式,於盲孔142之内壁以及捕捉墊122上 形成厚度較薄之一無電鍍銅層144(由次微米級之銅粒子 組成)。之後,利用電鍍的方式於無電鍍銅層144上形成一 電鍍銅層146,而此電鍍銅層146是填滿整個盲孔142。如 此,即完成導電盲孔140的製作。 墊、無電鍍銅層以及電鍍銅層之材質均為銅,但以微結構 的角度而言,三者皆具有不同的結構型態。其中,無電鍍 銅層(或稱化銅)是由次微米級的銅粒子所組成,其結構強 度較弱。因此,線路基板在使用狀態下所產生之熱膨脹會 導致無電鍍銅層與捕捉墊接觸之部分易受到埶應^ (th_al stress)之破壞而產生剝離。而上述之剝離現象會 造成導電盲孔和圖案化線路層間接觸 :=圖案化線路層電性連接,進而降 、、、口 構可罪度(reliability)。 【發明内容】 作方的是提供—轉路基板之導電盲孔的製 作万去以棱升線路基板之可靠度。 ,達上述或是其他目的,本發明 導電盲孔的製作方法,其包括下列步驟基板^ 路基板,此線路基板包括—第_介電層、安提供一^ 以及-第二介電層。其中,圖案^圖木化線路層 層與第二介電層g夾置於第一介電 層之間且0案化線路層中包括至少一捕捉 1302811 、 ASEK1675 18923twf.doc/e 塾。之後’於第二介電層中形成—暴露出捕捉墊之盲孔。 接著,進行-無電_製程,以於盲孔之—内壁以及捕捉 塾上形成-無電_層。接著’移除位於她墊上之無電 鑛銅層。最後,填人-導電材料於盲孔中,以形成一導電 盲孔。 ,本發明之-實施财,在移除無電軸層之步驟 中’是部份移除無電鐘銅層,以維持盲孔内壁 之電性連接。 孔 在本發明之一實施例中,第一介電層為-核心声。 在本發明之-實施例中,形成盲孔之方式為微^械鑽 孔 孔 在本發明之一實施例中,形成盲孔之方式為雷 在本發明之一實施例中,形成盲孔之方式為 射燒 電漿姓 在本發明之一實施例中,將導電材料埴入亡 為電鍍。 目孔之方式 在本發明之一實施例中,導電材料為銅。 在本發明之一實施例中,移除無電鍍銅声 射燒孔。 S 式為雷 本舍明再&出一種線路基板之導電盲孔、♦ 法,其與上述線路基板之導電盲孔的製作方^的製作方 要差異在於:在ΐ孔之内壁以及捕捉墊上形成 之後’本發明會預纽無電賴層上形成 ^安鍵銅層 力乂硐層,接著再 7 1302811 、ASEK1675 18923twf.doc/e 、 祕位於雛墊上之無電鍍銅層及銅層。最後,再將導電 材料填入於盲孔中,以形成導電盲孔。 在本毛月之貝施例中,在移除無電鍍銅層及銅層之 步驟中’疋私除部份的無電鍍銅層及銅層,以維持盲孔之 内壁與捕捉墊間之電性連接。 ‘ 在本發明之—實施财,形成銅層之方式為電艘。 ‘、纟紅所述,本發明㈣由雷射纽等方式移除掉位於 ⑩捕捉墊上之結構強度較低的無電翻層,使填人於盲孔中 的導電材料可直接與捕捉墊連接,以增加二者間之接合強 度,進而提升整個線路基板之可靠度。 一為瓖本發明之上述和其他目的、特徵和優點能更明顯 易憧,下文特舉較佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 圖2A至圖2E繪示為根據本發明之較佳實施例的一種 線路基板之導電盲孔的製作流程剖面圖。此線路基板之導 • 電盲孔的製作方法如下所述:首先,如圖2A所示,提供 • 一線路基板2〇〇,線路基板200包括一第一介電層21〇、一 • 圖案化線路層220以及一第二介電層23〇,其中曰圖案化線 路層22〇夾置於第一介電層210與第二介電層230之間, 而上述之第一介電層21〇可為一核心層。此外,本實施例 之圖案化線路層220中包括一個或多個捕捉墊222(圖2A 中僅、%示其中一捕捉墊222以作說明),而捕捉墊222的材 質例如是鋼。在一實施例中,第二介電層230上可配置有 8 1302811 ' ASEK1675 18923twf.doc/e 一線路金屬層202,人p p 士 所f作之‘、中線路i屬層2G2可藉由後續步驟 目孔〇(請參考圖2E)來與圖案化線路層 由亡接。接著,如圖2B所示,於第二介電層230 ^亡目孔242 ’其中盲孔242暴露出捕捉墊222。而形 π242白勺方式可為微機械鑽孔、雷射燒孔或電漿餘 叮兹在罘二介電層230中形成一盲孔242前, 孔等方式移除盲孔242上方之線路金屬層 ^ 如圖2C所示,進行一無電鍍銅製程,以於 2目44,豆及捕捉塾222上形成—無電鍵銅層 l + ^啦又二岌程例如是將線路基板200浸於具有銅 離子之溶液中,使盲# 無電鍍銅層244。 之内壁以及捕捉墊222上形成 购ί著/· Τι 2D所示’移除位於捕捉墊222上之無電 222^ Γ驟可利用雷射燒孔等方式移除掉位於 與捕捉墊奶間仍^寺皮電除’使得盲孔242之内壁 所示,填人_導電材 f生連接之關係。之後,如圖2E 二;,其中= 材2;:於盲孔242中,以形成-導電 上具有無電鍍銅層244 Ht鋼。由於盲孔242之内壁 來將導電材料246填入盲^本貫施例可以利用電鑛方式 在此步驟中,是_電=^中,⑽成導電盲孔·。 搬中,“,本發明材料細填入盲孔 的方式不作任何限制。 ¥電材枓246填入盲孔2们 1302811 .ASEK1675 18923twf.doc/e 值得注意的是,為強化導電盲孔,與捕捉塾瓜間 之連接關係’以防正線路基板2〇〇在使用狀態下所產生之 熱應力破壞導電盲孔240與捕捉墊222間之接合,本實施 例移除位於捕捉墊222上之結構強度較低的無電鑛銅層 244 ’使後續填入盲孔242中結構強度較佳之導電材料撕 直接與捕捉塾222接合。如此一來,導電盲孔24〇與捕捉 墊222間即有良好的連接關係,使得導電盲孔240與捕捉 墊222間之接5不易文到熱應力的破壞,影響線路基板細 之正常運作。換言之’她於習知之線路基板_請來考 圖1),本實施例之線路基板具有較佳之結構可靠度。 此外’圖2A至圖2E所綠示之線路基板之導電盲孔的 i作方法並非本發明唯-的實施方式,下謂針對本發明 之其他實施方式做說明,並且為了方便說明,下文之^ 將以相同之標號來標示相同之元件。 ^ 為防止無電鍍銅層244與空氣接觸而發生梟 電盲孔的製作過程,本發明另提出-種線: 基板之—電目孔的製作方法,以克服上述問題。圖3α至 為根據本發明之一較佳實施例的另-種線路基 板之¥電目孔的製作流程剖面圖。其中圖3A至圖3C所怜 不之導電盲孔的製作方法與上述實施例中之圖2a ^ 所緣示之導電盲孔的製作方法相同,所以,在此不再^ 本声施例在此將針對圖3D至圖3F所繪 、 作方法做詳細綱。 目孔的製 請參考® 3D,在完成目3A至圖3C所示之盲孔如 1302811 ' ASEK1675 18923twf.doc/e 及無電鍍銅層244的製作後,於無電鍍銅層244上形成一 銅層248,以防止無電鍍銅層244與空氣接觸而發生氧化, 而影響到後續之導電盲孔的製作過程。其中,銅層248例 如是以電鍍的方式形成於無電鍍銅層244上。接著,如圖 3E所示,移除掉位於捕捉墊222上之無電鍍銅層244及銅 - 層248。在移除無電鍍銅層244及銅層248之步驟中,可 • 移除掉部分的無電鍍銅層244及銅層248,以維持盲孔242 | 内壁與捕捉墊222間之電性連接,而移除無電鑛銅層244 及銅層248之方式可為雷射燒孔。最後,請參考圖,利 用電鍍或是其他方式將導電材料246填入於盲孔242中, 以形成導電盲孔240,。 在此實施例中,是藉由形成於無電鍍銅層244上之銅 層248,以防止無電鍍銅層244與空氣接觸而發生氧化的 情形’進而使得導電材料246可順利地填入盲孔犯中。 綜上所述,本發明是利用雷射燒孔或是其他方式移除 丨掉位於捕捉墊上之結構強度較低的無電鍍銅層,使後續填 入盲孔中之導電材料直接與捕捉墊接合,如此,可增加導 電材料與捕捉墊之間的接合強度,進而提升整個線ς基板 之可靠度。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發 和範圍内,當可作些許之更動與潤都,因此本發 乾圍當視後附之申請專利範圍所界定者為準。 …隻 【圖式簡單說明】 11 1302811 ASEKl 675 18923twf.doc/e 圖1繪示為習知之一種線路基板的示意圖。 圖2A至圖2E繪示為本發明之較佳實施例的一種線路 基板之導電盲孔的製作流程剖面圖。 圖3A至圖3F繪示為本發明之一較佳實施例的另一種 線路基板之導電盲孔的製作流程剖面圖。 【主要元件符號說明】 100 :線路基板 110 :核心層 120 :圖案化線路層 122 :捕捉墊 130 :介電層 140 :導電盲孔 145 ··盲孔 144 :無電鍍銅層 146 :導電材料 200 :線路基板 202 :線路金屬層 210 :第一介電層 220 :圖案化線路層 222 :捕捉墊 230 :介電層 240、240’ :導電盲孔 242 :盲孔 244 ··無電鍍銅層 246 ··導電材料 248 :銅層 12

Claims (1)

1302811 ' ASEK1675 18923twf.doc/e 、申請專利範圍: 驟: 1一種線路基板之導電盲孔的製作方法,包括下列步 提供一線路基板,該線路基板包括一第一介電層、一 ^二化線路層以及—第二介電層,該圖案化線路層夹置於 ==第二介電層之間’且該圖案化線路層中 捕捉二介電層中形成_盲孔,其中該盲孔暴露出該 墊上形成-無⑽奸孔之—内壁及該捕捉 移除位於該捕捉墊上之該無電鐘銅層;以及 :真入-導電材料於該盲孔中,以形成一導電盲孔。 的制料利範㈣1項所述之線路基板之導電盲孔 3 = ί^!·之該内壁與簡捉_之電性連接。 峨導電盲孔 的製作方法:其盲孔 13 1302811 • ASEK1675 18923twfdoc/e ,7·如申請專利制第i項所述之線路基板之導電盲孔 的製作方法,其中填人該導電材料之方式包括電錢。 8·如申請專利範圍第i項所述之線路基板之導電盲孔 的製作方法,其中該導電材料為銅。 9·如申明專飾圍第1項所述之線路基板之導電盲孔 的製作方法,其巾移除該無紐銅層之方式包括雷射燒孔。 • 10·-種線路基板之導電盲孔的製作方法,包括下列步 驟· 提供一線路基板,該線路基板包括一第一 、_ 及一第二介電層’該圖案化線路層“於 二介電層之間,且該圖案一 該捕=第二介電層中形成一盲孔,其中,該盲孔暴露出 進行-無電錢銅製程,以於該 墊上形成-無電錢銅層; π 土及捉 於該無電鍍銅層上形成一銅層; 填墊上之該無電鍍銅層及該銅層;以及 n V電材料於該盲孔中,以形成一導電盲孔。 11·如申請專利範圍第所 、 孔的製作方 、斤述之線路基板之導電盲 中,係為部二,二除該無f軸層及該銅層之步驟 之電性連接Γ夕于、’以維持该盲孔之該内壁與該捕捉塾間 u.如申請專利範圍第10項所述之線路基板之導電盲 14 I3028JU 675 18923twf.doc/e =的製作方法,其中移除該無電鍍_之方式包括雷射燒 13.如申請專利範圍第1G項所述之線路 孔的製作方法,其中該第一介電層為-核心層。 孔m去,其中形成該盲孔之方式為微機械鑽孔。 _作==圍第ig項所述之線路基板之導電盲 形成該盲孔之方式為雷射燒孔。 孔的制#*、、Γ利乾㈣1G項所述之祕基板之導電盲 、Γ7 Μ ’其中形成該盲孔之方式為電賴孔。 ㈣mrr範㈣1G销叙線絲板之導電盲 /it形成該鋼層之方式包括電鍍。 ㈣m專利制第ig項所述之線路基板之導電盲 n由中填入該導電材料之方式包括電鍍。 ㈣專纖圍f ig項所述之線路基板之導電盲 孔的製作方法,其中該導電材料為銅。 15
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