US3641561A - Display system for use in desk top computers - Google Patents

Display system for use in desk top computers Download PDF

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Publication number
US3641561A
US3641561A US798407A US3641561DA US3641561A US 3641561 A US3641561 A US 3641561A US 798407 A US798407 A US 798407A US 3641561D A US3641561D A US 3641561DA US 3641561 A US3641561 A US 3641561A
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US
United States
Prior art keywords
register
tubes
counter
output
character
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US798407A
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English (en)
Inventor
Kinichiro Osugi
Yoshiaki Suzuki
Tokio Mori
Toshiharu Inamoto
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Publication date
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials

Definitions

  • ABSTRACT A display system for use in a serial-type desk top computer having a recirculating shift register and a plurality of coldcathode gas readout tubes adapted to indicate information stored in the register sequentially.
  • the system includes in combination a clock pulse generator operating the register, incremental and decremental counters connected to receive the output of the pulse generator, a coincidence circuit receiving the outputs of the register and both counters at its input side and providing a signal to light a corresponding one of the tubesso that the information may be displayed on the tubes from the most significant character to the least significant character successively for a display period of time sufficiently [56] R'eferm cued long to be visually recognized for each character being dis- UNITED STATES PATENTS P y h 3,324,458 6/1967 MacArthur together?40/324 A 4 Claims, 7 Di Figures REG/5 TER 6/. 06K f5? PULSE GENERATOR mun/rm.
  • the present invention relates to a display system for use in a serial-type desk top computer, and more particularly to an improvement in display systems for displaying information stored in a recirculating shift register.
  • one object of the present invention is to provide an improved display system for use in a desk top computer, which system is capable of controlling the display of information registered in a shift register with ease.
  • Another object of the present invention is to provide an improved display system which is capable of displaying the contents of the register from the most significant character position to the least significant character position successively.
  • FIG. I is a diagram showing a conventional recirculating register
  • FIG. 2 is a schematic diagram illustrating a display system according to an embodiment of the present invention.
  • FIGS. 3a to 3e are diagrams showing outputs of the blocks shown in FIGS. 2, respectively.
  • Numeral 51 designates a recirculating shift register having five character positions, i.e.,L, 2, 3, 4'and M, which is of the same type as shown in FIGS. 1.
  • the numeral 52 designates a clock pulse generator providing clock pulses for timing, these pulses being supplied sequentially to the register 51 to shift the contents of the register in turn in the order of L, 2, 3, 4 and M, as shown in FIG. 3b (FIG. 3a illustrates the clock pulses).
  • Numeral 53 denotes an incremental counter circuit which counts the clock pulses in the order L, 2, 3, 4, M, L at a count cycle, the upper limit of each of which is equal to the number of character positions of the register 51 in synchronism with the register 51 as shown in FIG. 3c.
  • Numeral 54 designates a decremental counter which counts decrementally from the uppermost count value of the counter 53 to subtract one pulse count for every n--l pulse count (for example, every count of 4 clock pulses, as shown in FIG. 3d).
  • Numeral 55 denotes a coincidence circuit formed of an AND gate having input terminals connected to the outputs of the register 51, incremental counter 53 and decremental counter 54, the coincidence circuit comparing an output of the incremental counter 53 with that of the decremental counter 54 and giving an output corresponding to a specified one character position of the register when the count values of the both counters coincide with each other.
  • Numeral 56 is a buffer activated by operation of the coincidence circuit 55 and 57 is an indicator means formed of cold-cathode gas readout tubes, such as those sold by the Burroughs Corporation under the trademark Nixie, which tubes are provided corresponding to individual character positions of the register 51. All of the abovedescribeddevices are conventional and generally available.
  • a count value of the decremental counter 54 is M when the reading of the counter 54 is not M; that is, when it counts 2, 3 or 4, whereas the indicator means 57 displays L because the decremental counter 54 subtracts one pulse count from the five count value at every reception of 4 pulses.
  • the circuit 55 provides an output signal gating or the output of the corresponding character position of the register to the buffer 56, and the output of the buffer 56 changes form L to M, as shown in FIG. 3e.
  • the indicator means 57 indicates M position. Even though the count character in the counter 53 is advanced from M to L, 2, 3 and 4 in turn by the reception of the successive clock pulses, the display of the indicator means 57 is not changed due to memory of the buffer 56. When the coincidence is completed again, the display of the indicator means 57 is changed from M to L. The character position to be displayed on the indicator means 57 is in turn changed in the order of 3, 2, L and M, at every count of five clock pulses.
  • the present invention provides a serial-display system comprising in combination a recirculating shift register storing information processed by an arithmetic operation circuit to be indicated on an indicator means; an incremental counter which counts clock pulses which shift character positions of said register successively in synchronism with the shifting of said register; a decremental counter which counts in the reverse direction with respect to the uppermost count value of said incremental counter at every count of n-l clock pulses in case the number of character positions in said register is n; and a coincidence circuit which detects the coincidence between outputs of said both counters and provides an output for controlling the indicator means.
  • information existing in one character position of the register is indicated in the indicator means every one cycle of the register, even though the speed of the clock pulse is too fast.
  • the display of the registered information can certainly be achieved. Simultaneously, sequential display from the most significant character position to the least significant character position is possible.
  • a display system for use in a serial-type desk top computer including therein a recirculating shift register for temporarily storing in a plurality of digit positions information processed by an arithmetic operation circuit of the computer, and indicator tubes which are substantially equal in number to that of said digit positions and associated with the outputs of said digit positions individually so as to indicate said stored information on the corresponding tubes sequentially, the improvement comprising a clock pulse generator generating clock pulses and coupled with the register to feed thereto the generated pulses as carry ones for said digit positions; an incremental counter counting the clock pulses at a predetermined count cycle having an uppermost count value which is equal to the number of said digit positions; a decremental counter connected in parallel with said incremental counter to the output of said clock generator for counting decrementally from the count number of said uppermost count value line for every one count cycle which is equal to said predetermined count cycle by an integer number, and in synchronism with the shifting of said register conducted in response to the reception of the clock pulses; a coincidence circuit having its input terminal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Circuits Of Receivers In General (AREA)
US798407A 1968-02-28 1969-02-11 Display system for use in desk top computers Expired - Lifetime US3641561A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1322868 1968-02-28

Publications (1)

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US3641561A true US3641561A (en) 1972-02-08

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US798407A Expired - Lifetime US3641561A (en) 1968-02-28 1969-02-11 Display system for use in desk top computers

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US (1) US3641561A (da)
BE (1) BE729045A (da)
CH (1) CH524202A (da)
DE (1) DE1908869A1 (da)
DK (1) DK122045B (da)
FR (1) FR2002782A1 (da)
GB (1) GB1244515A (da)
NL (1) NL6903163A (da)
NO (1) NO126405B (da)
SE (1) SE342105B (da)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060145894A1 (en) * 2004-12-30 2006-07-06 Si-Hong Kim Apparatus and method for latency control in high frequency synchronous semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3324458A (en) * 1964-05-18 1967-06-06 Bunker Ramo Monitoring apparatus
US3366045A (en) * 1965-03-29 1968-01-30 C Olivetri & C S P A Ing Printing device for office machines and data processing equipments
US3396377A (en) * 1964-06-29 1968-08-06 Gen Electric Display data processor
US3449726A (en) * 1965-11-20 1969-06-10 Sony Corp Number display system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3324458A (en) * 1964-05-18 1967-06-06 Bunker Ramo Monitoring apparatus
US3396377A (en) * 1964-06-29 1968-08-06 Gen Electric Display data processor
US3366045A (en) * 1965-03-29 1968-01-30 C Olivetri & C S P A Ing Printing device for office machines and data processing equipments
US3449726A (en) * 1965-11-20 1969-06-10 Sony Corp Number display system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060145894A1 (en) * 2004-12-30 2006-07-06 Si-Hong Kim Apparatus and method for latency control in high frequency synchronous semiconductor device
US8988126B2 (en) * 2004-12-30 2015-03-24 Hynix Semiconductor, Inc. Apparatus and method for latency control in high frequency synchronous semiconductor device

Also Published As

Publication number Publication date
SE342105B (da) 1972-01-24
GB1244515A (en) 1971-09-02
NO126405B (da) 1973-01-29
FR2002782A1 (da) 1969-10-31
DE1908869A1 (de) 1969-10-02
BE729045A (da) 1969-08-01
NL6903163A (da) 1969-09-01
DK122045B (da) 1972-01-10
CH524202A (de) 1972-06-15

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