US4823130A - Method and control system for generating a variable output bit analog to digital converter - Google Patents

Method and control system for generating a variable output bit analog to digital converter Download PDF

Info

Publication number
US4823130A
US4823130A US07/157,768 US15776888A US4823130A US 4823130 A US4823130 A US 4823130A US 15776888 A US15776888 A US 15776888A US 4823130 A US4823130 A US 4823130A
Authority
US
United States
Prior art keywords
bit
voltage
analog
value
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US07/157,768
Other languages
English (en)
Inventor
Danny O. Wright
Kregg S. Wiggins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Automotive LP
Original Assignee
Siemens Bendix Automotive Electronics LP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Bendix Automotive Electronics LP filed Critical Siemens Bendix Automotive Electronics LP
Priority to US07/157,768 priority Critical patent/US4823130A/en
Assigned to ALLIED-SIGNAL INC., A CORP. OF DE reassignment ALLIED-SIGNAL INC., A CORP. OF DE ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: WIGGINS, KREGG S., WRIGHT, DANNY O.
Assigned to SIEMENS-BENDIX AUTOMOTIVE ELECTRONICS L.P., A LIMITED PARTNERSHIP OF DE reassignment SIEMENS-BENDIX AUTOMOTIVE ELECTRONICS L.P., A LIMITED PARTNERSHIP OF DE ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: ALLIED-SIGNAL INC.
Priority to PCT/US1989/000590 priority patent/WO1989007861A1/fr
Priority to KR1019890701906A priority patent/KR900701097A/ko
Priority to CA000591279A priority patent/CA1293809C/fr
Application granted granted Critical
Publication of US4823130A publication Critical patent/US4823130A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/004—Reconfigurable analogue/digital or digital/analogue converters
    • H03M1/007—Reconfigurable analogue/digital or digital/analogue converters among different resolutions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

Definitions

  • This invention relates to output bit resolution for an N bit A/D converter and more particularly relates to a method and control system for generating N+1, N+2 or N+X bits of resolution of an analog signal applied to an N bit A/D converter.
  • a sensor In certain control applications, a sensor generates an analog signal indicative of the condition being sensed such as fluid level, angular displacement, pressure levels, etc. In order to process the information contained in the signal in modern control systems, it is necessary to convert the analog signal to a digital signal having a certain number of bits of a digital word.
  • the device used is an analog to digital converter, A/D converter.
  • One input to the A/D converter is, of course the analog signal to be converted.
  • Two other inputs to the A/D converter are for receiving reference voltages which define the range of the input signal. By controlling the reference voltages to the A/D converter, the invention is practiced.
  • the analog signal is generated from a rotary position sensor which is rotated by the movement of a rotatable member moving through an angular displacement.
  • a rotary position sensor which is rotated by the movement of a rotatable member moving through an angular displacement.
  • the rotatable member which is the butterfly or throttle plate of an internal combustion engine
  • the throttle plate closes the air input to the engine.
  • the throttle plate is rotated in an opening direction, the amount of air ingested to the engine increased rapidly. It is desired to accurately measure such small angular rotations for accurate engine control.
  • the accuracy of the measurement of the angular position is not as critical.
  • the angular ranges are 0-22.5°, 22.5°-45°, and over 45° respectively.
  • a method for generating a variable output bit resolution from an N bit analog to digital converter has as its first step reading the analog voltage to be converted.
  • the voltage to be converted is supplied to an analog to digital converter wherein the analog voltage is converted into an N bit digital word.
  • the most significant bit position of the N bit digital word is tested for a binary zero value and if the value is zero the binary value of the penultimate most significant bit position is tested for a binary zero value and so on with each preceding consecutive significant bit position until a binary one value is found.
  • the method then responds to the last consecutive binary zero value prior to the binary one value for shifting the input voltage reference to the analog to digital converter to a value equal to 2 -X its original value, wherein X equals the number of consecutive binary zero bit positions starting from the most significant bit position and proceeding consecutively toward the least significant bit position.
  • Another analog to digital conversion is then done with the new voltage reference which will then yield an output of an N+X bit word.
  • FIG. 1 is a circuit schematic of the reference voltage control.
  • FIG. 2 is a state table of the amplifiers of FIG. 1.
  • FIG. 3 is a block diagram of the system for implementing the resolution control.
  • FIG. 4 is a flow chart of the method of implementing the resolution control.
  • a method for generating a variable output bit resolution from an N bit analog to digital converter has as its first step reading the analog voltage to be converted.
  • the voltage to be converted is supplied to an analog to digital converter wherein the analog voltage is converted into an N bit digital word.
  • the most significant bit position of the N bit digital word is tested for a binary zero value and if the value is zero the binary value of the penultimate most significant bit position is tested for a binary zero value and so on with each preceding consecutive significant bit position until a binary one value is found.
  • the method then responds to the last consecutive binary zero value prior to the binary one value for shifting the input voltage reference to the analog to digital converter to a value equal to 2 -X its original value, wherein X equals the number of consecutive binary zero bit positions starting from the most significant bit position and proceeding consecutively toward the least significant bit position.
  • Another analog to digital conversion is then done with the new voltage reference which will then yield an output of an N+X bit word.
  • the control system 11 for applying the reference voltage V REF to an A/D converter 10.
  • the A/D converter 10 is contained within a Microprocessor Unit 12, MPU, such as Motorola's MC68HC11A8 wherein the input pins are labelled PE0-PE7 identifying that the input is Port E.
  • the sensor 14 input is shown connected to one of the inputs of the A/D converter 10 such as PE0.
  • Resolution accuracy is accomplished by changing the reference voltage limits.
  • the upper or higher voltage limit V REF is changed as the lower voltage limit V REFL is maintained at ground voltage potential.
  • the reference voltage is obtained by dividing the previous reference voltage by the value of two.
  • the resolution may be characterized as a standard resolution which is N bits. If the reference voltage V REF is V+/2 then the resolution may be characterized as a high resolution which is N+1 bits and if the reference voltage is V+/4 then the resolution may be characterized as a very high resolution which is N+2 bits.
  • control system responds to a binary zero bit value in each consecutive bit position starting from the most significant bit position to the most significant minus X bit positions for generating a pair of voltage references to the voltage reference ports.
  • the pair of voltage references have a voltage spread wherein the upper voltage level is:
  • V REF V+
  • transistors TX1 and TX2 are non-conducting or OFF. This applies V+ to the V REF input through the resistor R A .
  • V+ 5 volts and the signal range from the sensor 14 is accepted to be from 0 to 5 volts.
  • V REF V+/2
  • transistor TX1 is conducting or ON and TX2 is non-conducting. This applies V+ to the V REF input through the series circuit of R A and R B .
  • V+ 5 volts and the signal range from the sensor 14 is accepted to be from 0 to 2.5 volts.
  • V REF V+/4
  • both transistors TX1 and TX2 are conducting and the voltage V+ is applied through the series parallel circuit of R A in series with the parallel combination of R B and R C .
  • V+ 5 volts and the signal range from the sensor 14 is accepted to be from 0 to 1.25 volts.
  • the voltage input V REFL is ground potential. It is to be understood that if the very high resolution was to be performed about the higher voltage limits of the sensor 14, the voltage V REFL would be raised to V+/2 and 3V/4 and the hook-up of the transistors TX1 and TX2 would be such to accomplish the appropriate voltage division which is well known to those skilled in the art in accordance with the preceding teaching. In which case, the general form of the voltage is
  • the state table has as its controlling inputs, the status of TX1 and TX2. If TX1 and TX2 are OFF, the resolution is standard or N bit. If TX1 is ON and TX2 is OFF, the resolution is high or N+1 bit and if both TX1 and TX2 are ON, then the resolution is very high or N+2 bit.
  • All conversions begin as an N bit conversion in the first step 18.
  • the output of the sensor 14 is read in step 20 to the A/D converter 10 with the voltage range from 0-5 volts and an N bit digital word is generated in step 22.
  • the output of the A/D converter 10 is placed in a register 16 in the MPU 12.
  • the MSD position is tested in the following step 24. If the MSD position has a value of binary zero in step 24, the MSD-1 bit position is tested in step 28.
  • MSD is equal to binary zero and MSD-1 is equal to binary one
  • the transistor TX1 is turned on in step 30, an analog to digital conversion is done in step 31 and an N+1 bit word is generated in step 32.
  • both transistors TX1 and TX2 are turned on in step 34, an analog to digital conversion is done in step 35 and an N+2 bit word is generated in step 36.
  • the MSD bit position is a binary one, then in step 38 an N bit word is generated.
  • the MPU 12 causes the value of the register 16 to be multiplied or shifted by a factor of two or four depending upon the value of the MSD-1 position. If the multiplication is by four, the resolution is ten bits and if by two the resolution is nine bits.
  • the senor is the sensor illustrated in U.S. Pat. No. 4,355,293 issued on Oct. 19, 1982 to Driscoll and assigned to a common assignee.
  • the sensor is connected to the accelerator pedal of a motor vehicle and measures the angle of rotation of the accelerator to determine the response of the vehicle operator and modify throttle valve operation.
  • the output analog signal is converted as herein explained and the digital output word is supplied to a pair of D/A converters for converting signal into either sine or cosine functions for application to a d.c. stepper motor. This is explained in the copending patent application entitled “Microstepping of an Unipolar D.C. Motor” cofiled herewith and incorporated herein by reference.
  • Another application of the system herein is to measure the actual angular position of the throttle valve with the desired angular position.
  • the resultant error signal that is the signal indicating that the actual angular position is not equal to the desired angular position is then supplied to the d.c. stepper motor as described in the copending patent application.
  • the angular position is between 45° and 90°. If the MSD and MSD-1 bit positions are equal to binary zeros the angular position is between 0° and 22.5° and if the MSD bit position is equal to binary zero and the MSD-1 bit position is equal to binary one the angular position of the throttle blade is between 22.5° and 45°. From this it is recognized that as the angle gets smaller, the amount of air ingested into the engine is more critical and the resolution of the angle of the throttle blade becomes higher.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
US07/157,768 1988-02-18 1988-02-18 Method and control system for generating a variable output bit analog to digital converter Expired - Fee Related US4823130A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US07/157,768 US4823130A (en) 1988-02-18 1988-02-18 Method and control system for generating a variable output bit analog to digital converter
PCT/US1989/000590 WO1989007861A1 (fr) 1988-02-18 1989-02-14 Procede et systeme de commande pour generer une resolution variable de sortie de bits avec un convertisseur analogique/numerique de n bits
KR1019890701906A KR900701097A (ko) 1988-02-18 1989-02-14 N 비트 아날로그 대 디지탈 컨버터로 부터 가변 출력 비트 리절류션을 발생시키기 위한 방법과 제어 시스템
CA000591279A CA1293809C (fr) 1988-02-18 1989-02-16 Methode et dispositif de commande pour obtenir un resolution variabledes bits dans un convertisseur analogique-numerique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/157,768 US4823130A (en) 1988-02-18 1988-02-18 Method and control system for generating a variable output bit analog to digital converter

Publications (1)

Publication Number Publication Date
US4823130A true US4823130A (en) 1989-04-18

Family

ID=22565199

Family Applications (1)

Application Number Title Priority Date Filing Date
US07/157,768 Expired - Fee Related US4823130A (en) 1988-02-18 1988-02-18 Method and control system for generating a variable output bit analog to digital converter

Country Status (4)

Country Link
US (1) US4823130A (fr)
KR (1) KR900701097A (fr)
CA (1) CA1293809C (fr)
WO (1) WO1989007861A1 (fr)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028926A (en) * 1988-12-07 1991-07-02 Fujitsu Limited Successive type analog-to-digital converter with a variable reference voltage for the digital to analog converter
US5066954A (en) * 1989-04-05 1991-11-19 I F M Electronic Gmbh Analog to digital converter with reference voltage control and analog style display
WO1992022962A1 (fr) * 1991-06-12 1992-12-23 Eastman Kodak Company Convertisseur analogique/numerique a double plage et auto-etalonnage
EP0729234A1 (fr) * 1995-02-24 1996-08-28 Nec Corporation Convertisseur analogique-numérique adaptatif
US5638075A (en) * 1994-10-31 1997-06-10 Mitsubishi Denki Kabushiki Kaisha Successive approximation ADC with rounding to vary bit number output
US20050006475A1 (en) * 2003-01-09 2005-01-13 Pettinelli John A. Analog-to-digital converter with automatic range and sensitivity adjustment
US20140328353A1 (en) * 2013-05-03 2014-11-06 Texas Instruments Incorporated Dynamic resolution adjustment for digital converters

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4355293A (en) * 1979-10-22 1982-10-19 The Bendix Corporation Electrical resistance apparatus having integral shorting protection
US4431985A (en) * 1981-03-02 1984-02-14 Honeywell Inc. Stepper motor system for digitally measuring input quantities
US4733216A (en) * 1986-10-29 1988-03-22 Allied Corporation N+1 bit resolution from an N bit A/D converter

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1481960A (fr) * 1966-01-10 1967-05-26 Societe D'etudes, Recherches Et Constructions Electroniques Procédé et dispositif de codage numérique
GB1332671A (en) * 1971-04-19 1973-10-03 Gen Electric Integral honeycomb mounting base for a printing plate
JPS609211A (ja) * 1983-06-29 1985-01-18 Fujitsu Ltd 絶対ゲイン調整回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4355293A (en) * 1979-10-22 1982-10-19 The Bendix Corporation Electrical resistance apparatus having integral shorting protection
US4355293B1 (fr) * 1979-10-22 1985-09-03
US4431985A (en) * 1981-03-02 1984-02-14 Honeywell Inc. Stepper motor system for digitally measuring input quantities
US4733216A (en) * 1986-10-29 1988-03-22 Allied Corporation N+1 bit resolution from an N bit A/D converter

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
The Engineering Staff of Analog Devices, Inc., Analog Digital Conversion Handbook, 6/1972, pp. I 34 and I 35. *
The Engineering Staff of Analog Devices, Inc., Analog-Digital Conversion Handbook, 6/1972, pp. I-34 and I-35.
The Engineering Staff of Digital Equipment Corporation, Analog Digital Conversion Handbook, 1964, pp. 20 22. *
The Engineering Staff of Digital Equipment Corporation, Analog-Digital Conversion Handbook, 1964, pp. 20-22.

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028926A (en) * 1988-12-07 1991-07-02 Fujitsu Limited Successive type analog-to-digital converter with a variable reference voltage for the digital to analog converter
US5066954A (en) * 1989-04-05 1991-11-19 I F M Electronic Gmbh Analog to digital converter with reference voltage control and analog style display
WO1992022962A1 (fr) * 1991-06-12 1992-12-23 Eastman Kodak Company Convertisseur analogique/numerique a double plage et auto-etalonnage
AU643394B2 (en) * 1991-06-12 1993-11-11 Eastman Kodak Company Self calibrating dual range A/D converter
US5638075A (en) * 1994-10-31 1997-06-10 Mitsubishi Denki Kabushiki Kaisha Successive approximation ADC with rounding to vary bit number output
US5790061A (en) * 1995-02-24 1998-08-04 Nec Corporation Adaptive A/D converting device for adaptively converting and input analog signal into an output digital signal having a constant quantizing error
EP0729234A1 (fr) * 1995-02-24 1996-08-28 Nec Corporation Convertisseur analogique-numérique adaptatif
AU707655B2 (en) * 1995-02-24 1999-07-15 Nec Corporation Adaptive A/D converting device for adaptively converting an input analog signal into an output digital signal having constant quantizing error
US20050006475A1 (en) * 2003-01-09 2005-01-13 Pettinelli John A. Analog-to-digital converter with automatic range and sensitivity adjustment
US7175092B2 (en) 2003-01-09 2007-02-13 Hand Held Products, Inc. Analog-to-digital converter with automatic range and sensitivity adjustment
US20070228170A1 (en) * 2003-01-09 2007-10-04 Pettinelli John A Jr Analog-to-digital converter with automatic range and sensitivity adjustment
US7413126B2 (en) 2003-01-09 2008-08-19 Hand Held Products, Inc. Analog-to-digital converter with automatic range and sensitivity adjustment
US20140328353A1 (en) * 2013-05-03 2014-11-06 Texas Instruments Incorporated Dynamic resolution adjustment for digital converters
US9712178B2 (en) * 2013-05-03 2017-07-18 Texas Instruments Incorporated Dynamic resolution adjustment for digital converters

Also Published As

Publication number Publication date
KR900701097A (ko) 1990-08-17
CA1293809C (fr) 1991-12-31
WO1989007861A1 (fr) 1989-08-24

Similar Documents

Publication Publication Date Title
US4230984A (en) Method and apparatus for driving an air core gage
US4468968A (en) Method and arrangement for providing information to define the values of a set of parameters which characterize an element
US4272760A (en) Self-calibrating digital to analog conversion system and method
AU748869B2 (en) Method and device in vehicle control system, and system for error diagnostics in vehicle
US4070665A (en) High accuracy digital to analog resolver converter
US4458322A (en) Control of page storage among three media using a single channel processor program and a page transfer bus
CN1139483A (zh) 改进补偿的传感器
GB1591680A (en) Digital computer system
US4253335A (en) Barometric altimeter
CA1293809C (fr) Methode et dispositif de commande pour obtenir un resolution variabledes bits dans un convertisseur analogique-numerique
US5389864A (en) Actuator with motor and feedback driven by a common power supply
US4245297A (en) Positioning control system
US4733216A (en) N+1 bit resolution from an N bit A/D converter
JPS5843576B2 (ja) エンシ゜ンセイギヨシステム
US3646337A (en) Apparatus for processing angular data
US5371500A (en) Maintaining ratiometric data in electronically manipulated signal processing systems
US4370642A (en) Single non-linear converter ladder network having analog switches with digital control
US5128883A (en) Method for absolute position determination of multi-speed devices
US4721895A (en) Multi-speed analog servo
US6359578B1 (en) System for externally referenced ratiometric signal processing
JPH0762620B2 (ja) センサ信号の出力特性を変化させる方法
JPS5815866Y2 (ja) 校正装置
US3495171A (en) Checking linear or nonlinear potentiometers with linear reference potentiometer and signal storage unit
SU954914A1 (ru) Установка дл автоматической поверки цифровых приборов
US6691679B2 (en) System and method for controlling an operational position of a throttle valve in an engine

Legal Events

Date Code Title Description
AS Assignment

Owner name: ALLIED-SIGNAL INC., COLUMBIA ROAD AND PARK AVENUE,

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:WRIGHT, DANNY O.;WIGGINS, KREGG S.;REEL/FRAME:004875/0416

Effective date: 19880217

Owner name: ALLIED-SIGNAL INC., A CORP. OF DE,NEW JERSEY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WRIGHT, DANNY O.;WIGGINS, KREGG S.;REEL/FRAME:004875/0416

Effective date: 19880217

AS Assignment

Owner name: SIEMENS-BENDIX AUTOMOTIVE ELECTRONICS L.P., A LIMI

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:ALLIED-SIGNAL INC.;REEL/FRAME:005006/0282

Effective date: 19881202

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
FP Lapsed due to failure to pay maintenance fee

Effective date: 20010418

STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362