US9654040B2 - Drive circuit of stepping motor, integrated circuit thereof, and electronic equipment including same, and method for controlling drive circuit of stepping motor - Google Patents

Drive circuit of stepping motor, integrated circuit thereof, and electronic equipment including same, and method for controlling drive circuit of stepping motor Download PDF

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US9654040B2
US9654040B2 US13/981,391 US201213981391A US9654040B2 US 9654040 B2 US9654040 B2 US 9654040B2 US 201213981391 A US201213981391 A US 201213981391A US 9654040 B2 US9654040 B2 US 9654040B2
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Prior art keywords
excitation current
stepping motor
abnormality
drive circuit
signal
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US20130307460A1 (en
Inventor
Masanori Tsuchihashi
Hiroki Hashimoto
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Rohm Co Ltd
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Rohm Co Ltd
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Priority claimed from JP2011012839A external-priority patent/JP5785718B2/ja
Priority claimed from JP2011085361A external-priority patent/JP5835923B2/ja
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Assigned to ROHM CO., LTD. reassignment ROHM CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HASHIMOTO, HIROKI, TSUCHIHASHI, MASANORI
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
    • H02P8/34—Monitoring operation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
    • H02P8/36—Protection against faults, e.g. against overheating or step-out; Indicating faults
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
    • H02P8/36—Protection against faults, e.g. against overheating or step-out; Indicating faults
    • H02P8/38—Protection against faults, e.g. against overheating or step-out; Indicating faults the fault being step-out
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J19/00—Character- or line-spacing mechanisms
    • B41J19/18—Character-spacing or back-spacing mechanisms; Carriage return or release devices therefor
    • B41J19/20—Positive-feed character-spacing mechanisms
    • B41J19/202—Drive control means for carriage movement

Definitions

  • the present invention relates to a drive circuit of a stepping motor, an integrated circuit integrating the same, and electronic equipment including the same, and a method for controlling the drive circuit of the stepping motor, and more particularly relates to a technology for detecting an abnormality on a path for transmitting an excitation current from the drive circuit to the stepping motor.
  • a stepping motor achieving smooth rotations without unevenness and thereby being capable of exhibiting low vibration and low noise is often used in electronic equipment such as a printer, a facsimile machine, a scanner, or the like.
  • the stepping motor is generally driven by applying an excitation current to a two-phase excitation coil while allowing the excitation current having phases shifted one another by 90° degrees to be changed into a waveform close to a sine wave (in other words, pseudo sine wave).
  • Japanese Patent Laying-Open No. 2008-029145 discloses an example of a drive circuit of a stepping motor.
  • the drive circuit includes a target voltage generating unit for generating a target voltage indicating a target value of an excitation current based on a reference voltage indicating an upper limit of the excitation current, and a current controller for controlling the excitation current based on the target voltage.
  • a drive circuit and a stepping motor are connected to each other by means of a wire.
  • This wire is connected by a connecting unit such as a terminal, a connector, or the like in the drive circuit and the stepping motor.
  • wires may be connected to each other by means of a connector or the like also at an intermediate portion of a wire in some cases.
  • the present invention was achieved to solve such a problem, and its object is to provide a drive circuit of a stepping motor capable of detecting an abnormality of a wire for supplying an excitation current to a stepping motor.
  • a drive circuit of a stepping motor includes a target voltage generating unit for generating a target voltage indicating a target value as to an excitation current determined based on a reference voltage indicating an upper limit value of the excitation current flowing into the stepping motor, and a current controller for controlling the excitation current so as to maintain a value of the excitation current at the target value based on the target voltage.
  • the current controller includes a comparing unit for comparing a signal corresponding to the excitation current and a predetermined threshold value.
  • the drive circuit further includes an abnormality detecting unit for detecting an abnormality on a path for supplying the excitation current from the drive circuit to the stepping motor based on an output signal from the comparing unit.
  • the comparing unit compares a voltage corresponding to the excitation current and the target voltage as the threshold value.
  • the abnormality detecting unit detects the abnormality based on an output signal from the comparing unit and a control signal indicating a polarity of the excitation current.
  • the stepping motor includes first and second excitation coils.
  • the current controller includes a first channel and a second channel for outputting excitation currents corresponding respectively to the first and second excitation coils.
  • the current controller detects occurrence of the abnormality at a predetermined timing where the control signal for one channel among the first and second channels attains a predetermined state, based on a state of the output signal of the other channel.
  • the current controller detects occurrence of the abnormality.
  • control signal is a pulse signal.
  • the predetermined timing is determined based on a timing at a falling edge of the control signal.
  • the target voltage generating unit generates the target voltage by dividing the reference voltage in accordance with a ratio of the target value with respect to the upper limit value changing in a stepwise manner from 0 to 1.
  • the drive circuit further includes an instruction generating unit for generating a signal indicating the ratio and the control signal based on information from outside of the drive circuit.
  • the abnormality detecting unit detects the abnormality based on the number of times that a level of a signal corresponding to the excitation current has reached the threshold value within a predetermined period in a state where the excitation current can be provided from the drive circuit to the stepping motor.
  • the threshold value is determined based on the target value.
  • the abnormality detecting unit counts the number based on an output signal from the comparing unit.
  • the abnormality detecting unit detects that the abnormality occurs when the number is less than a predetermined reference number.
  • the threshold value is determined based on a minimum current value being different from the target value and being capable of driving the stepping motor.
  • the abnormality detecting unit counts the number based on an output signal from the comparing unit.
  • the threshold value is set based on a value lower than the target value.
  • the predetermined period is determined based on at least one of an activation signal of the drive circuit, an enable signal for enabling the drive circuit, and a control signal indicating a polarity of the excitation current.
  • the abnormality detecting unit determines the abnormality in response to successive detections of the abnormality for a predetermined times.
  • the abnormality detecting unit outputs an abnormality signal based on determination of the abnormality.
  • An integrated circuit according to the present invention represents integration of any of the drive circuits described above.
  • Electronic equipment includes the stepping motor and any of the drive circuits described above.
  • a method for controlling a drive circuit of a stepping motor includes the steps of generating a target voltage indicating a target value for an excitation current determined based on a reference voltage indicating an upper limit value of the excitation current flowing into the stepping motor, controlling the excitation current so as to maintain a value of the excitation current at the target value based on the target voltage, comparing a signal corresponding to the excitation current and a predetermined threshold value, and detecting an abnormality of a path for supplying the excitation current from the drive circuit to the stepping motor based on an output signal provided by the step of comparing.
  • the step of comparing includes the step of comparing a voltage corresponding to the excitation current and the target voltage as the threshold value.
  • the step of detecting the abnormality includes the step of detecting the abnormality based on the output signal and a control signal indicating a polarity of the excitation current.
  • the method further includes the step of counting the number of times a level of a signal corresponding to the excitation current has reached the threshold value within a predetermined period in a state where the excitation current can be provided from the drive circuit to the stepping motor.
  • the step of detecting the abnormality includes the step of detecting the abnormality based on the number of times.
  • an abnormality of a wire for supplying an excitation current to a stepping motor can be detected in a drive circuit of the stepping motor.
  • FIG. 1 represents an overall block diagram of a motor driving system including a drive circuit of a stepping motor in accordance with a first embodiment.
  • FIG. 2 represents an example of a time chart for describing an abnormality detection control in the case of a full-step mode.
  • FIG. 3 represents an example of a time chart for describing an abnormality detection control in the case of a half-step mode.
  • FIG. 4 represents another example of a time chart for describing an abnormality detection control in the case of the half-step mode.
  • FIG. 5 represents a functional block diagram for describing an abnormality detection control executed by an abnormality detecting unit in the first embodiment.
  • FIG. 6 represents a flowchart for describing details of an abnormality detection control processing executed by the abnormality detecting unit in the first embodiment.
  • FIG. 7 represents an overall block diagram of a motor driving system including a drive circuit of a stepping motor in accordance with a second embodiment.
  • FIG. 8 represents an overall block diagram of a motor diving system including a drive circuit of a stepping motor in accordance with a third embodiment.
  • FIG. 9 represents a first time chart for describing an abnormality detection control in the third embodiment.
  • FIG. 10 represents a second time chart for describing an abnormality detection control in the third embodiment.
  • FIG. 11 represents a functional block diagram for describing an abnormality detection control executed by an abnormality detecting unit in the third embodiment.
  • FIG. 12 represents a flowchart for describing details of an abnormality detection control processing executed by the abnormality detecting unit in the third embodiment.
  • FIG. 13 represents an overall block diagram of a motor driving system including a drive circuit of a stepping motor in accordance with a fourth embodiment.
  • FIG. 14 represents an overall block diagram of a motor driving system including a drive circuit of a stepping motor in accordance with a fifth embodiment.
  • FIG. 15 represents a time chart for describing an abnormality detection control in the fifth embodiment.
  • FIG. 16 represents a flowchart for describing details of an abnormality detection control processing executed by the abnormality detecting unit in the fifth embodiment.
  • FIG. 1 represents an overall block diagram of a motor driving system 10 including a drive circuit 100 of a stepping motor in accordance with a first embodiment.
  • This motor driving system 10 is used as a driving unit of electronic equipment such as a printer, a facsimile machine, a scanner, a camera, or the like.
  • stepping motor 200 is a two-phase stepping motor.
  • Stepping motor 200 includes excitation coils L 1 , L 2 corresponding respectively to the two phases and a rotor 210 .
  • Excitation currents IOUT 1 , IOUT 2 flow through excitation coils L 1 , L 2 respectively.
  • Drive circuit 100 controls excitation currents IOUT 1 , IOUT 2 so as to maintain values of excitation currents IOUT 1 , IOUT 2 at set values when stepping motor 200 is driven.
  • drive circuit 100 allows the stepping motor to drive in a micro-step manner.
  • drive circuit 100 changes a ratio of excitation currents IOUT 1 , IOUT 2 finely to allow rotor 210 of the stepping motor to rotate at a finer step angle than a basic step angle.
  • Drive circuit 100 includes an input buffer 110 , a D/A converter (DAC) 120 , a current control circuit 130 , an abnormality detecting unit 170 , a PWM controller 180 , and an oscillation circuit 190 .
  • DAC D/A converter
  • Current control circuit 130 includes comparators 131 , 132 , a logic controller 140 having logic circuits 141 , 142 , a pre-driver unit 150 having pre-drivers 151 , 152 , and H-bridges 161 , 162 .
  • Comparator 131 , logic circuit 141 , pre-driver 151 , and H-bridge 161 constitute a circuit corresponding to a channel CH 1 for supplying excitation current IOUT 1 to excitation coil L 1 .
  • comparator 132 , logic circuit 142 , pre-driver 152 , and H-bridge 162 constitute a circuit corresponding to a channel CH 2 for supplying excitation current IOUT 2 to excitation coil L 2 . Since the configuration and function of respective circuits corresponding to channels CH 1 , CH 2 are similar, channel CH 1 will be described in the following detailed description about the circuit, and similar description as about channel CH 2 will not be repeated.
  • Input buffer 110 is a so-called voltage follower circuit, and directly outputs an inputted reference voltage VREF.
  • Reference voltage VREF is a voltage indicating upper limit values of excitation currents IOUT 1 , IOUT 2 .
  • D/A converter 120 corresponds to a “target voltage generating unit” in the drive circuit of the stepping motor in accordance with the present invention.
  • D/A converter 120 receives reference voltage VREF and control signals I 01 , I 11 and outputs a target voltage VA 1 with respect to channel CHL
  • Control signals I 01 , I 11 are signals for changing a ratio of a set value of excitation current IOUT 1 with respect to the upper limit value of excitation current IOUT 1 within the range of 0 to 1.
  • control signals I 01 , I 11 are switched between an H (High) level and an L (Low) level. Therefore, there are four combinations of electric potential levels of control signals I 01 , I 11 .
  • a ratio of the set value of excitation current IOUT 1 with respect to the upper limit value of excitation current IOUT 1 is changed among four values, for example, 0%, 33%, 67%, and 100%, with respect to the combinations (H, H), (L, H), (H, L), and (L, L) of the electric potential levels of control signals I 01 , I 11 .
  • D/A converter 120 generates target voltage VA 1 by dividing reference voltage VREF in accordance with the ratio described above.
  • Current control circuit 130 receives target voltage VA 1 and controls excitation current IOUT 1 so as to maintain the value of excitation current IOUT 1 at the set value.
  • Comparator 131 compares a voltage RNF 1 , indicating a current (excitation current IOUT 1 ) flowing through H-bridge 161 and to which the current have been converted by a resistor R 1 provided outside of drive circuit 100 , and target voltage VA 1 to generate an output signal CLOUT 1 indicating a result of comparison.
  • Output signal CLOUT 1 is, for example, set to be high (Hi) when voltage RNF 1 has not reached target voltage VA 1 , and set to be low (Lo) when voltage RNF 1 has reached target voltage VA 1 .
  • resistor R 1 may be included in drive circuit 100 .
  • Logic circuit 141 receives a control signal PHA 1 indicating a polarity of excitation current IOUT 1 and output signal CLOUT 1 of comparator 131 . Then, logic circuit 141 generates a drive signal with use of these signals and a control signal PWM set by a PWM controller based on an oscillation signal OSC from oscillation circuit 190 .
  • Pre-driver 151 amplifies a drive signal transmitted from logic circuit 141 .
  • a signal transmitted from pre-driver 151 is provided to H-bridge 161 .
  • H-bridge 161 In accordance with operation of H-bridge 161 , a magnitude of excitation current IOUT 1 supplied to excitation coil L 1 is changed.
  • logic circuit 141 When the magnitude of excitation current IOUT 1 exceeds the upper limit value (in other words, when the output of comparator 131 indicates RNF1>VA1), logic circuit 141 reduces excitation current IOUT 1 . After an elapse of a predetermined time period from starting the operation of reducing excitation current IOUT 1 , logic circuit 141 increases excitation current IOUT 1 . The value of excitation current IOUT 1 is controlled so as to maintain the set value by repeating this operation.
  • H-bridge 161 includes P-type MOS transistors Q 11 , Q 12 and N-type MOS transistors Q 13 , N 14 .
  • P-type MOS transistor Q 11 and N-type MOS transistor Q 13 are connected in series between a power source node receiving a power source electric potential VM of stepping motor 200 and a terminal T 13 connected with one end of resistor R 1 .
  • P-type MOS transistor Q 12 and N-type MOS transistor Q 14 are connected in series between the above-described power source node and terminal T 13 connected with one end of resistor R 1 .
  • the other end of resistor R 1 is connected to a ground node.
  • a node N 11 connected with P-type MOS transistor Q 11 and N-type MOS transistor Q 13 is connected to a terminal T 11 .
  • a node N 12 connected with P-type MOS transistor Q 12 and N-type MOS transistor Q 14 is connected to a terminal T 12 .
  • Two terminals of excitation coil L 1 are connected respectively to terminals T 11 , T 12 via wires.
  • the configuration of all of the transistors forming the H-bridge may be N-type MOS transistors.
  • the H-bridge is formed with use of transistors all of which are N-type MOS transistors, a separate booster circuit for driving the transistors is required, as compared to the case of using the P-type MOS transistors and the N-type transistors.
  • the N-type MOS transistor is more likely to be reduced in a circuit area than the P-type MOS transistor, for example, when an output current of the P-type MOS transistor is high, using the N-type MOS transistor for all the transistors even with the booster circuit may have an advantage that an overall area of the circuit can be reduced more.
  • the booster circuit is not required. Therefore, the type of the transistors forming the H-bridge is appropriately selected taking in consideration the factors such as a current flowing through the circuit, a circuit area, and the like.
  • Abnormality detecting unit 170 receives control signals PHA 1 , PHA 2 respectively indicating polarities of excitation currents IOUT 1 , IOUT 2 , output signals CLOUT 1 , CLOUT 2 of comparators 131 , 132 , and oscillation signal OSC from oscillation circuit 190 .
  • Abnormality detecting unit 170 executes an abnormality detection control for detecting whether or not an abnormality occurs in the wire for supplying excitation currents IOUT 1 , IOUT 2 from drive circuit 100 to stepping motor 200 , based on these information.
  • FIG. 2 represents an example of a time chart in the case of a full-step mode.
  • FIG. 3 represents an example of a time chart in the case of a half-step mode.
  • the horizontal axis denotes a time
  • the vertical axis denotes states of control signals PHA 1 , PHA 2 indicating polarities of the excitation current, states of control signals I 01 , I 11 , I 02 , I 12 determining a voltage division ratio of the target voltage, and states of excitation currents IOUT 1 , IOUT 2 .
  • control signals I 01 , I 11 , I 02 , I 12 are always set at a low level (Lo), and excitation currents IOUT 1 , IOUT 2 are synchronized respectively with control signals PHA 1 , PHA 2 to switch in a rectangular wave form between the state of +100% and the state of ⁇ 100%.
  • excitation current IOUT 1 As to excitation current IOUT 1 , falling of control signal PHA 1 from the high level to the low level at time t 1 causes excitation current IOUT 1 to switch from +100% to ⁇ 100%, and rising of control signal PHA 1 from the low level to the high level at time t 3 causes excitation current IOUT 1 to switch from ⁇ 100% to +100%.
  • excitation current IOUT 2 As to excitation current IOUT 2 , there is a phase difference of 90° with excitation current IOUT 1 as described above. Therefore, excitation current IOUT 2 switches from +100% to ⁇ 100% at time t 2 , and excitation current IOUT 2 switches from ⁇ 100% to +100% at time t 4 .
  • the state of the output signal of the comparator in the other channel is detected, so that whether or not an abnormality occurs in the wire on the other side can be determined.
  • the timing for detecting the state of the output signal of the comparator may be in any of the cases of a rising or falling edge of control signals PHA 1 , PHA 2 .
  • the timing for detecting the state of the output signal of the comparator may be the timing after an elapse of a predetermined delayed time from a rising or falling edge of control signals PHA 1 , PHA 2 .
  • the states of each of control signals I 01 , I 11 , I 02 , I 12 is controlled for only the time period in one-half of the 1 ⁇ 4 cycle (in other words, 1 ⁇ 8 cycle) during which the combination states of the polarities of excitation currents IOUT 1 , IOUT 2 are changed.
  • control signals I 01 , I 11 are in the state of Hi only from time t 22 to time t 23 and from time t 26 to time t 27 in FIG. 3 .
  • control signals I 02 , I 12 are in the state of Hi only from time t 20 to time t 21 and from time t 24 to time t 25 in FIG. 3 .
  • excitation current IOUT 1 is in the state of 0%
  • control signals I 02 , I 12 are in the state of Hi
  • excitation current IOUT 2 is in the state of 0%. Therefore, the waveforms of excitation currents IOUT 1 , IOUT 2 can be made close to the wave form of a sine wave.
  • the current state of the channel on the other side is detected, so that whether or not an abnormality occurs in the wire of the channel on the other side can be determined.
  • FIG. 4 represents an example of the case having control signals I 01 , I 02 set to be Lo only for 1 ⁇ 8 cycle and control signals I 11 , I 12 set to be Hi only for 1 ⁇ 8 cycle.
  • the level of the excitation current can be in the intermediate state of +67% and ⁇ 67% from time t 31 to t 32 , from time t 33 to time t 34 , from time t 35 to time t 36 , and from time t 37 to time t 38 in FIG. 4 , so that the excitation current can be closer to the sine wave.
  • the timings where control signals PHA 1 , PHA 2 switch correspond to the timings where the level of the excitation current changes to +100% (or to ⁇ 100%). Therefore, the state of charging with respect to the excitation coil is detected, so that there is a possibility that an abnormality cannot be detected appropriately. In such a case, as described above, it is preferable to detect a state after an elapse of a predetermined time period from the timing of switching control signals PHA 1 , PHA 2 .
  • the level of the excitation current can be set to the state of +33% or ⁇ 33% by the combinations of control signals I 01 , I 11 , I 02 , I 12 . Accordingly, the waveform of the excitation current can be yet closer to the sine wave, so that smoother rotation can be achieved.
  • the current state of the channel on the other side is detected at an appropriate timing based on the timing of switching control signals PHA 1 , PHA 2 , so that whether or not an abnormality occurs in the wire of the cannel on the other side can be determined.
  • FIG. 5 represents a functional block diagram for describing the abnormality detection control executed by abnormality detecting unit 170 in the first embodiment. Each functional block shown in the functional block diagram of FIG. 5 is achieved by hardware or software processing executed by abnormality detecting unit 170 .
  • abnormality detecting unit 170 includes a current limit detector 171 , a determination unit 172 , and a malfunction preventing unit 173 .
  • Current limit detector 171 receives oscillation signal OSC from oscillation circuit 190 , and output signals CLOUT 1 , CLOUT 2 from comparators 131 , 132 . For each of output signals CLOUT 1 , CLOUT 2 , during a predetermined period (T 1 ) determined by oscillation signal OSC, current limit detector 171 determines whether or not output signals CLOUT 1 , CLOUT 2 become Lo, in other words, whether or not excitation currents IOUT 1 , IOUT 2 have reached current limit values corresponding to target voltages VA 1 , VA 2 after output signals CLOUT 1 , CLOUT 2 have reached target voltages VA 1 , VA 2 respectively.
  • current limit detector 171 sets corresponding detection signals CLD 1 , CLD 2 to be OFF.
  • detection signals CLD 1 , CLD 2 are set to be ON. Then, current limit detector 171 outputs detection signals CLD 1 , CLD 2 to determination unit 172 .
  • Determination unit 172 receives detection signals CLD 1 , CLD 2 from current limit detector 171 , and control signals PHA 1 , PHA 2 . As described above with reference to FIGS. 2 to 4 , determination unit 172 determines whether or not detection signals CLD 1 , CLD 2 of the other channel are set to be ON at a predetermined timing determined based on rising and falling edges of control signals PHA 1 , PHA 2 .
  • determination unit 172 sets abnormality flags DET 1 , DET 2 of the corresponding channel to be ON as exhibiting possibility of occurrence of an abnormality in the wire of the channel on the other side.
  • abnormality flags DET 1 , DET 2 are set to be OFF.
  • determination unit 172 outputs abnormality flags DET 1 , DET 2 to malfunction preventing unit 173 .
  • Malfunction preventing unit 173 exhibits a function for preventing an effect of erroneous detection in the case where, for example, determination unit 172 temporarily has determined an abnormality due to delays in rising of the excitation current or effect of noises by operation state of stepping motor 200 even though no abnormality is present in the wire.
  • Malfunction preventing unit 173 receives abnormality flags DET 1 , DET 2 from determination unit 172 and control signals PHA 1 , PHA 2 . Malfunction preventing unit 173 determines whether or not abnormality flags DET 1 , DET 2 are set to be ON successively by determination unit 172 at cycles of successive predetermined numbers of times (for example, 3 times) of control signals PHA 1 , PHA 2 . Then, when it is detected that abnormality flags DET 1 , DET 2 are set to be ON successively for a predetermined times, malfunction preventing unit 173 settles occurrence of an abnormality in the wire and outputs an abnormality signal ALM in response. This abnormality signal ALM is received by an abnormality notifying unit (not illustrated) provided outside or inside of drive circuit 100 , so that occurrence of an abnormality is notified to a user.
  • an abnormality notifying unit not illustrated
  • FIG. 6 is a flowchart for describing details of the abnormality detection control processing executed by abnormality detecting unit 170 in the first embodiment.
  • a program stored in advance in the CPU is invoked from a main routine and executed at predetermined cycles to thereby achieve the processing.
  • the processing can be achieved by dedicated hardware (electronic circuit).
  • abnormality detecting unit 170 obtains, in Step (in the following, the term “step” will be abbreviated as “S”) 100 , output signals CLOUT 1 , CLOUT 2 (in the following, CLOUT 1 and CLOUT 2 will be collectively referred to as “CLOUT”) from comparators 131 , 132 . Then, in S 110 , abnormality detecting unit 170 determines whether or not these output signals maintains the state of Hi during a predetermined time period T 1 .
  • abnormality detecting unit 170 sets a detection signal CLD (in the following, CLD 1 and CLD 2 will be collectively referred to as “CLD”) of a corresponding channel to be ON. After that, the processing proceeds to S 130 .
  • CLD detection signal
  • abnormality detecting unit 170 determines whether or not the timing is at a predetermined detection timing based on a control signal PHA (in the following, PHA 1 and PHA 2 will be collectively referred to as “PHA”).
  • abnormality detecting unit 170 terminates the processing.
  • abnormality detecting unit 170 subsequently determines whether or not detection signal CLD of the other channel is set to be ON.
  • abnormality detecting unit 170 determines that the excitation current meets the target value and no abnormality occurs in the wire, and then terminates the processing.
  • abnormality detecting unit 170 sets abnormality flag DET (in the following, DET 1 and DET 2 will be collectively referred to as “DET”) of the corresponding channel to be ON, assuming that there is a possibility of occurrence of a wire abnormality.
  • abnormality detecting unit 170 determines, in S 160 , whether or not this abnormality flag DET is detected successively for a predetermined number of times (n times: n is a natural number) of cycles of control signal PHA.
  • abnormality detecting unit 170 determines that the abnormal state was erroneously detected, and then terminates the processing.
  • control signal PHA is detected successively for “n” times (YES in S 160 )
  • the processing proceeds to S 170 , and abnormality detecting unit 170 determines that a wire abnormality occurs. Then, abnormality detecting unit 170 outputs abnormality signal ALM in S 180 .
  • an abnormality in the wire for supplying the excitation current to the stepping motor can be detected in the drive circuit of the stepping motor.
  • control circuit 100 of the stepping motor in accordance with the first embodiment, the configuration of providing control signals PHA 1 , PHA 2 and control signals I 01 , I 11 , I 02 , I 12 from outside of drive circuit 100 is described. However, these control signals may be generated in the drive circuit.
  • FIG. 7 represents an overall block diagram of a motor driving system 10 A including a drive circuit 100 A of the stepping motor in accordance with the second embodiment.
  • FIG. 7 shows the configuration with an instruction generating unit 115 added to drive circuit 100 described with reference to FIG. 1 of the first embodiment. In FIG. 7 , description as to the elements overlapping with FIG. 1 will not be repeated.
  • drive circuit 100 A further includes instruction generating unit 115 in addition to the configuration of drive circuit 100 shown in FIG. 1 .
  • Instruction generating unit 115 receives from outside of the circuit a reference clock signal CLK, a control mode signal MOD, a signal CW_CCW indicating a direction of rotation, and an enable signal ENB.
  • Control mode signal MOD is a signal determining which of the full-step mode, the half-step mode, and the quarter-step mode described with reference to FIGS. 2 to 4 of the first embodiment is to be selected.
  • Instruction generating unit 115 generates control signals PHA 1 , PHA 2 based on the information and outputs the control signals to logic controller 140 and abnormality detecting unit 170 . Further, instruction generating unit 115 generates control signals I 01 , I 11 , I 02 , I 12 and outputs the signals to D/A converter 120 .
  • the configuration of providing the instruction generating unit inside the drive circuit as shown in FIG. 7 eliminates the necessity of providing additional circuit having a function corresponding to the instruction generating unit outside of the drive circuit. Therefore, there is an advantage that it can be applied for more applications.
  • the description was made on the configuration of detecting an abnormality in a current transmission path from the drive circuit to the stepping motor by determining whether or not the target excitation current flows at the predetermined timing.
  • FIG. 8 represents an overall block diagram of a motor driving system 10 B including a drive circuit 100 B of a stepping motor in accordance with the third embodiment.
  • abnormality detecting unit 170 shown in FIG. 1 of the first embodiment is replaced with an abnormality detecting unit 170 B.
  • a resistor R 10 and a capacitor C 10 provided outside of the drive circuit and connected in series are connected to oscillation circuit 190 .
  • drive circuit 100 B receives a power-saving signal PS as an activation signal from outside.
  • a power-saving signal PS turned ON (high level)
  • drive circuit 100 B attains an operable state with supply of power to each circuit provided in drive circuit 100 B.
  • power-saving signal PS is turned OFF (low level)
  • drive circuit 100 B attains a stand-by state, and an output of the excitation current to stepping motor 200 is stopped.
  • Logic circuit 141 of channel CH 1 receives a phase signal PHA 1 indicating a polarity of excitation current IOUT 1 , output signal CLOUT 1 of comparator 131 , and enable signal ENB. Then, logic circuit 141 generates a drive signal with use of these signals and a control signal PWM set by the PWM controller in accordance with oscillation signal OSC from oscillation circuit 190 .
  • Enable signal ENB is a signal for enabling logic controller 140 (logic circuits 141 , 142 ). Turning enable signal ENB ON (high level) allows logic controller 140 to be enabled. Driving transistors included in H-bridges 161 , 162 allow the excitation current to be supplied from drive circuit 100 B to stepping motor 200 . On the other hand, turning enable signal ENB OFF (low level) allows logic controller 140 to be disabled, and the supply of the excitation circuit from drive circuit 100 B to stepping motor 200 is stopped.
  • Resistor R 10 and capacitor C 10 connected in parallel are connected to oscillation circuit 190 .
  • the parallel circuit of resistor R 10 and capacitor C 10 determines a cycle of the chopping operation described later with reference to FIG. 10 .
  • Abnormality detecting unit 170 B receives phase signals PHA 1 , PHA 2 respectively indicating polarities of excitation currents IOUT 1 , IOUT 2 , output signals CLOUT 1 , CLOUT 2 of comparators 131 , 132 , oscillation signal OSC from oscillation circuit 190 , enable signal ENB, and power-saving signal PS. Abnormality detecting unit 170 B executes an abnormality detection control for detecting whether or not an abnormality occurs in the wire for supplying excitation currents IOUT 1 , IOUT 2 from drive circuit 100 B to stepping motor 200 based on these information.
  • FIG. 9 represents a time chart showing a general output current in the case of the full-step mode as an example.
  • the horizontal axis denotes time, and the vertical axis denotes the states of phase signals PHA 1 , PHA 2 indicating polarities of the excitation currents, the states of control signals I 01 , I 11 , I 02 , I 12 determining a voltage division ratio of the target voltage, and the states of excitation currents IOUT 1 , IOUT 2 .
  • the case of the full-step mode will be described as an example.
  • control can be applied also in the half-step mode of controlling the state of each control signal I 01 , I 11 , I 02 , I 12 for a time which is one-half of the 1 ⁇ 4 cycle (in other words, 1 ⁇ 8 cycle) where the combination state of the polarities of excitation currents IOUT 1 , IOUT 2 is changed, or in the quarter-step mode of controlling the state of each control signal I 01 , I 11 , I 02 , I 12 for a time which is yet 1 ⁇ 4 of the 1 ⁇ 4 cycle (in other words, 1/16 cycle) where the combination state of the polarities of excitation currents IOUT 1 , IOUT 2 is changed.
  • control signals I 01 , I 11 , I 02 , I 12 are always maintained at the low level (Lo), and excitation currents IOUT 1 , IOUT 2 are synchronized respectively with phase signals PHA 1 , PHA 2 and switched in a rectangular waveform between the state of +100% and the state of ⁇ 100%.
  • excitation current IOUT 1 a falling edge of phase signal PHA 1 from the high level to the low level at time t 41 causes excitation current IOUT 1 to be switched from +100% to ⁇ 100%, and a rising edge of phase signal PHA 1 from the low level to the high level at time t 43 causes excitation current IOUT 1 to be switched from ⁇ 100% to +100%.
  • excitation current IOUT 2 As to excitation current IOUT 2 , there is a phase difference of 90° with excitation current IOUT 1 as described above. Therefore, excitation current IOUT 2 switches from +100% to ⁇ 100% at time t 42 , and excitation current IOUT 2 switches from ⁇ 100% to +100%.
  • the excitation current of the intermediate level is used to supply an excitation current closer to the sine wave than the full-step mode of FIG. 9 .
  • FIG. 10 is a drawing for describing more in detail the state of excitation current IOUT 1 from time 0 to time t 41 in FIG. 9 .
  • the horizontal axis denotes time
  • the vertical axis denotes excitation current IOUT, voltage RNF indicating excitation current IOUT, oscillation signal OSC, and output signal CLOUT.
  • each signal of channels CH 1 , CH 2 will be collectively referred.
  • IOUT 1 and IOUT 2 are collectively referred to as “IOUT” or the like.
  • each channel is controlled using the feedback loop shown in FIG. 8 so that output current IOUT reaches target current IREF.
  • Oscillation signal OSC is changed to have a triangular wave form between an electric potential VCRH and an electric potential VCRL by the parallel circuit of resistor R 10 and capacitor C 10 shown in FIG. 8 . More particularly, when oscillation signal OSC attains electric potential VCRL, capacitor C 10 of the parallel circuit is charged, so that oscillation signal OSC increases to electric potential VCRH. When oscillation signal OSC reaches electric potential VCRH, charging of capacitor C 10 is stopped, so that electric load stored in capacitor C 10 is discharged by resistor R 10 . When the electric potential of oscillation signal OSC is lowered to electric potential VCRL by this discharging, capacitor C 10 is charged again.
  • resistor R 10 and capacitor C 10 of the parallel circuit determines a chopping cycle TCH of current control circuit 130 .
  • output signal CLOUT is turned ON, and logic controller 140 and pre-driver unit 150 allows driving of the transistors of the H-bridges to start, so that excitation current IOUT increases. This causes voltage RNF to increase.
  • output signal CLOUT When voltage RNF has not reached target voltage VA, output signal CLOUT remains in the ON state, and supply of excitation current IOUT is continued. Then, when voltage RNF has reached target voltage VA, in other words, when output current IOUT has reached target current IREF, output signal CLOUT from the comparator is turned OFF (time t 51 , t 53 , t 55 , t 57 ).
  • the value of target current IREF is changed by phase signal PHA indicating the polarity of excitation current IOUT and control signals I 01 , I 02 , I 11 , I 12 in the state where power-saving signal PS and enable signal ENB are in the ON state.
  • the chopping operation as described above is always repeated at short chopping cycle TCH, so that output current IOUT is controlled to attain predetermined target current IREF.
  • an abnormality of the path for supplying the excitation current is detected by detecting whether or not excitation current IOUT has reached the current limit, in other words, whether or not output signal CLOUT has been changed from ON to OFF.
  • FIG. 11 represents a functional block diagram for describing the abnormality detection control executed by abnormality detecting unit 170 B in the third embodiment. Each functional block shown in the functional block diagram of FIG. 11 is achieved by hardware or software processing executed by abnormality detecting unit 170 B.
  • abnormality detecting unit 170 B includes a current limit detector 171 B, a determination unit 172 B, and a malfunction preventing unit 173 B.
  • Current limit detector 171 B receives oscillation signal OSC from oscillation circuit 190 and output signal CLOUT from the comparator. As to output signal CLOUT, current limit detector 171 B determines whether or not output signal CLOUT has been changed from ON to OFF, in other words, whether output signal CLOUT has reached target voltage VA and excitation current IOUT has reached the current limit value corresponding to target voltage VA during each chopping cycle described with reference to FIG. 10 .
  • current limit detector 171 B sets detection signal CLD to be OFF. On the other hand, when output signal CLOUT remains being ON during the predetermined period, detection signal CLD is set to be ON. Then, current limit detector 171 B outputs detection signal CLD to determination unit 172 B.
  • Determination unit 172 B receives detection signal CLD from current limit detector 171 B, phase signal PHA, enable signal ENB, and power-saving signal PS. For example, determination unit 172 B counts the number of the OFF states of detection signal CLD during a predetermined period with constant target current IREF determined based on a rising or falling edge of phase signal PHA.
  • determination unit 172 B When the number of OFF state of detection signal CLD does not reach a predetermined number of times during the predetermined period, determination unit 172 B assumes that there is a possibility of occurrence of abnormality in the wire of the channel and sets abnormality flag DET of the corresponding channel to be ON. When the number of OFF states of detection signal CLD is more than the predetermined times, the wire is determined as being normal, and abnormality flag DET is set to be OFF. Then, determination unit 172 B outputs abnormality flag DET to malfunction preventing unit 173 B.
  • Switching of the PHA signal is performed only when stepping motor 200 is actually driven (rotated). Therefore, when the determination is made based only on the timing of switching of phase signal PHA, an abnormality in the wire cannot be determined in the state where stepping motor 200 is stopped. Consequently, it is preferable to make determination of the abnormality of the wire also during the period determined based on the timing of the ON state of power-saving signal PS and the ON state of enable signal ENB, in other words, the timing at which the excitation current is supplied from drive circuit 100 B to stepping motor 200 , in addition to the timing of switching phase signal PHA. Further, when the switching of the PHA signal is not performed for a certain period, determination of the abnormality may be performed at predetermined time intervals.
  • Malfunction preventing unit 173 B exhibits a function for preventing an effect of erroneous detection in the case where, for example, determination unit 172 B temporarily determines an abnormality due to delays in rising of the excitation current or effect of noises by operation state of stepping motor 200 even though no abnormality is present in the wire.
  • Malfunction preventing unit 173 B receives abnormality flag DET from determination unit 172 B, and phase signal PHA. Malfunction preventing unit 173 B determines whether or not abnormality flag DET is set to be ON successively by determination unit 172 B at a cycle of successive predetermined number of times (for example, 3 times) of phase signal PHA. Then, when it is detected that abnormality flag DET is set to be ON successively for a predetermined times, malfunction preventing unit 173 B settles occurrence of an abnormality in the wire and outputs abnormality signal ALM in response. This abnormality signal ALM is received by an abnormality notifying unit provided outside or inside of drive circuit 100 B, so that occurrence of an abnormality is notified to a user.
  • an abnormality notifying unit provided outside or inside of drive circuit 100 B, so that occurrence of an abnormality is notified to a user.
  • occurrence of the abnormality in the wire may be settled in the case where abnormality flag DET determined at predetermined time intervals indicates the abnormal state successively for a predetermined number of times.
  • FIG. 12 represents a flowchart for describing details of the abnormality detection control processing executed by abnormality detecting unit 170 B in the third embodiment.
  • a program stored in advance in the CPU is invoked from a main routine and executed at predetermined cycles to thereby achieve the processing.
  • the processing can be achieved by dedicated hardware (electronic circuit).
  • abnormality detecting unit 170 B obtains, in Step (in the following, the term “step” will be abbreviated as “S”) 200 , output signal CLOUT from the comparator. Then, in S 210 , abnormality detecting unit 170 B determines whether or not a falling edge of output signal CLOUT from ON to OFF is detected, in other words, whether or not excitation current IOUT has reached the current limit.
  • abnormality detecting unit 170 B sets, in S 220 , detection signal CLD of the channel to be ON. After that, the processing proceeds to S 230 .
  • abnormality detecting unit 170 B determines whether or not it is during a predetermined detection period determined based on phase signal PHA or power-saving signal PS and enable signal ENB.
  • abnormality detecting unit 170 B terminates the processing, and the processing returns to the main routine.
  • abnormality detecting unit 170 B counts up the number CNT of the ON states of detection signal CLD during the detection period. Then, abnormality detecting unit 170 B determines, in S 250 , whether or not the number CNT of the ON states of detection signal CLD is greater than a predetermined threshold value ⁇ at the end of the detection period.
  • abnormality detecting unit 170 B determines that there is no occurrence of an abnormality on the current output path. Then, the processing is terminated and returns to the main routine.
  • abnormality detecting unit 170 B determines, in S 270 , whether or not this abnormality flag DET was detected successively for a predetermined number of times (n times: n is a natural number).
  • abnormality detecting unit 170 B determines that there is a high possibility of erroneous detection of the abnormal state.
  • abnormality flag DET When abnormality flag DET has been detected for the “n” number of times (YES in S 270 ), the processing proceeds to S 280 , and abnormality detecting unit 170 B settles that there is occurrence of a wire abnormality. Then, abnormality detecting unit 170 B outputs abnormality signal ALM in S 290 .
  • an abnormality of the wire for supplying the excitation current to the stepping motor can be detected in the drive circuit of the stepping motor.
  • drive circuit 100 B of the stepping motor in accordance with the third embodiment the configuration of providing phase signals PHA 1 , PHA 2 and control signals I 01 , I 11 , I 02 , I 12 from outside of drive circuit 100 B was described. However, similarly to the second embodiment, these control signals may be generated inside the drive circuit.
  • FIG. 13 represents an overall block diagram of motor driving system 10 C including a drive circuit 100 C of the stepping motor in accordance with the fourth embodiment.
  • FIG. 13 has a configuration that an instruction generating unit 115 C is added to drive circuit 100 B described with reference to FIG. 8 of the third embodiment. In FIG. 13 , description as to the elements overlapping with FIG. 8 will not be repeated.
  • drive circuit 100 C further includes instruction generating unit 115 C in addition to the configuration of drive circuit 100 B shown in FIG. 8 .
  • Instruction generating unit 115 C receives, from outside of the circuit, reference clock signal CLK, control mode signal MOD, a signal CW_CCW indicating a direction of rotation, and an enable signal ENB.
  • Control mode signal MOD is a signal for determining which of the full-step mode, the half-step mode, and the quarter-step mode is to be selected.
  • Instruction generating unit 115 C generates phase signals PHA 1 , PHA 2 based on these information and outputs the same to logic controller 140 and abnormality detecting unit 170 B. Further, instruction generating unit 115 C generates control signals I 01 , I 11 , I 02 , I 12 and outputs the same to D/A converter 120 .
  • the configuration of providing the instruction generating unit inside the drive circuit as shown in FIG. 13 eliminates the necessity of providing additional circuit having a function corresponding to the instruction generating unit outside of the drive circuit. Therefore, there is an advantage that it can be applied for more applications.
  • the abnormality detection control similar to that of the third embodiment can be applied.
  • FIG. 14 represents an overall block diagram of a motor driving system 10 D including a drive circuit 100 D of the stepping motor in accordance with the fifth embodiment.
  • FIG. 14 shows the configuration that comparators 131 #, 132 # are added to drive circuit 100 B described with reference to FIG. 8 of the third embodiment. In FIG. 14 , description as to the elements overlapping with FIG. 8 will not be repeated.
  • drive circuit 100 D further includes comparators 131 #, 132 # in addition to the configuration of drive circuit 100 B shown in FIG. 8 .
  • Comparator 131 # compares a voltage of a reference voltage source B 1 and voltage RNF 1 indicating excitation current IOUT 1 and generates an output signal CLOUT 1 # indicating a result of comparison. When voltage RNF 1 has reached a reference voltage, comparator 131 # sets output signal CLOUT 1 # to be OFF. When voltage RNF 1 has not reached the reference voltage, comparator 131 # sets output signal CLOUT 1 # to be ON. Comparator 131 # outputs output signal CLOUT 1 # to abnormality detecting unit 170 B.
  • Comparator 132 # compares a voltage of a reference voltage source B 2 and voltage RNF 2 indicating excitation current IOUT 2 and generates an output signal CLOUT 2 # indicating a result of comparison. When voltage RNF 2 has reached the reference voltage, comparator 132 # sets output signal CLOUT 2 # to be OFF. When voltage RNF 2 has not reached the reference voltage, comparator 132 # sets output signal CLOUT 2 # to be ON. Comparator 132 # outputs output signal CLOUT 2 # to abnormality detecting unit 170 B.
  • the voltages of reference voltage sources B 1 , B 2 is set to be less than target voltage VA.
  • the voltages of reference voltage sources B 1 , B 2 are set based on, for example, a minimum set current value of stepping motor 200 determined depending on a use application. More preferably, the reference voltage is set to be a value less than the minimum set current value. As an example, when a use current range of stepping motor 200 is 100 mA-1 A (in other words, the minimum set current value is 100 mA), the reference voltage is set to be a value corresponding to a current value of 30-50 mA.
  • Abnormality detecting unit 170 B receives output signals CLOUT 1 #, CLOUT 2 # from comparators 131 #, 132 #. Abnormality detecting unit 170 B detects the number of times of OFF states of output signals CLOUT 1 #, CLOUT 2 # within a predetermined period similarly to the case of the third embodiment to detect an abnormality of the wire for supplying the excitation current.
  • FIG. 15 represents a time chart corresponding to FIG. 10 of the third embodiment.
  • output signal CLOUT in FIG. 10 is replaced with an output signal CLOUT# (hereinafter, output signals CLOUT 1 #, CLOUT 2 # will be collectively referred to as “CLOUT#”).
  • output signal CLOUT# is switched from ON to OFF when voltage RNF has reached reference voltage VB lower than target voltage VA (time t 61 , t 64 , t 67 , t 70 ).
  • FIG. 16 is a flowchart for describing the abnormality detection control processing executed by abnormality detecting unit 170 B in the fifth embodiment.
  • Steps S 200 , S 201 shown in FIG. 12 of the third embodiment are replaced with S 200 #, S 210 #, and detection signal CLD is set (S 220 ) based on output signals CLOUT 1 #, CLOUT 2 # from comparators 131 #, 132 # in place of output signals CLOUT 1 , CLOUT 2 from comparators 131 , 132 .
  • the processing subsequent to S 220 is the same as those described with reference to FIG. 12 . Therefore, description will not be repeated.
  • the fifth embodiment may also have the configuration of providing the instruction generating unit inside the drive circuit like the fourth embodiment.
  • the drive circuits shown in the first to fifth embodiments may have a configuration of constructing a circuit included therein and a part or all of the function with use of individual electronic equipment, or may have a configuration of constructing a whole circuit as an integrated circuit totally integrating these circuits.

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  • Control Of Stepping Motors (AREA)
US13/981,391 2011-01-25 2012-01-23 Drive circuit of stepping motor, integrated circuit thereof, and electronic equipment including same, and method for controlling drive circuit of stepping motor Expired - Fee Related US9654040B2 (en)

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JP2011-012839 2011-01-25
JP2011012839A JP5785718B2 (ja) 2011-01-25 2011-01-25 ステッピングモータの駆動回路、その集積回路およびそれを備える電子機器
JP2011085361A JP5835923B2 (ja) 2011-04-07 2011-04-07 ステッピングモータの駆動回路および集積回路
JP2011-085361 2011-04-07
PCT/JP2012/051325 WO2012102232A1 (fr) 2011-01-25 2012-01-23 Circuit d'entraînement pour un moteur pas à pas, son circuit intégré et dispositif électronique le comprenant, et procédé de commande pour un circuit d'entraînement de moteur pas à pas

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11381184B2 (en) * 2019-02-15 2022-07-05 Rohm Co., Ltd. Driving circuit for stepping motor, method of driving stepping motor, and electronic device using the same
US20230198433A1 (en) * 2020-06-25 2023-06-22 Panasonic Intellectual Property Management Co., Ltd. Stepping motor abnormality detecting device

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6384201B2 (ja) 2014-08-28 2018-09-05 セイコーエプソン株式会社 集積回路装置及び電子機器
WO2016147511A1 (fr) * 2015-03-19 2016-09-22 三菱電機株式会社 Dispositif de commande de moteur pas-à-pas, et épurateur d'air incorporant un moteur pas-à-pas
JP6641794B2 (ja) 2015-08-28 2020-02-05 株式会社リコー モータ駆動装置、モータ制御装置、搬送装置及びモータ駆動方法
CN105553357B (zh) * 2015-12-10 2019-01-01 中国航空工业集团公司西安航空计算技术研究所 一种固定占空比步进电机恒流驱动系统及方法
EP3291438B1 (fr) * 2016-08-30 2021-11-10 Valeo Klimasysteme GmbH Procédé de détection de blocage d'un moteur pas à pas électrique, moteur pas à pas électrique et dispositif de chauffage, de ventilation et/ou un système de climatisation comprenant un moteur pas à pas électrique
RU173260U1 (ru) * 2016-12-19 2017-08-21 Федеральное государственное автономное образовательное учреждение высшего образования "Крымский федеральный университет имени В.И. Вернадского" Устройство для обнаружения отказов в шаговом электроприводе
JP6826075B2 (ja) * 2018-07-03 2021-02-03 ミネベアミツミ株式会社 モータ駆動制御装置及びモータ駆動制御装置の制御方法
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JP7224204B2 (ja) * 2019-02-26 2023-02-17 ローム株式会社 ステッピングモータの駆動回路、それを用いた電子機器
DE112020004991T5 (de) * 2019-10-15 2022-07-14 Ngk Spark Plug Co., Ltd. Sensorsystem und Sensorsystemfehlererfassungsverfahren
JP7549000B2 (ja) * 2020-03-27 2024-09-10 ローム株式会社 ドライバ装置
ES3034239T3 (en) * 2020-08-28 2025-08-14 Panasonic Ip Man Co Ltd Stepping motor abnormality detecting device
DE102022134623A1 (de) * 2022-12-22 2024-06-27 Middex - Electronic GmbH System zur Zustandsüberwachung eines elektrischen Motors
CN116604954B (zh) * 2023-04-25 2024-02-23 珠海芯烨电子科技有限公司 一种用于热敏打印机步进电机的控制方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4748954A (en) * 1984-07-16 1988-06-07 Nippon Soken, Inc. Electrostrictive actuator device and fuel injection device using same
JPH02184296A (ja) 1989-01-09 1990-07-18 Asmo Co Ltd ステップモータの異常検出装置
JPH04261396A (ja) 1991-02-14 1992-09-17 Nippondenso Co Ltd ステッピングモータの異常監視装置
US5182507A (en) * 1990-08-09 1993-01-26 Honda Giken Kogyo K.K. Stepping motor driving circuit having failsafe function
US5994790A (en) * 1997-04-04 1999-11-30 Yazaki Corporation Method of detecting abnormal electric current in vehicle apparatus for detecting abnormal electric current in vehicle and power supply apparatus for vehicle
US20070252547A1 (en) * 2006-05-01 2007-11-01 Mitsubishi Electric Corporation Motor control apparatus
JP2008029145A (ja) 2006-07-24 2008-02-07 Rohm Co Ltd ステッピングモータの駆動回路および電子機器
US20120185149A1 (en) * 2009-09-28 2012-07-19 Keihin Corporation Control apparatus of internal combustion engine

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1127991A (ja) * 1997-07-07 1999-01-29 Canon Inc 画像形成装置
JP3938920B2 (ja) * 2004-04-02 2007-06-27 日本サーボ株式会社 ステッピングモータの制御装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4748954A (en) * 1984-07-16 1988-06-07 Nippon Soken, Inc. Electrostrictive actuator device and fuel injection device using same
JPH02184296A (ja) 1989-01-09 1990-07-18 Asmo Co Ltd ステップモータの異常検出装置
US5182507A (en) * 1990-08-09 1993-01-26 Honda Giken Kogyo K.K. Stepping motor driving circuit having failsafe function
JPH04261396A (ja) 1991-02-14 1992-09-17 Nippondenso Co Ltd ステッピングモータの異常監視装置
US5994790A (en) * 1997-04-04 1999-11-30 Yazaki Corporation Method of detecting abnormal electric current in vehicle apparatus for detecting abnormal electric current in vehicle and power supply apparatus for vehicle
US20070252547A1 (en) * 2006-05-01 2007-11-01 Mitsubishi Electric Corporation Motor control apparatus
JP2008029145A (ja) 2006-07-24 2008-02-07 Rohm Co Ltd ステッピングモータの駆動回路および電子機器
US20120185149A1 (en) * 2009-09-28 2012-07-19 Keihin Corporation Control apparatus of internal combustion engine

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Japanese Patent Office, International Search Report for PCT/JP2012/051325 (Apr. 10, 2012).

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11381184B2 (en) * 2019-02-15 2022-07-05 Rohm Co., Ltd. Driving circuit for stepping motor, method of driving stepping motor, and electronic device using the same
US20230198433A1 (en) * 2020-06-25 2023-06-22 Panasonic Intellectual Property Management Co., Ltd. Stepping motor abnormality detecting device
US12132436B2 (en) * 2020-06-25 2024-10-29 Panasonic Intellectual Property Management Co., Ltd. Stepping motor abnormality detecting device

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