WO2002015397A2 - Amplificateur a grande linearite et adaptation d'impedance comportant un mode de derivation a faible perte - Google Patents

Amplificateur a grande linearite et adaptation d'impedance comportant un mode de derivation a faible perte Download PDF

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Publication number
WO2002015397A2
WO2002015397A2 PCT/US2001/025669 US0125669W WO0215397A2 WO 2002015397 A2 WO2002015397 A2 WO 2002015397A2 US 0125669 W US0125669 W US 0125669W WO 0215397 A2 WO0215397 A2 WO 0215397A2
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Prior art keywords
region
transistor
coupled
diode
switchable
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WO2002015397A3 (fr
Inventor
Sheng-Hann Lee
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Maxim Integrated Products Inc
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Maxim Integrated Products Inc
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/108—A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/156—One or more switches are realised in the feedback circuit of the amplifier stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/249—A switch coupled in the input circuit of an amplifier being controlled by a circuit, e.g. feedback circuitry being controlling the switch
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/414—A switch being coupled in the output circuit of an amplifier to switch the output on/off
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/492—A coil being added in the source circuit of a transistor amplifier stage as degenerating element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7203—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by a switch in the bias circuit of the amplifier controlling a bias current in the amplifier

Definitions

  • the invention relates to electronic circuits.
  • the invention relates to radio frequency amplifiers with high linearity.
  • a low noise amplifier In a typical radio, signals received by an antenna are fed to a low noise amplifier (LNA) in order to amplify the received signal and thus improve the radio's receiving sensitivity.
  • LNA low noise amplifier
  • Radios to be used with the communication standard known as Code-Division-Multiple-Access (CDMA) present some additional challenges. For instance, as is well known in the art, a LNA to be used in CDMA systems must have a high sensitivity. In order to achieve the high sensitivity required, the LNA must provide high gain for receiving weak signals, while also maintaining high linearity. But when a LNA operates with high gain, interfering signals, including the radio's own transmitted signal, may cause the LNA to operate outside of its linear range, thus reducing the radio's sensitivity.
  • a LNA must typically be biased with a high direct current (DC) bias current.
  • DC direct current
  • CDMA radios are usually powered with batteries.
  • the high bias current required by the LNA reduces battery life and time between recharging, which are often critical design criteria in mobile radios.
  • Fig. 1 illustrates a portion of the transmit and receive paths of a typical CDMA radio.
  • An antenna 101 both receives and transmits radio frequency (RF) signals for the CDMA radio, and is coupled to a filter 103, which is in turn coupled to a duplexer 105.
  • CDMA is a full-duplex communications protocol, and the duplexer 105 is employed to prevent the radio's transmit signals from interfering with the received signals and overloading the receiver.
  • the duplexer 105 operates in a manner well known in the art to isolate the radio's receive path from its transmit path.
  • the received signal output of the duplexer 105 is fed to the LNA 107.
  • the isolation performance of a duplexer is dependent upon proper impedance matching between the output impedance of the duplexer 105 and the input impedance of the LNA 107.
  • manufacturers of duplexers often specify a range in which the input impedance of an interfacing circuit must fall in order to guarantee a specified isolation performance. If the input impedance of the interfacing circuit falls outside of this range, the performance of the duplexer is degraded. Therefore, when the input impedance of the LNA 107 is not adequately matched with the output impedance of the duplexer 105, more transmit signal is leaked into the receive path, degrading the performance of the receiver.
  • the output of the LNA 107 is fed to an image rejection filter 109 which filters the received signal in a well known manner.
  • the performance of the image rejection filter (IRF) 109 is dependent upon proper impedance matching between the output impedance of the LNA 107 and the input impedance of the IRF 109.
  • improper matching of the LNA's output impedance will also degrade the performance of the receiver.
  • Fig. 2 illustrates one prior attempt to address some of the above discussed problems.
  • the amplification circuit 120 of Fig. 2 may be switched between two gain modes as will be discussed below. By switching the amplifier 120 into a lower-gain mode, non-linearity caused by interfering signals is reduced and less power is consumed. When switch SI is open, the amplifier is in a high gain mode. In the high gain mode, inductor LI and capacitor Cl act to transform the input impedance of the amplifier circuit 120 such that Z IN approximates impedance R s of the duplexer 105 (the duplexer 105 is represented in Fig. 2 as signal source 125 in series- with resistor Rs).
  • L2 and C2 act to transform the output impedance of the amplifier circuit 120 such that ZOUT approximates impedance R L of the image rejection filter 109 (the image rejection filter 109 is represented in Fig. 2 as resistor R L ).
  • the gain of the amplifier circuit 120 in high-gain mode is determined, in part, by the value of inductor L E . hi general, as LE is increased, the gain of the amplifier is decreased.
  • the amplification circuit 120 is switched into lower-gain mode by closing switch SI.
  • SI When SI is closed, the shunt feedback capacitor C3 is included in the circuit.
  • Shunt capacitor C3 acts to reduce the gain of the amplification circuit.
  • shunt capacitor C3 also affects the input impedance Zr ⁇ .
  • input impedance Z ⁇ N must approximate R s in order for duplexer 105 to perform optimally. Therefore, the value of C3 is constrained by its effect on the input impedance Z ⁇ .
  • increasing the value of LE generally increases the input impedance of the circuit.
  • L E could be increased in order to offset the decrease in input impedance caused by C3.
  • increasing the value of L E tends to lower the gain of the circuit in high gain mode, and thus LE is also constrained. Therefore, the circuit of Fig. 2 may achieve only a limited reduction of gain in its low-gain mode without adversely affecting either the impedance match with the duplexer 105 or the gain of the circuit in high-gain mode. Additionally, the circuit 120 achieves only a modest reduction in power consumption in its low-gain mode.
  • Fig. 3 illustrates an improvement to the amplification circuit 120 of Fig. 2.
  • circuit 140 provides four different gain modes as will be discussed below. The additional gain modes may be of lower gain than is achievable with the circuit of Fig. 2.
  • the amplification circuit 140 basically comprises two amplification circuits, labeled 141 and 145, that each operate in a manner similar to the circuit of Fig. 2.
  • Cl and LI act to match Z IN with Rs
  • L2 and C2 act to match Z OUT with L .
  • Switches S2 and S4 are used to select which of amplification circuits 141 and 145 is active.
  • Switches SI and S3 operate in a manner similar to the switch SI of Fig.
  • amplification circuit 141 When switch S4 is closed and switches SI, S2, and S3 are opened, amplification circuit 141 is biased off and amplification circuit 145 becomes active.
  • the value of inductor L4 is chosen such that the gain of amplifier 145 in its high-gain mode is lower than that provided by either of the modes of amplification circuit 141.
  • shunt feedback capacitor C4 is switched into the circuit and the gain is further reduced without adversely affecting the input impedance match.
  • the circuit 140 provides two additional lower gain levels while still providing an acceptable input impedance match. However, this circuit provides only a modest reduction in power usage.
  • a switchable gain amplifier comprising an input, an output, and a first transistor having a control region, a first region, and a second region, the conduction from the first region to the second region of the first transistor being responsive to the voltage on the control region relative to the second region.
  • the amplifier also comprises an input impedance matching network coupled with the input and the control region and an output impedance matching network coupled with the output and the first region.
  • the amplifier further comprises a first switchable biasing circuit coupled with the control region to switchably bias the transistor between an on state and an off state, and a passive bypass network coupled with the input impedance matching network and the output impedance matching network.
  • the passive bypass network has a first switch to switchably couple the input impedance matching network with the output impedance matching network through the passive bypass network.
  • a method of amplifying an input signal includes providing an amplification circuit including an amplifying transistor and a passive bypass network. The method also includes biasing the amplifying transistor into an ON state and isolating the passive bypass network from the amplification circuit to configure the amplification circuit in an amplifier mode, wherein in the amplifier mode, an input impedance of the amplification circuit is substantially matched with a source impedance and an output impedance of the amplification circuit is substantially matched with a load impedance. The method further includes inputting the input signal to the amplification circuit in the amplifier mode to form a high-gain amplified output signal.
  • the method also includes biasing the amplifying transistor into an OFF state and coupling the passive bypass network into the amplification circuit to configure the amplification circuit in a bypass mode, wherein in the bypass mode, the input impedance of the amplification circuit is substantially matched with the source impedance and the output impedance of the amplification circuit is substantially matched with the load impedance.
  • the method still further includes inputting the input signal to the amplification circuit in the bypass mode to form a low-gain amplified output signal.
  • a switch is provided for switchably coupling an input with an output.
  • the switch comprises a first diode having an anode coupled with the output and a cathode coupled with the input.
  • the switch also comprises a second diode having an anode coupled with the input and a cathode.
  • the switch further comprises a first capacitor coupled with the anode of the first diode and the cathode of the second diode.
  • the switch still further comprises a switchable current source coupled in series with the first diode and the second diode to switchably supply a bias current through the first diode and the second diode.
  • a method of switchably coupling an input with an output includes providing a switch comprising a first diode having an anode coupled with the output and a cathode coupled with the input, a second diode having an anode coupled with the input and a cathode, a first capacitor coupled with the anode of the first diode and the cathode of the second diode, and a switchable current source coupled in series with the first diode and the second diode to switchably supply a bias current through the first diode and the second diode.
  • the method also includes switching the switchable current source to an ON state to couple the input with the output, and switching the switchable current source to an OFF state to isolate the input from the output.
  • Benefits of embodiments of the present invention include providing a switchable gain amplifier with increased linearity and decreased losses. Other benefits include providing a switchable gain amplifier having a lower gain in its low-gain mode while still maintaining impedance match. Further benefits include providing a switchable gain amplifier with lower power consumption. Still other benefits include providing a switch with improved linearity, improved isolation, and reduced losses.
  • Fig. 1 illustrates a portion of a transmit path and a receive path of a typical Code-Division-Multiple- Access (CDMA) radio;
  • CDMA Code-Division-Multiple- Access
  • Fig. 2 is a simplified circuit diagram of a prior art switchable gain amplifier
  • Fig. 3 is a simplified circuit diagram of another prior art switchable gain amplifier
  • Fig. 4 is a simplified circuit diagram of an embodiment of a switchable gain amplifier according to the invention
  • Fig. 5 is a simplified alternating current (AC) equivalent circuit of the switchable gain amphfier embodiment of Fig. 4 in an amplifier mode;
  • AC alternating current
  • Fig. 6 is a simplified AC equivalent circuit of the switchable gain amplifier embodiment of Fig. 4 in a bypass mode
  • Fig. 7 is a simplified circuit diagram of another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 8 is a simplified circuit diagram of yet another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 9 is a simplified circuit diagram of still another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 10 is a simplified circuit diagram of yet another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 11 is a simplified circuit diagram of still another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 12 is a simplified AC equivalent circuit of an embodiment of a switch according to an aspect of the invention.
  • Fig. 13 is a simplified circuit diagram of another embodiment of a switchable gain amplifier according to the invention.
  • Fig. 14 is a simplified circuit diagram of another embodiment of a switch according to an aspect of the invention.
  • FIG. 4 is a simplified circuit schematic that illustrates an embodiment of a switchable-gain amplifier according to the invention.
  • An amplifier 200 is switchable between a gain mode and a bypass mode. In the gain mode, the amplifier 200 is matched with a source impedance and a load impedance, and operates in a typical manner to amplify the input signal. However, when high gain is not required, the amplifier 200 may be switched into a bypass mode. In the bypass mode, the transistor is biased off, and the input signal is routed through a passive bypass network that comprises only passive components. The passive bypass network maintains impedance matching with the source and load impedances in the bypass mode.
  • the invention differs from the circuits illustrated in Figs.
  • the passive bypass network is not a feedback circuit. Rather, the passive bypass network acts to redirect the signal around the inactivated transistor.
  • the present invention provides several advantages over amplifiers such as those shown in Figs. 2 and 3. For example, the present invention provides improved linearity and decreased losses because, in the bypass mode, the signal is not routed through a transistor. Rather, the signal passes through a passive-only network, which exhibits very high linearity and low loss. Also, the present invention provides a significant reduction in gain in its bypass mode while maintaining proper impedance matching with the source impedance and the load impedance. Additionally, because the transistor is biased off in bypass mode, the amplifier 200 consumes only a fraction of the power required in gain mode, thus improving battery life and time between recharging in battery-powered devices.
  • a signal source having an impedance Rs is coupled with an input impedance matching network 203 of the amplifier circuit 200 through a coupling capacitor Co
  • the input impedance matching network 203 is in turn coupled to the base of a transistor Tl.
  • the emitter of the transistor Tl is coupled with ground through an emitter inductor LE-
  • the collector of the transistor Tl is coupled with Vcc through inductor L2.
  • the collector of transistor Tl is also coupled with a capacitor C2 which is in turn coupled with a load R L .
  • An output impedance matching network 205 comprises inductor L2 and C2.
  • a switchable biasing circuit 207 coupled with the base of transistor Tl comprises switch SI and current source 209, and switchably biases transistor Tl between an ON state and an OFF state, as will be discussed below.
  • the amplifier circuit 200 includes a passive bypass network 211 coupled with the input impedance matching network 203 and the output impedance matching network 205.
  • the passive bypass network 211 includes a bypass capacitor C3 coupled in series with a switch S2, and a bypass inductor L3 coupled in series with a switch S3.
  • the amplifier 200 has an input impedance ZIN and an output impedance ZOUT-
  • switch SI is closed and switches S2 and S3 are opened.
  • current source 209 supplies a current to a base of transistor Tl, which in turn causes a bias current to flow into a collector of the transistor Tl.
  • the amount of current supplied by current source 209 is chosen such that transistor Tl operates in the gain mode with the requisite linearity.
  • switches S2 and S3 are opened, capacitor C3 and inductor L3 are effectively isolated from the circuit.
  • the gain of the circuit 200 in gain mode is set in a manner well known to those skilled in the art.
  • Fig. 5 is a simplified alternating current (AC) equivalent circuit of the circuit shown in Fig. 4 operating in its gain mode (e.g. inductor L E has been excluded for simplicity).
  • Fig. 5 illustrates impedance matching of the amplifier 200 in its gain mode.
  • Transistor Tl may be modeled as shown in Fig. 5, having a bias current-dependent input impedance ZT N, as e U as a bias current-dependent output impedance Z ⁇ ,ou ⁇ - Resistor R P represents combined bias current-independent parasitic losses of the transistor Tl and inductor L2.
  • Capacitor Cl and inductor LI comprise an input impedance matching network.
  • capacitor C2 and inductor L2 comprise an output impedance matching network.
  • the values of C2 and L2 are chosen in a well known manner to transform L to (Z ⁇ ,ou ⁇ II Rp) •
  • amplifier 200 may be put into a bypass mode.
  • switch SI is opened and switches S2 and S3 are closed.
  • the current from current source 209 is removed from the base of transistor Tl, causing the bias current into the collector of Tl to decrease to substantially zero.
  • transistor Tl is biased OFF and is effectively removed from the circuit.
  • switches S2 and S3 are closed, the bypass network 211 comprising bypass capacitor C3 and bypass inductor L3, is coupled into the amplifier circuit 200.
  • Fig. 6 is a simplified AC equivalent circuit of amplifier circuit 200 operating in its bypass mode. In the bypass mode, the input impedance matching network is coupled with the output impedance matching network via the bypass network.
  • the values of C3 and L3 are chosen in a well known manner to match R s and RL .
  • Fig. 7 illustrates another embodiment of the invention.
  • Amplifier circuit 250 is similar to the circuit 200 of Fig. 4, except that the passive bypass network 211 no longer includes inductor L3 nor switch S3.
  • Amplifier circuit 250 operates in the same manner as the circuit 200 of Fig. 4.
  • a perfect impedance match cannot be achieved because only the bypass capacitor C3 is available for impedance transformation. It has been found that an acceptable, though imperfect, impedance match may still be achieved with only the bypass capacitor C3.
  • the value of L2 may be reduced to a value where the output impedance match in the gain mode, though not ideal, is nevertheless acceptable, and where the impedance match in the bypass mode, though also not ideal, is also acceptable. This may be explained with reference to Fig.
  • Fig. 6 shows the simplified AC equivalent of circuit 200 in the bypass mode, which includes bypass inductor L3.
  • bypass inductor L3 is connected in parallel with inductor L2.
  • inductor L3 acts to reduce the value of the inductor L2.
  • circuit 250 provides a cost savings over the circuit 200 at the expense of less-than-ideal impedance matching.
  • circuit 250 eliminates inductor element L3.
  • inductors cannot easily be integrated onto an integrated circuit (IC) and are relatively expensive components.
  • FIG. 8 illustrates another embodiment of the invention.
  • a circuit 270 is similar to the circuit 250 of Fig. 7, except that passive bypass network 211 includes resistor R3 and switch S3 for improving impedance match in the bypass mode.
  • switch SI is closed during amplifier mode, and switches S2 and S3 are opened to isolate capacitor C3 and resistor R3 from the circuit.
  • circuit 270 operates in a similar manner to circuit 200 of Fig. 4 and circuit 250 of Fig. 7 in their respective amplifier modes.
  • switch SI is opened to remove transistor Tl from the circuit as discussed previously. Switches S2 and S3 are closed so that capacitor C3 and resistor R3 are included in the circuit.
  • the resistor R3 acts as a shunt attenuator in the bypass mode, and may provide an improvement in impedance match over the circuit 250 of Fig. 7 in a manner well known in the art. Although a perfect impedance match cannot be obtained using the resistor R3, using a resistor is less expensive than using inductor L3 of Fig. 4. Additionally, the resistor R3 may be easily integrated onto an IC with other components of the circuit 270, unlike the inductor L3 of Fig. 4. Resistor R3 does, however, increase the loss in the circuit 270 in bypass mode.
  • the loss introduced by R3 is acceptable because, as is well known in the art, signal loss is a nonlinear function of impedance match, and so the benefits resulting from the better impedance match easily outweighs the harm caused by the slightly increased loss.
  • the switchable biasing circuit 207 for biasing transistor Tl has been symbolically shown as the current source 211 coupled in series with switch SI .
  • the separate switch SI may be eliminated by using a switchable current source for current source 209.
  • the switchable biasing circuit 207 may comprise a switchable power source coupled in series with a resistor.
  • Switches S2 and S3 in Figs. 4, 7, and 8 should exhibit high linearity and low loss due to their position within the signal path in bypass mode.
  • the switches S2 and S3 may comprise metal oxide semiconductor (MOS) field effect transistors.
  • Fig. 9 illustrates another embodiment of the invention.
  • Fig. 9 shows a circuit 300, which is similar to the circuit 250 of Fig. 7, except that the switch S2 comprises a MOS transistor T2.
  • a control signal is coupled with a gate lead of a MOS transistor T2.
  • the control signal is brought to an ON voltage level, a channel between a drain and source of transistor T2 becomes conductive and capacitor C3 is effectively switched into the circuit 300.
  • the control signal is brought to an OFF voltage level, the drain and source of transistor T2 become electrically isolated from each other, and the capacitor C3 is effectively switched out of the circuit 300.
  • MOS transistors for switches S2 and S3 have several advantages. For instance, in a conductive state, the channel between the drain and source of a MOS transistor exhibits very good linearity. Also, a MOS transistor switch consumes substantially no power. However, it may be impractical to use a MOS transistor for switches S2 and S3 unless the amplifier circuit 300 is to be implemented using a BiCMOS fabrication process. Additionally, MOS transistors are relatively lossy as compared to bipolar transistors of approximately the same size. Thus, a switch comprising a MOS transistor may consume a relatively large amount of IC area in order to reduce loss to an acceptable level.
  • Fig. 10 illustrates yet another embodiment of the invention.
  • the switch S2 comprises a diode Dl coupled with a switchable current source 351.
  • an anode of Dl is coupled with the inductor L2, capacitor C2, and the collector oftransistor Tl.
  • the cathode of Dl is coupled with the capacitor C3.
  • Switchable current source 351 is coupled with the cathode of Dl. In operation, when the switchable current source 351 is switched ON, it draws a bias current through diode D 1. The bias current causes Dl to become conductive, and thus C3 is switched into the circuit 350.
  • the diode switch illustrated in Fig. 10 has a drawbac — its linearity.
  • the illustrated diode switch has relatively poor linearity because of two well known properties of diodes. First, the impedance of the diode is dependent upon the current through the diode. Second, the impedance of the diode Dl is not symmetrical as the current through the diode Dl swings about the bias current. The asymmetry of the impedance substantially degrades the linearity of the switch.
  • Fig. 11 illustrates still another embodiment of the invention that provides an improvement in linearity
  • a cathode of a diode Dl is coupled with capacitor C3, and an anode of diode Dl is coupled with inductor L2, capacitor C2, and the collector of transistor Tl.
  • An anode of a second diode D2 is coupled with the cathode of diode Dl, and a cathode of diode D2 is coupled with the switchable current source 351.
  • a coupling capacitor C4 is coupled between the anode of Dl and the cathode of D2. In operation, when the switchable current source 351 is switched ON, it draws a bias current through diodes Dl and D2.
  • the bias current causes diodes Dl and D2 to become conductive, and thus, C3 becomes coupled to the collector of Tl through two parallel paths.
  • the switchable current source 351 is switched OFF and the bias current no longer flows through diodes Dl and D2, their respective impedances become extremely high and capacitor C3 is isolated from the circuit 400.
  • Fig. 12 illustrates a simplified AC equivalent circuit of the switch S2 of Fig. 11. Because of the anode-to-cathode configuration of the diodes Dl and D2 in circuit 400, the effects of the current on each of their impedances tend to offset each other. For example, as the impedance of one diode begins to rise, the impedance of the other diode begins to fall. And, because the two diodes are connected in parallel, the change in the impedance of diode Dl with current tends to offset the change in the impedance of diode D2. Thus, the dependence of the overall impedance of the switch S2 on current is reduced.
  • diodes may be simulated using appropriately configured transistors. Numerous such configurations are known to those skilled in the art. Hence, a diode switch, such as the diode switch illustrated in Fig. 11, may be implemented using transistors configured to simulate diodes.
  • Fig. 13 illustrates yet another embodiment of the invention.
  • An amplifier circuit 500 is similar to the amplifier circuit 270 of Fig. 8, but the switches S2 and S3 are implemented using embodiments of diode switches.
  • transistors T2 and T3 simulate diodes similar to diodes Dl and D2, respectively, of Figs. 11-13.
  • Resistor Rl 1 is a bleeder resistor for redirecting the leakage current of switchable current source 351 in its OFF state.
  • Resistor R13 along with switchable current source 361 act to reverse bias transistor-diode T3 when the switch S2 is in its OFF state.
  • resistor R17 along with switchable current source 371 act to reverse bias transistor-diode T2 in the OFF state of switch S2.
  • Resistors R15 and R19 provide signal isolation.
  • resistors R15 and R19 increase the impedance into the current sources 361 and 371, respectively, to reduce the amount of the amplified signal that leaks through the switches 361 and 371 when the amplifier is in high-gain mode.
  • current source 351 is switched OFF, while current sources 361 and 371 are switched ON.
  • Resistor Rll sources the leakage current of current source 351.
  • the leakage current does not flow through transistors T2 and T3, thus improving the switch's isolation in its OFF state.
  • Rll also pulls the voltage at the emitter of transistor T3 to near Ncc- Current source 361 and resistor R13 pull the voltage of the base of T3 to a voltage below that of its emitter, thus reverse biasing T3.
  • current source 371 and resistor R17 pull the voltage of the base of T2 below that of the base of T3, which is coupled to the emitter of T2.
  • T2 is also reverse biased. Because the transistors T2 and T3 are reversed biased, large swings in voltage at the collector of Tl will not cause T2 and T3 to turn ON.
  • the reverse biasing of transistors T2 and T3 further improves the isolation of the switch in its OFF state, because, as is well known in the art, the respective junction capacitances of transistors T2 and T3 are reduced.
  • current source 351 is switched ON while current sources 361 and 371 are switched OFF.
  • Coupling capacitor C5 effectively becomes a short circuit, and resistors Rl 1, R13, R15, R17, and R19 are effectively removed from the circuit with regard to AC signals.
  • the S2 circuitry behaves similar to the diode switch as described with respect to Figs. 11 and 12.
  • Transistors T4 and T5 simulate diodes similar to diodes Dl and D2, respectively, of Figs. 11 and 12.
  • Capacitor C6 acts in a manner similar to that of capacitor C4 in Figs. 11 and 12.
  • Capacitor C7 acts as a coupling capacitor, and is effectively a short circuit to AC signals.
  • FIG. 14 illustrates yet another embodiment of a switch according to the invention.
  • a switch 600 includes a first port 601 and a second port 603. The switch 600 switchably couples the first port 601 with the second port 603.
  • Transistors T6 and T7 simulate diodes similar to diodes Dl and D2, respectively, of Figs. 11 and 12.
  • Capacitor Cjo acts in a manner similar to that of capacitor C4 in Figs. 11 and 12.
  • Resistor R31 couples the base of transistor T6 with its collector, making T6 inductive when the operating signal of the signal to be switched through switch 600 is much greater than fr/ ⁇ .
  • resistor R33 couples the base of transistor T7 with its collector, making T7 inductive.
  • transistors T6 and T7 are configured to simulate diodes, with their respective collectors as anodes and their respective collectors as cathodes.
  • Transistor/diodes T6 and T7 are coupled in series and a switchable current source 605 is coupled with the emitter of transistor T7.
  • the switchable current source 605 switchably biases the transistor/diodes T6 and T7 ON and OFF, similar to the switchable current source 351 of Figs. 11 and 13, and current source 381 of Fig. 13.
  • Capacitors CIO and Cl 1 block DC signals and are substantially short circuits to the signal to be switched through the switch 600.
  • the values of resistors R31 and R33 and capacitor C 10 are chosen in a manner well known to those skilled in the art such that the impedance comprising R33 and T7 in series with capacitor CIO are substantially the conjugate of the impedance comprising R31 and T6.
  • switchable current source 605 When switchable current source 605 is OFF, transistor/diodes T6 and T7 are OFF, and hence node 601 is isolated from node 603.
  • switchable current source 605 When switchable current source 605 is switched ON, a bias current is drawn through transistor/diodes T6 and T7, making them conductive. Because of the values chosen for R31, R33, and CIO discussed above, an AC current flowing from node 601 to 603 is approximately evenly divided between a flow into the collector of T6 and a flow into the emitter of T7. Similarly, an AC current flowing from node 603 to node 601 is approximately evenly divided between a flow into the emitter of T6 and a flow into the collector of T7.
  • the invention is not so limited.
  • the invention may be applied to other types of one-transistor amplifiers such as common-base, common collector, and the like.
  • the invention may be applied to multiple transistor amplifiers.
  • the above description has been described with respect to a bipolar transistor amplifier, the invention may be applied to amplifiers including other types of transistors, such as MOS transistors and the like.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un amplificateur à gain sélectionnable. L'amplificateur comprend une entrée, une sortie et un premier transistor comportant une région de commande, une première et une deuxième région. La conduction de la première à la deuxième région du premier transistor est sensible à la tension de la région de commande par rapport à la deuxième région. Un circuit d'adaptation d'impédance d'entrée est couplé à l'entrée et à la région de commande, et un circuit d'adaptation d'impédance de sortie est couplé à la sortie et à la première région. Un premier circuit de polarisation sélectionnable est couplé à la région de commande pour polariser de manière sélectionnée le transistor entre des états de marche et d'arrêt. Un circuit de dérivation passif est couplé au circuit d'adaptation d'impédance d'entrée et au circuit d'adaptation d'impédance de sortie. Le circuit de dérivation passif comporte un premier commutateur pour coupler de manière sélectionnable le circuit d'adaptation d'impédance d'entrée au circuit d'adaptation d'impédance de sortie par le circuit de dérivation passif.
PCT/US2001/025669 2000-08-16 2001-08-16 Amplificateur a grande linearite et adaptation d'impedance comportant un mode de derivation a faible perte Ceased WO2002015397A2 (fr)

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US64096400A 2000-08-16 2000-08-16
US09/640,964 2000-08-16

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WO2002015397A3 WO2002015397A3 (fr) 2003-09-25

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WO2004021563A1 (fr) * 2002-08-29 2004-03-11 Infineon Technologies Ag Ensemble recepteur a circuit preamplificateur
WO2006083200A1 (fr) * 2005-02-07 2006-08-10 Telefonaktiebolaget Lm Ericsson (Publ) Circuit electrique
EP1665519A4 (fr) * 2003-08-29 2008-05-07 Nokia Corp Procede et appareil permettant une adaptation d'impedance integree par compensation adaptative de l'amplificateur de puissance
EP1851886A4 (fr) * 2005-02-16 2009-07-08 Microtune Texas Lp Systeme d'amplification rf
CN100533955C (zh) * 2002-03-13 2009-08-26 Nxp股份有限公司 具有不同模式的前级放大器
US7898325B2 (en) 2009-05-28 2011-03-01 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Amplifier with bypass switch
DE102008062308B4 (de) * 2008-06-12 2012-04-19 Mitsubishi Electric Corp. Leistungsverstärker
EP2624448A1 (fr) 2012-02-01 2013-08-07 Telefonaktiebolaget L M Ericsson AB (Publ) Amplificateur de faible bruit
EP2624447A1 (fr) * 2012-02-01 2013-08-07 Telefonaktiebolaget L M Ericsson AB (Publ) Amplificateur à faible bruit antibruit
WO2014164170A1 (fr) * 2013-03-11 2014-10-09 Qualcomm Incorporated Amplificateurs à contre-réaction inductive, gain configurable et adaptation d'entrée
US8970296B1 (en) 2013-03-26 2015-03-03 Guerrilla RF, Inc. Amplifying circuit with bypass mode and series isolation switch
WO2015101144A1 (fr) * 2013-12-30 2015-07-09 国民技术股份有限公司 Amplificateur de puissance et son circuit commutateur de gain
WO2015179148A1 (fr) * 2014-05-22 2015-11-26 Qualcomm Incorporated Amplificateur à multiples étages avec réseau rc
US9413301B2 (en) 2012-02-01 2016-08-09 Telefonaktiebolaget Lm Ericsson (Publ) Noise canceling low-noise amplifier
CN112737553A (zh) * 2019-10-14 2021-04-30 瑞昱半导体股份有限公司 靴带式开关

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JPH10173453A (ja) * 1996-12-09 1998-06-26 Sony Corp 高周波可変利得増幅装置および無線通信装置
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CN100533955C (zh) * 2002-03-13 2009-08-26 Nxp股份有限公司 具有不同模式的前级放大器
WO2004021563A1 (fr) * 2002-08-29 2004-03-11 Infineon Technologies Ag Ensemble recepteur a circuit preamplificateur
US7643814B2 (en) 2002-08-29 2010-01-05 Infineon Technologies Ag Reception arrangement with preamplifier circuit
EP1665519A4 (fr) * 2003-08-29 2008-05-07 Nokia Corp Procede et appareil permettant une adaptation d'impedance integree par compensation adaptative de l'amplificateur de puissance
US7512386B2 (en) 2003-08-29 2009-03-31 Nokia Corporation Method and apparatus providing integrated load matching using adaptive power amplifier compensation
WO2006083200A1 (fr) * 2005-02-07 2006-08-10 Telefonaktiebolaget Lm Ericsson (Publ) Circuit electrique
EP1851886A4 (fr) * 2005-02-16 2009-07-08 Microtune Texas Lp Systeme d'amplification rf
US7751857B2 (en) 2005-02-16 2010-07-06 Microtune (Texas), L.P. Radio-frequency amplifier system
DE102008062308B4 (de) * 2008-06-12 2012-04-19 Mitsubishi Electric Corp. Leistungsverstärker
US7898325B2 (en) 2009-05-28 2011-03-01 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Amplifier with bypass switch
EP2947769A1 (fr) 2012-02-01 2015-11-25 Telefonaktiebolaget L M Ericsson (PUBL) Amplificateur de faible bruit
US9312818B2 (en) 2012-02-01 2016-04-12 Telefonaktiebolaget Lm Ericsson (Publ) Low-noise amplifier
WO2013113637A1 (fr) * 2012-02-01 2013-08-08 Telefonaktiebolaget L M Ericsson (Publ) Amplificateur à faible bruit d'annulation de bruit
WO2013113636A3 (fr) * 2012-02-01 2013-12-19 Telefonaktiebolaget L M Ericsson (Publ) Amplificateur à faible bruit
EP2624447A1 (fr) * 2012-02-01 2013-08-07 Telefonaktiebolaget L M Ericsson AB (Publ) Amplificateur à faible bruit antibruit
AU2013214368B2 (en) * 2012-02-01 2015-09-03 Telefonaktiebolaget L M Ericsson (Publ) Low-noise amplifier
AU2013214369B2 (en) * 2012-02-01 2017-05-04 Telefonaktiebolaget L M Ericsson (Publ) Noise canceling low-noise amplifier
EP2624448A1 (fr) 2012-02-01 2013-08-07 Telefonaktiebolaget L M Ericsson AB (Publ) Amplificateur de faible bruit
US9413301B2 (en) 2012-02-01 2016-08-09 Telefonaktiebolaget Lm Ericsson (Publ) Noise canceling low-noise amplifier
WO2014164170A1 (fr) * 2013-03-11 2014-10-09 Qualcomm Incorporated Amplificateurs à contre-réaction inductive, gain configurable et adaptation d'entrée
CN105009447B (zh) * 2013-03-11 2018-07-06 高通股份有限公司 具有电感衰退、可配置增益和输入匹配的放大器
US9106185B2 (en) 2013-03-11 2015-08-11 Qualcomm Incorporated Amplifiers with inductive degeneration and configurable gain and input matching
CN105009447A (zh) * 2013-03-11 2015-10-28 高通股份有限公司 具有电感衰退和可配置增益和输入匹配的放大器
US8970296B1 (en) 2013-03-26 2015-03-03 Guerrilla RF, Inc. Amplifying circuit with bypass mode and series isolation switch
US9160279B1 (en) 2013-03-26 2015-10-13 Guerrilla RF, Inc. Amplifying circuit
WO2015101144A1 (fr) * 2013-12-30 2015-07-09 国民技术股份有限公司 Amplificateur de puissance et son circuit commutateur de gain
WO2015179148A1 (fr) * 2014-05-22 2015-11-26 Qualcomm Incorporated Amplificateur à multiples étages avec réseau rc
CN106464278A (zh) * 2014-05-22 2017-02-22 高通股份有限公司 具有rc网络的多级放大器
US9723560B2 (en) 2014-05-22 2017-08-01 Qualcomm Incorporated Multi-stage amplifier with RC network
CN112737553A (zh) * 2019-10-14 2021-04-30 瑞昱半导体股份有限公司 靴带式开关

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