WO2010143876A3 - 반도체 검증용 적층형 fpga 보드 - Google Patents

반도체 검증용 적층형 fpga 보드 Download PDF

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Publication number
WO2010143876A3
WO2010143876A3 PCT/KR2010/003686 KR2010003686W WO2010143876A3 WO 2010143876 A3 WO2010143876 A3 WO 2010143876A3 KR 2010003686 W KR2010003686 W KR 2010003686W WO 2010143876 A3 WO2010143876 A3 WO 2010143876A3
Authority
WO
WIPO (PCT)
Prior art keywords
fpga
board
boards
verification
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2010/003686
Other languages
English (en)
French (fr)
Other versions
WO2010143876A2 (ko
Inventor
국일호
박종진
한창석
강성태
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
VRINSIGHT CO Ltd
Original Assignee
VRINSIGHT CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by VRINSIGHT CO Ltd filed Critical VRINSIGHT CO Ltd
Priority to US13/377,591 priority Critical patent/US20120105091A1/en
Publication of WO2010143876A2 publication Critical patent/WO2010143876A2/ko
Publication of WO2010143876A3 publication Critical patent/WO2010143876A3/ko
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516Test of programmable logic devices [PLDs]
    • G01R31/318519Test of field programmable gate arrays [FPGA]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3177Testing of logic operation, e.g. by logic analysers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Combinations Of Printed Boards (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

본 발명은 반도체 설계물 검증용 프로토 타이핑 시스템의 적층형 FPGA 보드에 관한 것으로, 반도체 설계물 검증을 위한 프로그래머블 로직 디바이스(PLD) 보드에 있어서, 반도체 검증을 위한 논리회로가 내장된 FPGA칩과 여기에 신호를 입/출력하기 위한 다수의 커넥터가 구비된 적어도 하나 이상의 FPGA 보드 및 상기 커넥터와 연결 가능하게 대응하는 위치에 커넥터가 구비되고, 다수의 상기 FPGA 보드간에 신호를 선택적으로 연결하는 스위칭 보드를 포함하고, 상기 FPGA 보드와 상기 스위칭 보드에 각각 구비된 커넥터를 통해 다층 배열로 연결하여 반도체 설계물을 검증하는 것을 특징으로 한다. 이와 같이 구성되는 본 발명은 보드간에 유연한 연결과 배선설계의 어려움, 공간적 제약의 문제점 등 기존 방식의 다양한 문제점을 해소할 수 있는 효과가 있다.
PCT/KR2010/003686 2009-06-12 2010-06-09 반도체 검증용 적층형 fpga 보드 Ceased WO2010143876A2 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/377,591 US20120105091A1 (en) 2009-06-12 2010-06-09 Stacked fpga board for semiconductor verification

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020090052451A KR101090297B1 (ko) 2009-06-12 2009-06-12 반도체 검증용 적층형 fpga 보드
KR10-2009-0052451 2009-06-12

Publications (2)

Publication Number Publication Date
WO2010143876A2 WO2010143876A2 (ko) 2010-12-16
WO2010143876A3 true WO2010143876A3 (ko) 2011-03-31

Family

ID=43309358

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2010/003686 Ceased WO2010143876A2 (ko) 2009-06-12 2010-06-09 반도체 검증용 적층형 fpga 보드

Country Status (3)

Country Link
US (1) US20120105091A1 (ko)
KR (1) KR101090297B1 (ko)
WO (1) WO2010143876A2 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103064006B (zh) * 2012-12-26 2016-09-14 中国科学院微电子研究所 集成电路的测试装置
KR101423629B1 (ko) 2013-04-18 2014-07-29 (주)엔비로직 탈착식 인터페이스 보드
KR102219634B1 (ko) * 2019-07-15 2021-02-24 김종혁 연결보드 키트

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100420112B1 (ko) * 2001-06-15 2004-03-02 주식회사 마이다스엔지니어링 라이터 일체형 씨피엘디 에프피지에이 보드
KR20040023699A (ko) * 2001-07-30 2004-03-18 액시스 시스템즈, 인크. 동작 프로세서 시스템 및 방법
KR20040076708A (ko) * 2003-02-26 2004-09-03 삼성전자주식회사 Arm 코어를 가지는 soc의 fpga를 사용하는 확장가능형 검증 보드
KR20070025994A (ko) * 2005-08-29 2007-03-08 윤동구 칩 검증 및 테스트 모듈 및 이를 위한 연결 장치

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07502377A (ja) 1991-12-18 1995-03-09 クロスポイント・ソルーションズ・インコーポレイテッド フィールドプログラマブルゲートアレイのための拡張アーキテクチャ
JP3982782B2 (ja) 1998-06-10 2007-09-26 株式会社ルネサステクノロジ 論理モジュール
JP2001318124A (ja) 2000-05-09 2001-11-16 Hitachi Ltd 論理モジュール
US20020090844A1 (en) * 2001-01-09 2002-07-11 Kocin Michael J. Segmented replaceable backplane system for electronic apparatus
JP4356915B2 (ja) * 2002-07-22 2009-11-04 東京エレクトロン株式会社 プローブ装置及びプローブカードのチャンネル情報作成プログラム並びにプローブカードのチャンネル情報作成装置
US8581610B2 (en) * 2004-04-21 2013-11-12 Charles A Miller Method of designing an application specific probe card test system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100420112B1 (ko) * 2001-06-15 2004-03-02 주식회사 마이다스엔지니어링 라이터 일체형 씨피엘디 에프피지에이 보드
KR20040023699A (ko) * 2001-07-30 2004-03-18 액시스 시스템즈, 인크. 동작 프로세서 시스템 및 방법
KR20040076708A (ko) * 2003-02-26 2004-09-03 삼성전자주식회사 Arm 코어를 가지는 soc의 fpga를 사용하는 확장가능형 검증 보드
KR20070025994A (ko) * 2005-08-29 2007-03-08 윤동구 칩 검증 및 테스트 모듈 및 이를 위한 연결 장치

Also Published As

Publication number Publication date
KR20100133750A (ko) 2010-12-22
US20120105091A1 (en) 2012-05-03
KR101090297B1 (ko) 2011-12-07
WO2010143876A2 (ko) 2010-12-16

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