WO2012096537A2 - Nouvelle carte de circuit imprimé et son procédé de fabrication - Google Patents

Nouvelle carte de circuit imprimé et son procédé de fabrication Download PDF

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Publication number
WO2012096537A2
WO2012096537A2 PCT/KR2012/000315 KR2012000315W WO2012096537A2 WO 2012096537 A2 WO2012096537 A2 WO 2012096537A2 KR 2012000315 W KR2012000315 W KR 2012000315W WO 2012096537 A2 WO2012096537 A2 WO 2012096537A2
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WO
WIPO (PCT)
Prior art keywords
conductive layer
conductive
printed circuit
circuit board
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2012/000315
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English (en)
Korean (ko)
Other versions
WO2012096537A3 (fr
Inventor
정은용
조경운
어태식
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Doosan Corp
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Doosan Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Doosan Corp filed Critical Doosan Corp
Publication of WO2012096537A2 publication Critical patent/WO2012096537A2/fr
Publication of WO2012096537A3 publication Critical patent/WO2012096537A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • B01L3/12—Gas jars or cylinders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L9/00—Supporting devices; Holding devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2200/00—Solutions for specific problems relating to chemical or physical laboratory apparatus
    • B01L2200/02—Adapting objects or devices to another
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2200/00—Solutions for specific problems relating to chemical or physical laboratory apparatus
    • B01L2200/08—Ergonomic or safety aspects of handling devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2300/00—Additional constructional details
    • B01L2300/02—Identification, exchange or storage of information
    • B01L2300/025—Displaying results or values with integrated means
    • B01L2300/028—Graduation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2300/00—Additional constructional details
    • B01L2300/08—Geometry, shape and general structure
    • B01L2300/0832—Geometry, shape and general structure cylindrical, tube shaped
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0152—Temporary metallic carrier, e.g. for transferring material

Definitions

  • the present invention relates to a novel printed circuit board and a method of manufacturing the same, which can ensure productivity and economical efficiency while exhibiting a high degree of freedom in designing a printed circuit board such as a double-sided, multi-layered, and asymmetric structure.
  • PCB printed circuit board
  • a separation member is used as a method of manufacturing a single-sided printed circuit board.
  • the separating member 110 is disposed between the two insulating members 111 and 112
  • the conductive layers 113 and 114 are disposed on the outer surfaces of the insulating members 111 and 112, respectively.
  • the insulating members 111 and 112 are separated based on the separating member 110.
  • Such a manufacturing method has a problem of being limited to manufacturing a printed circuit board having a cross-sectional structure in which an electronic element is mounted on an insulating member and connected to a connection terminal by a wire passing through a through hole formed in the insulating member.
  • the resin contents of the insulating member it is difficult to control wrinkles on the surface of the separating member, and it is difficult to control the warpage characteristics by using the resin content or other methods.
  • an object of the present invention is to provide a printed circuit board and a manufacturing method of the novel structure that can be applied to various designs, such as multi-layer, double-sided, asymmetric structure, as well as simplify the manufacturing process, economical.
  • the present invention is an intermediate for manufacturing a printed circuit board of a novel structure, the conductive separation member; Stacking insulating members sequentially stacked on upper and lower surfaces of the conductive separating member; And a conductive layer sequentially stacked on each of upper and lower surfaces of the insulating member for stacking, wherein the conductive separating member is provided on each of the upper and lower surfaces of the first conductive layer and the first conductive layer and is separated from each other.
  • the conductive separating member is preferably an insulating member-free (prepreg-free).
  • the second conductive layer of the conductive separating member is attached to the laminate to form wiring, and the first conductive layer is separated from the second conductive layer.
  • the thickness of the first conductive layer is larger than that of the second conductive layer.
  • the thickness of the first conductive layer may range from 18 ⁇ m to 400 ⁇ m, and the thickness of the second conductive layer may range from 2 ⁇ m to 70 ⁇ m. .
  • the first conductive layer and the second conductive layer include an adhesive layer on their interfaces, and when a force of 0.02 kgf / cm or more is applied, the first conductive layer and the second conductive layer are separated from each other.
  • the printed circuit board of the novel structure of the present invention includes the steps of: (a) preparing a conductive separation member having upper and lower surfaces of the first conductive layer, the first conductive layer and a second conductive layer separated from each other; (b) sequentially stacking a first insulating member and a pattern forming first conductive layer on each of upper and lower surfaces of the conductive separating member; (c) forming a first conductive circuit pattern in one region of the stacked first conductive layers; (d) sequentially stacking and compressing the second insulating member and the pattern forming second conductive layer on the formed first conductive circuit pattern, respectively; (e) repeating steps (c) to (d) to form a laminate in which n or more conductive circuit patterns are stacked (where n is a natural number between 1 and 10); And (f) detaching the first conductive layer of the conductive separating member to separate the laminates having the second conductive layer of the conductive separating member attached to the upper and lower surfaces, respectively.
  • the pattern forming conductive layer on each of the uppermost surfaces of the laminate formed in step (e) may be a single layer or a multilayer structure of two or more layers.
  • the step (f) may be continued.
  • the structures of the laminates separated from each other at the upper and lower portions of the conductive separation member may be the same.
  • the method may further include forming at least one through hole penetrating in the vertical direction of each of the separated stacks.
  • the method may further include plating a second conductive layer provided on each of the upper and lower surfaces of each of the separated laminates and forming a circuit pattern.
  • the present invention provides a printed circuit board manufactured by the above-described manufacturing method.
  • the present invention since an insulating member (prepreg) -free conductive separation member is used, the occurrence of wrinkles of the conductive layer due to the use of the insulating member is essentially prevented, and processability and economy can be improved.
  • the separating member due to the use of the separating member, it is possible to manufacture a plurality of printed circuit boards at the same time to improve the productivity of the manufacturing process.
  • the method of manufacturing a printed circuit board according to the present invention is applicable to a printed circuit board structure having a double-sided, asymmetrical, or multi-layered structure in addition to a single-sided printed circuit board, thereby increasing the design freedom of the printed circuit board.
  • the thickness of the printed circuit board can be significantly reduced.
  • FIG. 1 is a cross-sectional view showing the configuration of a single-sided printed circuit board according to the prior art.
  • FIG. 2 is a cross-sectional view illustrating a configuration of a printed circuit board according to an exemplary embodiment of the present invention.
  • 3 to 10 are cross-sectional views illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention.
  • FIG. 2 is a cross-sectional view illustrating a configuration of a printed circuit board according to an exemplary embodiment of the present invention.
  • the printed circuit board 200 may include an insulating substrate 201; An upper conductive circuit pattern part 210 positioned on an upper surface of the base part; The lower conductive circuit pattern part 220 and the insulating base part 201, the upper conductive circuit pattern part 210, and the lower conductive circuit pattern part 220 which are disposed on the lower surface of the base part are provided to penetrate through the substrate. It has a structure including at least one through hole 260 for connecting to.
  • the upper conductive circuit pattern portion 210 and the lower conductive circuit pattern portion 220 may each independently be a mono-layer or a multi-layer in which two or more unit layers are stacked. .
  • the unit layers 220, 230, 240, 250 refer to a single layer including a conductive circuit pattern having a predetermined shape, and each unit layer includes or includes a form 230, 240 including an insulating layer. Form 220, 250.
  • each of the conductive circuit patterns 232, 242, 251, and 252 included in each of the unit layers 220, 230, 240, and 250 may have a thickness, a shape, a structure, or both of them, so as to form an asymmetric structure.
  • the insulating bases 201 and the insulating layers 231 and 241 included in each unit layer are each independently composed of a content of a constituent resin, a material of a constituent resin, a thermal expansion coefficient of an insulating layer, a thickness of an insulating layer, or both of them are different. Can be configured. As a result, warpage of printed circuit boards and intermediates thereof is observed. It can be minimized by using the laminate for forming a printed circuit board of the invention.
  • the upper conductive circuit pattern portion 210 has a multi-layered structure
  • the case of the lower conductive circuit pattern portion 220 or all of them 210 and 220 are each multi-layered structures. It belongs to the scope of the invention.
  • a printed circuit board having a symmetrical structure may be limited by applying copper clad laminate (CCL).
  • CCL copper clad laminate
  • the copper foil and the insulating layer have different thicknesses, or there is an advantage in that the printed circuit board of the multilayer structure having no limitation in the number of layers can be freely designed and manufactured without warping problems.
  • 3 to 10 are cross-sectional views illustrating a method of manufacturing the printed circuit board shown in FIG.
  • each manufacturing process described below proceeds equally to both the upper and lower portions of the separating member with respect to the separating member.
  • the conductive separating member 310 is provided on each of the upper and lower surfaces of the first conductive layer 321, and the second conductive layer 331 is separated from the first conductive layer.
  • a polymer insulating member such as prepreg is mainly used as the separating member. Since the polymer insulating member is affected by temperature change, moisture absorption, and mechanical load applied during the process, the formability of the conductive layer formed on the insulating member is reduced. There is a problem that the product reliability of the final printed circuit board is degraded. In addition, since the step of removing the insulating member after forming the conductive layer on the insulating member is essentially required, the complexity and productivity of the manufacturing process is lowered.
  • the present invention is characterized by using an insulating member-free conductive separating member.
  • the conductive separating member of the present invention does not use the polymer-based insulating member, it can be used stably even under the change of the conditions applied during the process, thereby ensuring the basic product properties required as a printed circuit board sufficiently.
  • the manufacturing process of injecting and removing the insulating member is more simplified, and the cost of using the insulating member is reduced, thereby improving the fairness and economics.
  • the first conductive layer 321 included in the conductive separating member 310 protects the second conductive layer 331 and serves to physically support the laminates stacked on the upper and lower portions thereof. It also functions to separate from the second conductive layer 331 in the separation step.
  • the second conductive layer 331 is attached to the upper insulating member 341 and the lower insulating member 342 constituting the laminate, respectively, and functions as a seed layer to form a wiring.
  • Each of the first conductive layer 321 and the second conductive layer 331 for the conductive separation member may have a metal thin film formed of a conductive material, and may be made of copper.
  • first conductive layer 321 and the second conductive layer 331 include an adhesive layer between these layers, they have heat resistance and rust resistance.
  • the adhesive component contained in the adhesive layer it can be stably attached to other substrates in a general state, while applying a force in the range of 0.02 kgf / cm or more, preferably 0.02 to 0.045 kgf / cm without physical damage
  • the first conductive layer and the second conductive layer may be separated from each other.
  • the thickness of the first conductive layer 321 is preferably larger than that of the second conductive layer 331.
  • the thickness of the first conductive layer may range from 18 ⁇ m to 400 ⁇ m
  • the thickness of the second conductive layer may range from 2 ⁇ m to 70 ⁇ m. However, it is not limited thereto.
  • a first laminate is formed by sequentially laminating a first insulating member and a pattern forming first conductive layer on each of the upper and lower surfaces of the conductive separating member (see FIG. 3).
  • the first laminated body 300 includes: first insulating members 341 and 342 for stacking sequentially stacked on upper and lower surfaces of the aforementioned separation member 310; And first conductive layers 351 and 352 sequentially stacked on upper and lower surfaces of the first insulating member for stacking.
  • the first insulating member and the pattern forming first conductive layer are respectively disposed on the upper and lower portions of the conductive isolation member 310 independently, the first insulating member and the pattern forming first conductive layer are each made of a first insulating layer.
  • another configuration of the present invention used in the upper and lower centering around the conductive separation member may also be equally distinguished.
  • the first upper conductive layer 351 for pattern formation, the first upper insulating member 341, the conductive separating member 310, the first lower insulating member 342, and the pattern forming member Each of the first lower conductive layers 352 is sequentially stacked.
  • the first upper insulating member 341 and the first lower insulating member 342 electrically insulate each of the layers connected to each other, thereby forming an appearance of the printed circuit board and providing durability.
  • the first insulating members 341 and 342 may use a thermosetting resin having an adhesive property without limitation, and may include a flexible material such as polyimide (PI); It may be a rigid material using a mixed material such as glass fabric, BT, epoxy, phenol resin, and the like.
  • PI polyimide
  • Non-limiting examples of the insulating member that can be used include epoxy resins, phenol resins containing glass fibers; And a semiprepreg in a semi-cured state formed by laminating an epoxy on carbon, or a mixed form thereof.
  • the first upper conductive layer 351 and the first lower conductive layer 352 for pattern formation further include a heat path function as well as an electrical conduction function in the inner layer.
  • the conductive layers 351 and 352 may have a thickness in a range of about 8 ⁇ m to about 70 ⁇ m, and may be formed to be 1 ounce or more.
  • the first upper conductive layer 351, the first upper insulating member 341, the conductive separating member 310, the first lower insulating member 342 and the first lower conductive layer 352 are sequentially stacked Although illustrated by way of example, it is also within the scope of the present invention that some of their stacking order is modified or optionally mixed as needed.
  • a first conductive circuit pattern having a predetermined shape is formed in one region of the stacked first conductive layer (see FIG. 4).
  • the first conductive circuit pattern symmetrically formed on each of the upper and lower portions of the conductive separation member is divided into a first upper conductive circuit pattern 351 and a first lower conductive circuit pattern 352.
  • the method of forming the circuit pattern is not particularly limited and may be performed according to conventional methods known in the art.
  • the second insulating member and the pattern forming second conductive layer are sequentially stacked on each of the first conductive circuit patterns positioned on the uppermost and lower portions of the first laminated body and pressed to form a second laminated body (FIG. 4). ⁇ 5).
  • the second upper insulating member ( 343 and the second upper conductive layer 361 for pattern formation are sequentially stacked.
  • the first lower conductive circuit pattern 352 formed on the lower surface of the first lower insulating member 342 the second lower insulating member 344 and the second lower conductive layer 362 for pattern formation are sequentially stacked. do. Then, they are compressed to form a second upper laminate 391 and a second lower laminate 392. Thereafter, as in step 3), a conductive circuit pattern is formed.
  • the step is repeated n times in sequence to form an nth stacked body in which n or more conductive circuit patterns are stacked.
  • N is a natural number between 1 and 10.
  • the second upper laminate 391 and the second lower laminate 392 may each have at least one layer or more, and preferably two upper and lower conductive circuit patterns. It may have a structure including (351, 352, 361, 362) and two upper and lower insulating layers (343, 344, 341, 342).
  • steps 3) to 4) may be repeated as necessary.
  • 6 to 7 illustrate a process of repeatedly performing the steps 3) to 4) by introducing a pattern forming conductive layer having a multilayer structure as a conductive layer stacked on the second laminate.
  • the third upper insulating member 345 and the pattern forming third upper conductive layer 370 may be formed on the second upper conductive circuit pattern 361.
  • the third lower insulating member 346 and the patterned third lower conductive layer 380 are laminated on the second lower conductive circuit pattern 362, and then compressed to form a third upper laminate 393 and a third lower layer.
  • the laminate 394 is formed.
  • the third upper conductive layer 370 and the third lower conductive layer 380 for pattern formation may have a multi-layer structure of two or more layers and may be separated from each other in the same manner as the conductive separation member 310.
  • the separation process may be performed. In this case, even if a single conductive layer is stacked as the third conductive layers 370 and 380, a separation step may be performed if necessary.
  • the upper surface of the third upper laminate 393 and the lower surface of the third lower laminate 394 formed as described above have a first conductive layer functioning similarly to the first conductive layer 321 of the conductive separating member 310, respectively. 371 and 372 are disposed.
  • the first conductive layer 321 is detached from the conductive separating member 310 to separate the laminate to which the second conductive layer of the conductive separating member is attached (see FIG. 8).
  • the third upper laminate 393, the third lower laminate 394, and the separating member 310 of the present invention may have a first conductive layer 321, 371, 372 and a second conductive layer ( 331, 381, and 382, respectively.
  • the first conductive layer 321 is detached from the conductive separating member 310, and the upper and third lower surfaces of the third upper laminate 393 are removed.
  • the fourth upper laminate 395 having the second conductive layers 381, 382 and 331 attached on the upper and lower surfaces.
  • the fourth lower laminate 396 can be separated.
  • the structures of the upper and lower laminates 395 and 396 separated around the conductive separating member 310 are different from each other.
  • the separated fourth upper laminate 395 and the fourth lower laminate 396 may have second conductive layers 331, 381, and 382 attached to upper and lower surfaces thereof, respectively, and may have a predetermined inside of the fourth laminate.
  • the conductive circuit patterns 351, 352, 361, and 362 having the shape of and the insulating layers 343, 344, 345, and 346 may have a structure in which at least n layers are alternately stacked.
  • the conductive circuit patterns 331, 351, 352, 361, 362, 381, and 382 included in each of the separated fourth upper stack 395 and the fourth lower stack 396 are unbalanced in the vertical direction. Even if the structure has a structure, the vertical symmetry structure between the upper laminate and the lower laminate is maintained in the above-described manufacturing process, thereby minimizing warpage characteristics generated during the manufacturing process. In addition, a printed circuit board having various structures may be manufactured at the same time.
  • the through hole 390 is formed for interlayer conduction through a later plating process.
  • the position, shape, number of through holes is not particularly limited and may be freely adjusted as necessary.
  • a conventional method known in the art may be used, and for example, a mechanical drill or a laser may be used.
  • a method of forming a via hole by irradiating a portion where a via hole is to be formed with a laser may be used.
  • a post-treatment process of removing impurities formed on the inner wall in the process of processing the holes may be further included. This can improve the efficiency of the plating process to be carried out later, as a result can improve the reliability of the product.
  • second conductive layers 331 and 381 positioned on upper and lower surfaces of the fourth upper laminate 395 may be used as seeds, 331 and 381, and plating layers 383 and 384 of a desired thickness may be used. Can be further formed.
  • the second conductive layer may form a fine circuit (50 pitch) wire.
  • the through hole 390 is also plated so that it is electrically conductive.
  • a circuit pattern 385 and 386 having a predetermined shape is formed, and a manufacturing process of a conventional printed circuit board known in the art, for example, a solder resist forming process, is performed on the separated laminates.
  • the fabrication of the printed circuit board is completed by further performing etching, wiring and electronic device mounting processes.
  • the above-described method of manufacturing a printed circuit board is not to be manufactured by sequentially performing the above-described steps, but may be performed by modifying or selectively mixing the steps of each process according to design specifications.
  • the warpage phenomenon of the printed circuit board has a great influence on the process rate and productivity when the printed circuit board is mounted, and may also cause a transfer error or a defect that the printed circuit board is not electrically connected during the package assembly process. It is an important factor.
  • a printed circuit board is a structure in which several materials are laminated. The main cause of the warpage phenomenon is the difference in the coefficient of thermal expansion (CTE) of each laminated material, and other factors affect the Young's modulus and the process. Temperature changes, moisture absorption, mechanical loads, etc. applied to the air are known.
  • CTE coefficient of thermal expansion
  • the bending property of the printed circuit board is mainly caused by a difference in thermal expansion and contraction between the laminated materials and a load, and according to the present invention, in order to reduce the difference, the composition and thickness of the laminated material laminated in multiple layers (dielectric thickness control) are reduced. ) To minimize the bending characteristics by changing the physical properties such as the coefficient of thermal expansion (CTE).
  • CTE coefficient of thermal expansion
  • the thermal expansion coefficient (CTE) of the components constituting the member, the thickness of the insulating member, or both of them may be different from each other.
  • An embodiment of the present invention for controlling the degree of bending of the printed circuit board is as follows.
  • the degree of warpage of the printed circuit board forming laminate obtained at each manufacturing step or the final manufactured printed circuit board is predicted or measured in advance.
  • the insulating member used in the subsequent lamination process uses an insulating member having a configuration capable of correcting a positive value. For example, it is possible to use an insulating member having i) a lesser content of resin, ii) a smaller thickness, or iii) a lower coefficient of thermal expansion (CTE).
  • CTE coefficient of thermal expansion
  • the subsequent lamination process involves i) a higher resin content, ii) a higher coefficient of thermal expansion and / or iii) a thicker thickness of the insulation member. By using, the degree of warping can be corrected.
  • CTE matching of two or more insulating members laminated in a multi-layer is controlled through dielectric thickness control such as resin content, resin thickness, etc., but conductively stacked in multiple layers in a coreless printed circuit board that does not use a copper clad laminate (CCL) core. It is also within the scope of the present invention to configure the layers and / or the conductive circuit patterns so that the thicknesses are different from each other to improve the bending property.
  • the present invention not only minimizes the warpage phenomenon caused in the above-described manufacturing process, but also significantly improves the warpage characteristics of the intermediate for forming the printed circuit board or the final manufactured printed circuit board.

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  • Health & Medical Sciences (AREA)
  • Clinical Laboratory Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

La présente invention porte sur un corps empilé destiné à former une carte de circuit imprimé, une carte de circuit imprimé comprenant le corps empilé et un procédé de fabrication de la carte de circuit imprimé. La nouvelle carte de circuit imprimé comprend : un élément de séparation conducteur ; un élément isolant pour empilement, qui est successivement empilé sur chacune des surfaces supérieure et inférieure de l'élément de séparation conducteur ; et une couche conductrice successivement empilée sur chacune des surfaces supérieure et inférieure de l'élément isolant pour empilement. L'élément de séparation conducteur comprend : une première couche conductrice ; et une seconde couche conductrice agencée sur chacune des surfaces supérieure et inférieure de la première couche conductrice, la seconde couche conductrice étant séparable de la première couche conductrice. La présente invention porte sur une nouvelle carte de circuit imprimé multicouche qui peut surmonter les limitations d'application d'une carte de circuit imprimé classique ayant une structure unique et peut être conçue sous diverses formes telles qu'une structure double face ou asymétrique de manière à améliorer la productivité et l'efficacité économique.
PCT/KR2012/000315 2011-01-13 2012-01-13 Nouvelle carte de circuit imprimé et son procédé de fabrication Ceased WO2012096537A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2011-0003672 2011-01-13
KR1020110003672A KR101537837B1 (ko) 2011-01-13 2011-01-13 신규 인쇄회로기판 및 이의 제조방법

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WO2012096537A2 true WO2012096537A2 (fr) 2012-07-19
WO2012096537A3 WO2012096537A3 (fr) 2012-11-22

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN115297631A (zh) * 2022-08-09 2022-11-04 昆山沪利微电有限公司 一种不对称叠构电路板的制作方法

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KR102493463B1 (ko) 2016-01-18 2023-01-30 삼성전자 주식회사 인쇄회로기판, 이를 가지는 반도체 패키지, 및 인쇄회로기판의 제조 방법

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KR100704919B1 (ko) * 2005-10-14 2007-04-09 삼성전기주식회사 코어층이 없는 기판 및 그 제조 방법
JP4334005B2 (ja) * 2005-12-07 2009-09-16 新光電気工業株式会社 配線基板の製造方法及び電子部品実装構造体の製造方法
JP4866268B2 (ja) * 2007-02-28 2012-02-01 新光電気工業株式会社 配線基板の製造方法及び電子部品装置の製造方法
KR100916124B1 (ko) * 2007-12-18 2009-09-08 대덕전자 주식회사 코어리스 기판 가공을 위한 캐리어 및 코어리스 기판 가공방법

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115297631A (zh) * 2022-08-09 2022-11-04 昆山沪利微电有限公司 一种不对称叠构电路板的制作方法

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WO2012096537A3 (fr) 2012-11-22
KR101537837B1 (ko) 2015-07-17
KR20120082276A (ko) 2012-07-23

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