WO2018117604A2 - Carte de circuit imprimé et procédé de fabrication de celle-ci - Google Patents

Carte de circuit imprimé et procédé de fabrication de celle-ci Download PDF

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Publication number
WO2018117604A2
WO2018117604A2 PCT/KR2017/015029 KR2017015029W WO2018117604A2 WO 2018117604 A2 WO2018117604 A2 WO 2018117604A2 KR 2017015029 W KR2017015029 W KR 2017015029W WO 2018117604 A2 WO2018117604 A2 WO 2018117604A2
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WIPO (PCT)
Prior art keywords
metal
layer
metal layer
printed circuit
circuit board
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PCT/KR2017/015029
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English (en)
Korean (ko)
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WO2018117604A3 (fr
Inventor
강규홍
이정규
홍승민
이상환
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Doosan Corp
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Doosan Corp
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Priority to CN201780079214.4A priority Critical patent/CN110089205A/zh
Publication of WO2018117604A2 publication Critical patent/WO2018117604A2/fr
Publication of WO2018117604A3 publication Critical patent/WO2018117604A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to a printed circuit board and a method for manufacturing the same, which can ensure productivity and economy.
  • PCBs are components in which wires are integrated to allow various devices to be mounted or to make electrical connections between the devices. BACKGROUND With the development of technology, printed circuit boards having various shapes and functions have been manufactured.
  • a method of manufacturing a printed circuit board uses a foam tape film.
  • two copper foil laminates 10 in which the first copper foil layer 11, the insulating member 12, and the second copper foil layer 13 are sequentially stacked are prepared, and then these are foamed.
  • via holes 14 are formed in one region of the second copper foil layer, and then the foam tape film is removed from the multi-layer structure.
  • the laminate 30 is separated.
  • An object of the present invention is to provide a printed circuit board and a method of manufacturing the same that can reduce the defective rate of the substrate while improving the production operation rate of the substrate.
  • the present invention provides a method for manufacturing a printed circuit board, according to an example, the method is (S100) the first metal layer, the metal release layer and the second metal layer thinner than the first metal layer.
  • Preparing a metal member comprising a sequentially; (S200) preparing a separation core member by stacking the metal members on the upper and lower surfaces of the insulating member such that the second metal layer is in contact with the insulating member; (S300) forming a multilayer structure by stacking unit members including an insulating layer and a pattern forming metal layer on each of the first metal layers of the separating core member; (S400) forming a via hole in one region of the insulating layer and the pattern forming metal layer; (S500) forming a plating layer by plating the via hole and the pattern forming metal layer; And (S600) separating the metal release layer and the first metal layer of the separating core member from the multilayer structure obtained in the step (S500), and removing the metal release layer together with
  • the method may further include cutting the edge region of the multilayer structure obtained in the step (S500).
  • a first guide hole for mutual registration between layers in the printed circuit board is perpendicular to the separation core member obtained in the step S200. Forming through the direction; And before the step S400, recognizing the first guide hole inside the multilayer structure obtained in the step S300 as an X-ray to form a second guide hole vertically penetrating the edge of the multilayer structure. It may include.
  • the metal release layer is chromium (Cr), nickel (Ni), zinc (Zn), molybdenum (Mo), tungsten (W), cobalt (Co), lead (Pb), silver (Ag), tantalum (Ta) ), Copper (Cu), aluminum (Al), manganese (Mn), iron (Fe), titanium (Ti), tin (Sn), steel (Steel) and vanadium (V) at least one selected from the group consisting of Can be.
  • the metal release layer may have a metal deposition amount of 0.5 to 20 mg / m 2.
  • the thickness of the first metal layer may range from 6 to 35 ⁇ m, and the thickness of the second metal layer may range from 0.5 to 5 ⁇ m.
  • an uneven portion may be formed on a surface of the first metal layer in contact with the insulating layer of the unit member.
  • the average roughness (Ra) of the uneven portion may be in the range of 3.0 to 6.5 ⁇ m.
  • the adhesive strength between the insulating layer and the first metal layer is in the range of 0.8 to 3.0 N / mm.
  • the release force between the metal release layer and the first metal layer may be in a range of 10 to 90 N / m.
  • each of the laminated bodies separated around the core member for separation may have the same structure.
  • the present invention provides a printed circuit board manufactured by the method described above.
  • the printed circuit board sequentially includes a first metal layer, an insulating layer, and a pattern forming metal layer, and includes a via hole formed in the insulating layer and the metal layer; And a metal layer in which the via hole is not formed and a plating layer formed in the via hole.
  • the present invention is an intermediate for manufacturing the above-described printed circuit board, a separation core member including an insulating member, and a metal member laminated on the upper and lower surfaces of the insulating member, respectively; And a unit member stacked on an upper surface and a lower surface of the separation core member, the unit member sequentially comprising an insulating layer and a pattern forming metal layer, wherein the metal member comprises: a first metal layer; Metal release layer; And a second metal layer thinner than the first metal layer and sequentially including a second metal layer in contact with the insulating member.
  • the separation core member may be vertically penetrated to form a first guide hole for mutual matching between layers in the printed circuit board, and a second guide hole penetrating perpendicularly to the edge of the multilayer structure.
  • the metal release layer and the first metal layer may be separated by a force of 10 to 90 N / m.
  • an uneven portion may be formed on a surface of the first metal layer in contact with the insulating layer of the unit member.
  • the present invention provides a printed circuit board including the multilayer structure for forming a printed circuit board described above.
  • the method for manufacturing a printed circuit board according to the present invention uses a foamable tape film by using a separation core member having the first metal layer and a releaseable metal release layer interposed between the first metal layer and the second metal layer. Compared with the conventional manufacturing method, the defective rate can be reduced while the production operation rate of the printed circuit board is improved.
  • the separation core member is used instead of the expandable tape film, a plurality of printed circuit boards may be simultaneously manufactured, thereby improving productivity of the manufacturing process.
  • 1 is a flowchart illustrating a manufacturing process of a conventional printed circuit board.
  • FIGS. 2 to 6 are cross-sectional views illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention.
  • FIG. 7 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention.
  • FIGS. 8 to 9 are cross-sectional views illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention.
  • FIG. 10 is a cross-sectional view showing another embodiment of the separating core member used in the present invention.
  • 112a, 112b metal release layer, 113a, 113b: second metal layer,
  • 211a and 211b insulating layer
  • 212a and 212b metal layer for pattern formation
  • a separation core member having a metal release layer separated from the first metal layer and a metal release layer interposed between the first metal layer and the second metal layer is used.
  • Two laminates having the first metal layer attached thereto are simultaneously manufactured by separating the metal release layer together with the second metal layer by separating the first metal layer.
  • the inventors of the present invention have a printed circuit board using two separation members formed by depositing the metal foil and a releasable metal layer (hereinafter, referred to as a 'metal release layer') on one surface of the metal foil by using separation members attached to upper and lower surfaces of the insulating member.
  • a 'metal release layer' releasable metal layer
  • the metal foil and the metal release layer may be easily separated in a separation process.
  • the metal release layer is directly deposited on one surface of the metal foil by a deposition method (eg, electro-deposition, etc.), the metal release layer may be stably attached to the metal foil in a general state.
  • the metal release layer is made of a metal foil and a moldable metal, the metal release layer can be separated from the metal foil by a predetermined external force.
  • the metal release layer is formed by a vapor deposition method, the profile is flat enough to have a profile close to zero. Therefore, the metal release layer has a low adhesive force (bonding force) with the insulating member, and thus the metal release layer and the insulating member may be separated during the lamination process. In addition, since the insulating member does not support (hold) the metal release layer during the separation process due to the low bonding force between the metal release layer and the insulating member, the metal release layer may be separated from the insulating member rather than the metal foil. .
  • the metal foil should be separated from the metal release layer and attached to the laminate. If the thickness of the metal foil is too thin, the metal foil may be deformed or damaged during separation, and the circuit pattern may be immediately formed on the metal foil later. There is a need to form a seed layer without patterning.
  • the metal release layers 112a and 112b separable from the first metal layer and the second metal layers 113a and 113b thinner than the first metal layer are sequentially disposed on one surface of the first metal layers 111a and 111b.
  • the separation core members 100 obtained by attaching the two metal members stacked on the upper and lower surfaces of the insulating member 120 are used for manufacturing a printed circuit board (see FIG. 2).
  • the present invention can reduce the defective rate while improving the production operation rate of the printed circuit board, and furthermore, since the plurality of printed circuit boards can be manufactured at the same time, the productivity of the manufacturing process can be improved.
  • (S100) preparing a metal member sequentially comprising a first metal layer, a metal release layer, and a second metal layer thinner than the first metal layer. ; (S200) preparing a separation core member by stacking the metal members on the upper and lower surfaces of the insulating member such that the second metal layer is in contact with the insulating member; (S300) forming a multilayer structure by stacking unit members including an insulating layer and a pattern forming metal layer on each of the first metal layers of the separating core member; (S400) forming a via hole in one region of the insulating layer and the pattern forming metal layer; (S500) forming a plating layer by plating the via hole and the pattern forming metal layer; And (S600) separating the metal release layer and the first metal layer of the separating core member from the multilayer structure obtained in the step (S500), and removing the metal release layer together with the second metal layer and the insulating
  • the manufacturing method is preferably to proceed the step (S300) ⁇ (S500) the same in both the upper and lower portions of the separation core member with a center for the separation core member.
  • the metal members 110a and 110b include first metal layers 111a and 111b, metal release layers 112a and 112b, and second metal layers 113a and 113b.
  • the metal member by depositing and depositing a metal release layer on the first metal layer, and then preparing a metal member by adhering or depositing a second metal layer on the metal release layer, the metal member to the insulating member in the step (S200) It is bonded together to obtain a separation core member.
  • the metal release layer is formed by depositing the second metal layer on the insulating member and the metal release layer is formed by vapor deposition, since the insulating member is a non-conductive material, in order to form the metal release layer by the vapor deposition method, a separate facility in the form of plasma is used. Because it is necessary. Therefore, in the present invention, the metal member is separately prepared and then bonded to the insulating member to obtain a separation core member.
  • the first metal layers 111a and 111b are separated (detachable) from the separation core member 100 by a metal release layer in a step S600, which is a separation step, and are attached to one surface of each laminate, and then a printed circuit. While serving as a support of the substrate, it can serve as a wiring layer through patterning without a seed layer.
  • the first metal layers 111a and 111b are not particularly limited as long as they are in the form of a metal thin film made of a conductive material used to form a circuit pattern in the art.
  • the conductive material are chromium (Cr), nickel (Ni), zinc (Zn), molybdenum (Mo), tungsten (W), cobalt (Co), lead (Pb), silver (Ag), tantalum (Ta), copper (Cu), aluminum (Al), manganese (Mn), iron (Fe), titanium (Ti), tin (Sn), steel (Steel), zinc (Zn) and vanadium (V), palladium (Pd) and the like, and these may be used alone or in combination of two or more. Among these, it is preferable to use a copper thin film in consideration of economy.
  • the thickness of the first metal layer is not particularly limited, but in the range of about 6 to 35 ⁇ m, without a seed layer thereafter without preventing deformation or damage of the circuit pattern layer or the insulating layer in the laminate separated in the separation process.
  • a circuit pattern is formed through patterning in a short time, and thus may serve as a wiring layer.
  • the first metal layers 111a and 111b include uneven parts 111a-1 and 111b-1 formed on surfaces of the unit members in contact with the insulating layers 211a and 211b (see FIG. 10).
  • the uneven parts 111a-1 and 111b-1 the adhesive force (bonding force) between the first metal layers 111a and 111b and the insulating layers 211a and 211b may be further improved. For this reason, when the first metal layer is separated from the metal release layer in a later separation process, it is possible to minimize the occurrence of Pattern Peel Off failure due to a decrease in peel strength between the first metal layer and the insulating layer.
  • the average roughness Ra of the uneven portion is not particularly limited, but in the range of about 3.0 to 6.5 ⁇ m, the adhesive strength between the first metal layer and the insulating layer may be further improved to about 0.8 to 3.0 N / mm.
  • the metal release layers 112a and 112b are formed on one surface of the first metal layers 111a and 111b. Since the metal release layer is directly deposited on the first metal layer, the adhesion state with the first metal layer may be stably maintained in the lamination process, the via hole forming process, and the plating process (steps S300 to S500). Meanwhile, a second metal layer is directly deposited on the metal release layer, and the second metal layer is attached to the insulating member. That is, the metal release layers 112a and 112b are supported by the second metal layers 113a and 113b contacted and in contact with the insulating member.
  • the metal release layers 112a and 112b and the first metal layers 111a and 111b are separated in the separation process (step S600 below).
  • the metal release layers 112a and 112b are formed of the first metal layer by a predetermined external force. And can be separated from each other.
  • the metal release layers 112a and 112b are releasable metal layers from the first metal layers 111a and 111b.
  • the interlayer peeling does not occur during the lamination process, and unlike the foam tape film, In the separation process, even if a part of the metal release layer is transferred to the first metal layer, a short does not occur.
  • metal release layers are chromium (Cr), nickel (Ni), zinc (Zn), molybdenum (Mo), tungsten (W), cobalt (Co), lead (Pb), silver (Ag), tantalum (Ta), It consists of at least one selected from the group consisting of copper (Cu), aluminum (Al), manganese (Mn), iron (Fe), titanium (Ti), tin (Sn), steel (Steel) and vanadium (V).
  • the metal release layer is a heterogeneous metal having low reactivity with the first metal layer, the metal release layer may be easily separated from the first metal layer by a small force without deformation or damage of the laminate in the separation process.
  • the first metal layer is a copper layer
  • the first metal release layer may be a component different from the copper layer, such as chromium and nickel.
  • the thickness of the metal release layer is not particularly limited, but is nanometer level, depending on the amount of metal deposition.
  • the release force of the metal release layer also varies according to the metal deposition amount. That is, as the metal deposition amount increases, the release force of the metal release layer also increases during the separation process. For this reason, when the metal deposition amount is too large, separation between the metal release layer and the first metal layer may not be easy in the separation process, while when the metal deposition amount is too small, the interlayer peeling between the metal release layer and the first metal layer during the lamination process. May occur.
  • the metal deposition amount is in the range of about 0.5 to 20 mg / m 2, Preferably from about 3.5 to 8 mg / m 2.
  • the metal release layer may have a thickness in the range of about 20 nm or less, preferably in the range of about 5 to 20 nm, and in the separation process about 10 to 90 N / m, preferably about 15 to 60 N / m, more preferably can be separated from the first metal layer by a release force in the range of about 20 to 55 N / m.
  • Such a metal release layer may be formed by a deposition method rather than a conventional coating method.
  • the metal release layer may include about 150 to 300 g / l of chromic acid (preferably about 240 to 260 g / l) and about 1.5 to 3 g / l of sulfuric acid (preferably about 2.2 to about 22 ° C.). It is formed by directly depositing on one surface of the first metal layer by electro-deposition using an electrolytic solution containing 2.5 g / l).
  • the metal deposition amount of the metal release layer may range from about 0.5 to 20 mg / m 2.
  • the metal members 110a and 110b include second metal layers 113a and 113b formed on the other surfaces of the metal release layers 112a and 112b described above.
  • the second metal layers 113a and 113b are separated and removed together with the metal release layers 112a and 112b in the separating step.
  • the second metal layers 113a and 113b are separated by supporting the metal release layer by improving adhesion between the metal release layer and the insulating member. In this step, the metal release layer is separated at the interface with the first metal layer.
  • the thickness of the second metal layers 113a and 113b is not particularly limited as long as it is thinner than the thickness of the first metal layers 111a and 111b. According to an example, when the thickness of the first metal layer is about 6 to 35 ⁇ m, the thickness of the second metal layer may range from about 0.5 to 5 ⁇ m.
  • the second metal layer is in the form of a metal thin film composed of a conductive material, and examples of the conductive material are the same as described above with respect to the first metal layer.
  • the component of the second metal layer may be the same as or different from the component of the first metal layer.
  • the core member 100 for separation is in the form obtained by stacking the metal member (110a, 110b) obtained in the step (S100) on each of the upper and lower surfaces of the insulating member 120, the metal member The second metal layers 113a and 113b are in contact with and insulated from the insulating member 120.
  • the separation core member 100 is in the form of a metal foil laminate in the art, and does not easily cause delamination due to physical or thermal shock during the lamination process.
  • the insulating member 120 serves as a support for the separation core member and is removed together with the second metal layers 113a and 113b and the metal release layers 112a and 112b in the separation step.
  • the insulating member 120 usable in the present invention can be used without particular limitation as long as it is known in the art, for example, a flexible material such as polyimide (PI); It may be a rigid material using a mixed material such as glass fiber, BT, epoxy resin, phenol resin and the like. Among these, the use of a semi-prepreg of a semi-cured state containing an epoxy resin and glass fiber can be closely adhered to the metal member when bonding with the metal member, thereby minimizing the delamination in the lamination process. Rather, it is easier to manufacture than other materials in terms of mass production.
  • PI polyimide
  • step S300 formation of a multilayer structure
  • the insulating layers 211a and 211b and pattern formation stacked on one surface thereof are formed on each of the first metal layers 111a and 111b of the separation core member 100 prepared in step S200.
  • the unit members 210a and 210b including the metal layers 212a and 212b are stacked and pressed to form the multilayer structure 200.
  • the insulating layers 211a and 211b contact the first metal layers 111a and 111b.
  • the multilayer structure 200 has an insulating layer 211a and a pattern forming metal layer 212a sequentially stacked on an upper surface thereof (ie, the first metal layer 111a) with respect to the separation core member 100. and; The insulating core 211b and the pattern forming metal layer 212b are sequentially stacked on the lower surface of the separation core member 110 (that is, the first metal layer 111b).
  • the insulating layer and the pattern forming metal layer are respectively independently disposed on the upper and lower portions of the separation core member.
  • the insulating layer may be divided into an upper insulating layer 211a and a lower insulating layer 211b, respectively, and the pattern forming metal layer may also be formed as the pattern forming upper metal layer 212a and the pattern forming lower metal layer 212b.
  • the pattern forming metal layer may also be formed as the pattern forming upper metal layer 212a and the pattern forming lower metal layer 212b.
  • Another configuration of the present invention used in the upper and lower centering around the separation core member may also be equally distinguished.
  • the multilayer structure 200 includes a lower insulating layer 211b, a separation core member 100, an upper insulating layer 211a, and a pattern on the lower metal layer 212b for pattern formation.
  • the upper metal layers 212a for forming are stacked in this order.
  • the upper insulating layer 211a and the lower insulating layer 211b are parts that form an appearance of the printed circuit board and provide durability by electrically insulating each layer connected to each other in the final printed circuit board.
  • the material of the insulating layer may be a thermosetting resin having adhesive properties, and may include a flexible material such as polyimide (PI); It may be a rigid material using a mixed material such as glass fiber, BT, epoxy resin, phenol resin and the like.
  • the thermal expansion coefficient may be adjusted by uniformly distributing an inorganic filler or glass fiber in the insulating layer as a whole, and may be used by adjusting the thermal expansion coefficient of the polymer material and the glass fiber, respectively.
  • the upper insulating layer 211a and the lower insulating layer 211b may have the same configuration as the insulating member 120 of the separation core member 100, all of them (120, 211a, 211b) May be configured as a prepreg in a semi-cured state.
  • the pattern forming upper metal layer 212a and the pattern forming lower metal layer 212b may function as well as a heat path in an inner layer.
  • the thickness of the metal layer is not particularly limited, and may be, for example, in a range of about 9 to 12 ⁇ m [1/4 to 1/3 oz (oz)].
  • the lower metal layer 212b for pattern formation, the lower insulating layer 211b, the core member 100 for separation, the upper insulating layer 211a and the pattern forming upper metal layer 212a are sequentially stacked. Although described, it is also within the scope of the present invention that some of the lamination order is modified or optionally mixed as needed.
  • Via holes are formed in one region of the pattern forming metal layer and the insulating layer of the multilayer structure obtained in the step (S300).
  • one or more via holes 213a and 213b are formed symmetrically or asymmetrically in each of the upper and lower portions about the separation core member 100.
  • the via hole may be divided into an upper via hole 213a and a lower via hole 213b.
  • the via hole may be formed by a method known in the art.
  • the via hole may be formed by irradiating a portion where the via hole is to be formed with a laser.
  • the position, shape, and number of via holes are not particularly limited and may be freely adjusted as necessary.
  • a post-treatment step may be performed to remove impurities formed on the inner wall in the process of processing the via hole, if necessary.
  • the via holes 213a and 213b and the pattern forming metal layers 212a and 212b are plated to form plating layers 214a and 214b (see FIG. 5).
  • the plating layers 214a and 214b may be formed on the inner walls of the via holes 213a and 213b or may be formed by filling the insides of the via holes 213a and 213b.
  • the pattern forming metal layers 212a and 212b in which the plating layers 214a and 214b are formed are portions of the pattern forming metal layers 212a and 212b in which the via holes are not formed.
  • the plating layer forming method is not particularly limited, and may be performed according to conventional methods known in the art.
  • the metal release layers 112a and 112b of the separation core member 100 are separated (detachable) from the first metal layers 111a and 111b, and thus the two metal structures of the multilayer structure 200 are separated.
  • the metal release layers 112a and 112b are removed together with the two second metal layers 113a and 113b and the insulating member 120, the first metal layers 111a and 111b are stacked on one surface of the multilayer structure 200. Two laminated bodies 220a and 220b can be obtained separately.
  • each of the laminates 220a and 220b includes insulating layers 211a and 211b and pattern forming metal layers 212a and 212b on the first metal layers 111a and 111b, and the insulating layers 211a and 211b.
  • the via holes 213a and 213b and the plating layers 214a and 214b formed in the pattern forming metal layers 212a and 212b are included.
  • the upper laminate is centered around the core member 100 for separation in the above-described manufacturing process. Since the vertically symmetrical structure between and the lower laminate is maintained, warpage characteristics generated during the manufacturing process can be minimized.
  • printed circuit boards having various structures may be manufactured at the same time.
  • Laminate Circuit patterns may be formed on the top and / or bottom surfaces.
  • the laminate 220a obtained in the step S600 includes a first metal layer 111a and a plating layer 214a, and a region of the first metal layer 111a and / or plating layer 214a is predetermined.
  • a circuit pattern (not shown) having a shape of may be formed.
  • the plating layer 214a is in the form of a thin film, it is used as a seed layer, and a second plating layer (not shown) having a desired thickness is further formed thereon to form a circuit pattern (not shown). can do.
  • the method of forming the circuit pattern is not particularly limited and may be performed according to conventional methods known in the art.
  • the above-described method of manufacturing a printed circuit board is not to be manufactured by sequentially performing the above-described steps, but may be performed by modifying or selectively mixing the steps of each process according to design specifications.
  • a printed circuit board is a structure in which several materials are laminated, and the main cause of the warpage phenomenon is the difference in the coefficient of thermal expansion (CTE) of each laminated material, and other factors such as Young's modulus and process Temperature changes, moisture absorption, mechanical loads, etc. applied to the air are known.
  • CTE coefficient of thermal expansion
  • the bending property of the printed circuit board is mainly caused by a difference in thermal expansion and contraction between the laminated materials and a load, and according to the present invention, in order to reduce the difference, the composition and thickness of the laminated material laminated in multiple layers (dielectric thickness control) are reduced. ) To minimize the bending characteristics by changing the physical properties such as the coefficient of thermal expansion (CTE).
  • CTE coefficient of thermal expansion
  • At least one insulating layer used in the above-described step (S300), the content of the resin (Resin contents) constituting the insulating layer, the material or composition of the constituent resin, the components of the insulating layer may be different from each other.
  • An embodiment of the present invention for controlling the degree of bending of the printed circuit board is as follows.
  • the degree of warpage of the multilayered structure for forming a printed circuit board obtained at each manufacturing step or the final manufactured printed circuit board is predicted or measured in advance.
  • the insulating layer used for the subsequent lamination process uses an insulating member having a configuration capable of correcting the positive value. For example, it is possible to use an insulating member having i) a lesser content of resin, ii) a smaller thickness, or iii) a lower coefficient of thermal expansion (CTE).
  • CTE coefficient of thermal expansion
  • the subsequent lamination process involves i) a higher resin content, ii) a higher coefficient of thermal expansion and / or iii) a thicker thickness of the insulation member. By using, the degree of warping can be corrected.
  • the CTE matching of two or more insulating layers laminated in multiple layers is exemplified by dielectric thickness control such as resin content, resin thickness, etc., but is laminated in multiple layers on a coreless printed circuit board that does not use a copper clad laminate (CCL) core. It is also within the scope of the present invention to configure the metal layers and / or circuit patterns so that the thicknesses are different from each other to improve the bending property.
  • the present invention not only minimizes the warpage phenomenon caused in the above-described manufacturing process, but also significantly improves the warpage characteristics of the intermediate for forming the printed circuit board or the final manufactured printed circuit board.
  • the present invention may further include cutting the edge of the multilayer structure obtained in the step (S500).
  • the method of manufacturing a printed circuit board may further include cutting the edges of the multilayer structure obtained in the step S500 before the step S600, in addition to the above-described step S100 to S600. It may include.
  • the unit member used in the step (S300) may have a size (that is, the length in the longitudinal direction and the width direction) is the same as or larger than the separation core member.
  • the unit members are laminated on both sides of the separating core member and compressed to form the unit.
  • the insulating layer material of the member surrounds the edge of the separating core member. In this case, before the separation step, the edge X of the multilayer structure 300 should be cut and removed.
  • step (S600) by separating and removing the separation core member 100 (except the first metal layer (111a, 111b)) in the multilayer structure 200, the first metal layer (111a) , And two laminates 310a and 310b having 111b stacked on one surface thereof can be obtained.
  • the present invention is directed to a multilayer structure Guide hole It may further comprise the step of forming.
  • the method of manufacturing a printed circuit board in addition to the above-described steps (S100) to (S600), before the step (S300), the separation core member obtained in the step (S200), the printed circuit Forming a first guide hole through a vertical direction of the separation core member for mutual registration between layers in the substrate; Recognizing the first guide hole in the multilayer structure obtained in the step (S300) as an X-ray before the step (S400) to form a second guide hole penetrating perpendicular to the edge of the multilayer structure; And before the step (S600), it may further comprise the step of cutting the edge of the multilayer structure obtained in the step (S500).
  • the interlayer matching in the printed circuit board is improved, thereby minimizing interlayer dislocations and short circuits between the wirings, and improving reliability.
  • the first guide hole 131 vertically penetrates the edge of the separation core member 100 obtained in the step S200 (see FIG. 8B). Thereafter, the unit members 210a and 210b are stacked and pressed on the upper and lower surfaces of the separation core member on which the first guide hole 131 is formed, respectively, to form a multilayer structure 400 (see FIG. 8C).
  • the inside of the first guide hole 131 is filled with a material (for example, a thermosetting resin and a prepreg) of the insulating layers 211a and 211b of the unit member.
  • the insulating layer material of the unit member of the separation core member It will surround the edge.
  • the first guide hole 131 of the multilayer structure 400 is recognized as an X-ray to form a second guide hole 132 that vertically penetrates the multilayer structure 400 (see FIG. 8 (d)).
  • the second guide hole 132 may be formed in an area corresponding to the position of the first guide hole 131, or may be formed in an edge area of the multilayer structure spaced apart from the first guide hole 131.
  • via holes 213a and 213b are formed in one region of the insulating layer and the pattern forming metal layer of the multilayer structure, and plating the via hole and the pattern forming metal layer to form a plating layer ( 214a, 214b).
  • the inner wall of the second guide hole 132 is also plated (see FIG. 9 (e)).
  • the edge region Y of the multilayer structure 400 is cut and removed along the inner side of the first guide hole 131 (see FIG. 9F).
  • the first metal layer (111a) It is possible to obtain two laminates 410a and 410b having 111b stacked on one surface thereof (see Fig. 9 (g)).
  • contaminants on the inner wall of the hole and the substrate may be removed by selectively desmearing and deburring.
  • the present invention provides a printed circuit board manufactured according to the above-described method of manufacturing a printed circuit board.
  • the printed circuit board sequentially includes a first metal layer 111a, an insulating layer 211a, and a pattern forming metal layer 212a, and is formed on the insulating layer 211a and the pattern forming metal layer 212a. Formed via holes 213a; And a non-formed metal layer 212a and a plating layer 214a formed in the via hole 213a.
  • a printed circuit board may manufacture a double-sided printed circuit board according to a method for manufacturing a double-sided printed circuit board known in the art.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

La présente invention concerne une carte de circuit imprimé et un procédé de fabrication de celle-ci, qui peut garantir la productivité et l'efficacité économique. De manière spécifique, la présente invention concerne : un procédé de fabrication d'une carte de circuit imprimé à l'aide d'un élément formant noyau de séparation dans lequel une couche de libération de métal séparable d'une première couche de métal est interposée entre la première couche de métal et une seconde couche de métal ; et une carte de circuit imprimé ainsi fabriquée.
PCT/KR2017/015029 2016-12-20 2017-12-19 Carte de circuit imprimé et procédé de fabrication de celle-ci Ceased WO2018117604A2 (fr)

Priority Applications (1)

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CN201780079214.4A CN110089205A (zh) 2016-12-20 2017-12-19 印刷电路板及其制造方法

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KR10-2016-0174271 2016-12-20
KR1020160174271A KR101932326B1 (ko) 2016-12-20 2016-12-20 인쇄회로기판 및 이의 제조방법

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KR101955685B1 (ko) * 2018-07-20 2019-03-08 주식회사 에스아이 플렉스 연성 인쇄 회로 기판의 제조 방법 및 연성 인쇄 회로 기판
KR102357725B1 (ko) 2020-01-17 2022-02-03 한국표준과학연구원 탄성파를 이용한 철도레일 절손감지장치 및 이를 이용한 감지방법
CN114765928B (zh) * 2021-01-12 2024-08-09 深南电路股份有限公司 一种印制线路板及其压合方法

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US4937133A (en) * 1988-03-28 1990-06-26 Nippon Steel Chemical Co., Ltd. Flexible base materials for printed circuits
JPH0513902A (ja) * 1990-09-04 1993-01-22 Chisso Corp フレキシブルプリント基板及びその製造法
US5427848A (en) * 1991-05-06 1995-06-27 International Business Machines Corporation Stress balanced composite laminate material
JP3405242B2 (ja) * 1998-12-21 2003-05-12 ソニーケミカル株式会社 フレキシブル基板
JP4541763B2 (ja) * 2004-01-19 2010-09-08 新光電気工業株式会社 回路基板の製造方法
JP4866268B2 (ja) * 2007-02-28 2012-02-01 新光電気工業株式会社 配線基板の製造方法及び電子部品装置の製造方法
JP4546581B2 (ja) * 2010-05-12 2010-09-15 新光電気工業株式会社 配線基板の製造方法
KR101141215B1 (ko) * 2010-07-19 2012-05-04 최문화 플라즈마 방전형 저온 보관 장치
KR101282965B1 (ko) * 2010-11-05 2013-07-08 주식회사 두산 신규 인쇄회로기판 및 이의 제조방법
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JP5902931B2 (ja) * 2011-12-06 2016-04-13 新光電気工業株式会社 配線基板の製造方法、及び、配線基板製造用の支持体
KR101514221B1 (ko) * 2011-12-07 2015-04-23 에스케이이노베이션 주식회사 다층 폴리이미드 구조의 연성금속적층판 제조방법
JP5977392B2 (ja) * 2014-03-26 2016-08-24 Ｊｘ金属株式会社 樹脂製の板状キャリアと金属層とからなる積層体

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CN110089205A (zh) 2019-08-02
WO2018117604A3 (fr) 2018-08-16
KR101932326B1 (ko) 2018-12-24

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