WO2016015911A1 - Composant électronique et procédé de fabrication d'un composant électronique - Google Patents

Composant électronique et procédé de fabrication d'un composant électronique Download PDF

Info

Publication number
WO2016015911A1
WO2016015911A1 PCT/EP2015/063207 EP2015063207W WO2016015911A1 WO 2016015911 A1 WO2016015911 A1 WO 2016015911A1 EP 2015063207 W EP2015063207 W EP 2015063207W WO 2016015911 A1 WO2016015911 A1 WO 2016015911A1
Authority
WO
WIPO (PCT)
Prior art keywords
frame
wafer
carrier
electrical connection
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2015/063207
Other languages
German (de)
English (en)
Inventor
Boris Eichenberg
Georg Bogner
Ralf Staub
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
Original Assignee
Osram Opto Semiconductors GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors GmbH filed Critical Osram Opto Semiconductors GmbH
Publication of WO2016015911A1 publication Critical patent/WO2016015911A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/8506—Containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Definitions

  • At least one object of certain embodiments is to provide an electronic component. At least another object of certain embodiments is to provide a method for manufacturing an electronic component.
  • the carrier element may have an electrical connection surface on the mounting side, on which the at least one electrical semiconductor chip is mounted and electrically connected.
  • the electrical connection surface has at least two electrical connection elements, on which the at least one electronic semiconductor chip is mounted and electrically connected.
  • the electrical connection surfaces can be formed in particular by metal layers. These can be structured in a suitable form so that the at least one electronic semiconductor chip can be mounted and electrically connected.
  • Connection surfaces can be, for example, by a direct
  • Forming connection elements of the electrical connection surface may include or be made of gold.
  • the carrier element may have additional contact elements, such as conductor tracks and / or
  • vias are electrical vias
  • the electronic component has at least one frame element which is mounted on the
  • Frame element is in particular a separate component, which is provided individually or in a composite, which can then be divided, before assembly.
  • the composite can be, for example, a wafer composite in which a Frame wafer is provided which has a plurality of contiguous frame elements.
  • the frame element is not a component which is formed by a molding process on the carrier element or together with the carrier element, as for example in a molding process such as a
  • Injection molding, transfer molding, compression molding or a similar process would be the case.
  • the at least one frame element is arranged laterally next to the electronic semiconductor chip.
  • a lateral direction here denotes a direction along the main extension plane of the mounting side of the carrier element. This means that the at least one frame element in a plan view of the mounting side of the support member laterally next to the at least one
  • the at least one frame element may be formed such that it does not completely enclose the at least one electronic semiconductor chip in the lateral direction. In other words, this means that the at least one frame element does not form a frame that completely surrounds the semiconductor chip. In this case, apart from at least one side of the at least one electronic semiconductor chip, no part of the at least one frame element is arranged.
  • the at least one frame element in the case of a plan view of the mounting surface may have the shape of a beam, ie a straight shape along a main extension direction, such that the frame element is arranged on one side of the at least one semiconductor chip.
  • the frame member on two sides of the at least one Semiconductor chips can be arranged.
  • the at least one frame member may also have a C-like shape
  • the frame member may be disposed on three sides of the at least one semiconductor chip. Does the electronic component a plurality of
  • Frame elements they may also be formed and arranged on the support member, that the at least one electronic semiconductor chip in a lateral direction is not completely from the plurality of frame members
  • the at least one frame element is electrically conductive.
  • Frame element is present through the frame member.
  • the at least one frame element is mounted on the electrical connection surface. This may mean in particular that the at least one frame element on an electrical connection element
  • Semiconductor chips can be carried through the at least one frame element.
  • the at least one frame element on a side facing the carrier element a first metallic surface and on the side facing away from the carrier element a second metallic
  • the metallic surfaces can be the same and thus have the same metal.
  • metal and “metal” means a single metallic element or even a mixture or alloy of several metallic elements.
  • the first metallic surface and the second metallic surface of different metals.
  • at least one of the metallic surfaces can be formed by a metal layer.
  • the frame element has a base body, on which at least one metal layer is applied, which forms one of the metallic surfaces.
  • the at least one frame member may comprise a silicon body on which the first and second metallic surfaces are formed by metal layers. In other words, this means that the main body on the first side, the support element
  • the at least one frame element a first metal layer, which forms the first metallic surface, and on the second, the carrier element facing away from a second metal layer, which forms the second metallic surface.
  • the at least one frame element a first metal layer, which forms the first metallic surface, and on the second, the carrier element facing away from a second metal layer, which forms the second metallic surface.
  • Metal layer is applied.
  • the metallic body are formed while the other metallic surface of the at least one frame member is formed by a metal layer, which is applied to the metallic base body.
  • the metallic main body may also have, as the first and second metallic surfaces, in each case a metal layer applied to the metallic main body.
  • one or more further metal layers may be arranged, which in particular have a diffusion barrier between them
  • metallic body and the metal layer can form.
  • materials for the metallic base body and the metal layer in particular compounds with materials selected from Ni, Ti, W and N are suitable, such as, for example, Ni, Ti, TiW and TiWN.
  • a corresponding carrier which has different metallizations, is about 250% more expensive than a corresponding carrier with only one due to the considerably higher production costs
  • the problem of multiple metallization can be avoided by the at least one frame member.
  • the at least one frame element as the first metallic surface, which faces the carrier element, a metal, for example in the form of a metallization, which are compatible with the carrier element and in particular for electrical
  • Terminal surface is.
  • the side facing away from the carrier element may have a correspondingly formed second metallic surface corresponding to the second metallization required for external contacting. This can do that
  • Frame element can be mounted with the same technique on the mounting side of the support member as the at least one electronic semiconductor chip, while the side facing away from the support member of the at least one frame member may have a provided for an external contacting other metallization.
  • the at least one frame element can form a kind of "rewiring chip" whose use on the carrier element does not require the provision of multiple metallization with complex methods described with the same method as the at least one electronic semiconductor chip can be mounted. This allows
  • metallizations can be achieved. Furthermore, in the event that the side facing away from the carrier element of the at least one frame member is provided for external contacting of the electronic component, a higher compared to the mounting side of the support member contact surface can be provided, which, for example, after casting or embedding of the at least one electronic semiconductor chip with or in a potting material can still be exposed, so no additional
  • a frame wafer can be provided, which forms the base body of a plurality of frame elements.
  • a silicon wafer or a metal wafer can be provided.
  • On the wafer may be on one or both main surfaces of a metal layer to form a desired metallic surface
  • Separation of the frame wafer into individual frame elements can take place before or after assembly of this on a carrier wafer, so that the frame elements either in one
  • Wafer composite or can be mounted as individual components. According to a further embodiment, two of the
  • connection elements on and on each of the two electrical connection elements a frame member is mounted.
  • the electrical connection surface can be even more
  • the frame elements can in particular be arranged on the carrier element such that the at least one semiconductor chip is arranged between the frame elements in the lateral direction. In particular, the frame elements can thus be arranged laterally from the at least one electronic semiconductor chip.
  • the frame elements preferably have at least the same height as the semiconductor chip. are on the at least one
  • Frame elements preferably have a height which is at least as great as the total height of the semiconductor chip with the additional layers and elements applied thereto. Is between the frame elements and on the at least one semiconductor chip and optionally on another
  • each of the frame members is electrically conductive with the respective one
  • each of the frame elements can be used for electrical contacting of the respective underlying electrical connection element in the manner described above.
  • the at least one frame element is mounted on the mounting side and in particular on the electrical connection surface by means of soldering, anodic bonding or gluing.
  • soldering eutectic soldering may be used.
  • the carrier element is a silicon carrier.
  • the carrier element comprises or is made of silicon.
  • the carrier element can be formed by a silicon substrate, which can be produced by singulation of a carrier wafer in the form of a silicon wafer. Compared to other support materials such as ceramics are
  • a silicon carrier for example in a wafer process, can be metallized on the mounting side in a structured manner by means of well-established methods in order to form electrical connecting surfaces.
  • silicon offers one for electronic components
  • the carrier element is a circuit board, such as a printed circuit board (“printed circuit board ”) or a ceramic carrier
  • the carrier element can thus be provided with the electrical connection surface.
  • Ceramic carrier for example
  • Support substrates have suitable ceramic material or be it.
  • Connecting surface of the support member has a plurality of
  • the electrical connection surface may have a suitable number of electrical connection elements, which enables a respectively separate electrical connection or else a series or parallel connection of the plurality of electronic semiconductor chips.
  • the electrical connection surface is structured in electrical connection elements such that a plurality of electronic
  • the at least one electronic semiconductor chip is optoelectronic
  • Semiconductor chip formed This may mean in particular that the electronic semiconductor chip is used as a light-emitting or light-detecting semiconductor chip, ie
  • the at least one electronic semiconductor chip can also be embodied as a purely electronic semiconductor chip and can not fulfill optoelectronic functions.
  • ESD ESD protection diode
  • a potting material is arranged above the at least one semiconductor chip.
  • the potting material may be a plastic material that encloses the at least one semiconductor chip and thus protects it against external influences.
  • the potting material can fulfill further or other functions, for example in the case of a light-emitting
  • the potting material may in particular have a height which is less than or equal to the height of the at least one frame element.
  • the potting material is preferably disposed between the frame members and over the at least one semiconductor chip.
  • the potting material can be applied, for example, by casting or injection molding.
  • an optical element is arranged above the at least one semiconductor chip.
  • the optical element may for example be a transparent
  • the optical element can be mounted on the at least one frame element.
  • the at least one frame element and preferably the two frame elements on sides of the electronic component can protect the at least one electronic semiconductor chip and optionally a wiring to the
  • the at least one and preferably the two frame elements as
  • Contrast agents for example, in headlight applications such as car headlights, such as a dipped beam used, and also serve as a housing for casting the at least one semiconductor chip.
  • the at least one semiconductor chip Depending on the required further processing in the system, the at least one
  • Frame element can be configured with different metallizations or metallic surfaces.
  • the at least one frame element as below
  • a method for producing an electronic component is a
  • Carrier wafer provided.
  • the carrier wafer may in particular be formed by a plurality of still connected carrier elements.
  • the carrier wafer through a silicon wafer, a ceramic wafer or a
  • connection surfaces can be or are applied to the carrier wafer. This may mean that the carrier wafer, for example in the case of a printed circuit board assembly, is already provided with connection surfaces or, in the case of a silicon or ceramic wafer, is provided with connection surfaces.
  • the carrier wafer for example in the case of a printed circuit board assembly, is already provided with connection surfaces or, in the case of a silicon or ceramic wafer, is provided with connection surfaces.
  • a frame member can be mounted on the carrier wafer with the pads.
  • a plurality of frame members can be mounted on the carrier wafer with the pads. These can, as described above, provided as a composite, for example in the form of a frame wafer, or as individual components and on the
  • Carrier wafers are mounted. Furthermore, at least one electronic semiconductor chip can be mounted on each of the electrical connection surfaces. The assembly of
  • each of the electronic components has a carrier element, formed from a part of the carrier wafer. Furthermore, each of the isolated electronic components at least one
  • a method for producing an electronic component is a
  • Carrier wafer provided with electrical pads, each having at least two electrical connection elements on a mounting side of the carrier wafer.
  • Pad can have two frame elements so on the
  • Carrier wafers are mounted on each of the electrical pads respectively on two of the at least two
  • each case a frame element is mounted. Furthermore, at least one electronic semiconductor chip is mounted on each of the electrical connection surfaces.
  • a plurality of electronic components is formed, each of the electronic components a carrier element, formed by a part of the carrier wafer, and on the at least two electrical connection elements of
  • Connection surface each having a frame element can be especially for the case
  • frame elements are used, which, as described above, have a metallic base body.
  • a first silicon wafer is provided as carrier wafer for producing an electronic component.
  • Carrier elements are formed. On the carrier wafer formed by the first silicon wafer, electrically, electrically, and
  • Pads are applied with at least two electrical connection elements on a mounting side.
  • a second silicon wafer is provided as a frame wafer, are introduced into the openings. The openings are arranged such that they at a mounting of the frame wafer forming the second
  • Silicon wafer at least partially over the electrical
  • connection surfaces are arranged.
  • the electrical connection surfaces are at least partially exposed after the mounting of the second silicon wafer on the first silicon wafer due to the openings in the second silicon wafer.
  • the frame wafer is mounted on the carrier wafer.
  • the assembly can be done as described above in connection with the at least one frame element, so for example by soldering, such as eutectic soldering, by anodic bonding or by gluing.
  • soldering such as eutectic soldering
  • Terminal surfaces will be at least an electronic one
  • Silicon wafers are divided into a variety of electronic components, each of the electronic
  • Components comprises a support member which is formed by a part of the carrier wafer forming the first
  • Silicon wafer and at least one frame member which is formed by a part of the frame wafer forming second silicon wafer.
  • the assembly of the at least one electronic semiconductor chip can take place before or after the division of the silicon wafers mounted on one another respectively. Preferably, however, an assembly of the electronic semiconductor chips takes place before the cutting in the wafer composite.
  • a first metallic surface passes through
  • Carrier wafer is turned away, a second metallic surface are formed by applying a metal layer.
  • the formation of the second metallic surface can in this case take place before or after the division of the wafers mounted on one another.
  • LED arrays such as those used in automotive headlamps, are now widely carriers for semiconductor light-emitting chips are used on which to produce necessary properties such as a shutter edge or a homogeneous
  • Bonding techniques common to silicon wafers such as anodic or eutectic bonding
  • Semiconductor chip further layers to be adjusted.
  • the openings in the second silicon wafer can be formed in a precise manner, for example by etching.
  • Silicon wafer suitable metal layers are applied to form desired metallic surfaces, so that on the one hand a mounting of the second silicon wafer on the first silicon wafer, in particular on the electrical pads, and on the other hand, the provision of a desired surface for later external contacting of the individual electronic components can be made possible.
  • an aluminum layer can be applied for a later aluminum wire bonding.
  • FIGS. 1A and 1B are schematic representations of a
  • FIGS. 2A and 2B are schematic representations of
  • Figures 3A and 3B are schematic representations of frame elements according to others
  • Figure 4 is a schematic representation of an electronic circuit
  • FIGS. 5A to 5C are schematic representations of
  • FIGS. 6A and 6B are schematic representations of
  • identical, identical or identically acting elements can each be provided with the same reference numerals.
  • the illustrated elements and their proportions with each other are not to be regarded as true to scale, but individual elements, such as layers, components, components and areas, for better representation and / or better understanding may be exaggerated.
  • FIGS. 1A and 1B are schematic representations of an electronic component 100 according to FIG.
  • FIG. 1A shows a
  • Figure 1B shows a schematic three-dimensional view of the electronic component 100.
  • the electronic component 100 has a carrier element 1, which on an assembly side 10 an electrical
  • the carrier element 1 may be, for example, a ceramic carrier or a silicon carrier, on which the electrical connection elements 11 for forming the
  • the electrical connection elements 11 may comprise or be one or more layers comprising one or more materials, for example selected from gold, copper and tin, for example a gold layer, a gold-tin layer or a copper layer. Such materials are particularly suitable for the
  • a printed circuit board is formed.
  • At least one electronic semiconductor chip 3 is arranged and mounted on the electrical connection surface.
  • three electronic semiconductor chips 3 are shown purely by way of example, each of which is embodied as light-emitting semiconductor chips and which in operation emit light of an ultraviolet to blue wavelength purely by way of example.
  • Semiconductor chips 3 and the wavelength conversion layers 4 generated light is formed.
  • all electronic semiconductor chips 3 or just some of these other optoelectronic semiconductor chips may be, such as
  • semiconductor laser diode chips For example, semiconductor laser diode chips or
  • a protective diode chip 5 is provided and mounted on the pad, which protects the electronic semiconductor chips 3 from electrostatic
  • the electronic semiconductor chips 3 and the protection diode chip 5 may vary depending on
  • Series connection of the electronic semiconductor chip 3 is through the two outer, in the illustration shown far left and rightmost arranged electrical
  • the protective diode chip 5 is in corresponding manner parallel to the series circuit of
  • the electronic component has at least one frame element 2.
  • the frame elements 2 are as
  • the electronic component 100 has two frame elements 2, which are laterally adjacent to the electronic semiconductor chips
  • the frame elements 2 are bar-shaped, so that each of the frame elements in each case faces one side of the electronic semiconductor chip 3.
  • Frame elements 2 thus do not form the semiconductor chips 3 completely enclosing frame.
  • two of the four in the embodiment shown a total of four
  • the assembly of the frame elements 2 can in particular
  • the frame elements 2 facing the carrier element 1 a metallic surface which is suitable in the same way as the
  • the side facing away from the support member 1 of the frame members 2 also has a metallic surface, which may be different from the carrier element 1 facing metallic surface and in particular for an external electrical contacting of the electronic component 100 is provided.
  • the frame members 2 are electrically conductive and have, for example, a
  • Silicon basic body or a metallic base body so that in particular an electrical line between the carrier element 1 facing surface and the
  • Carrier element 1 facing away from the surface through the respective frame element 2 can be carried out. Thereby and by the mounting of the frame members 2 provided therefor
  • electrical connection elements 11 may be an electrical
  • the frame elements 2 form a kind of "rewiring chips" which, on their surface facing the carrier element 1, are compatible with the electrical connection surface and on the surface facing away from the carrier element 1
  • the frame elements 2 may, for example, a height
  • FIGS. 2A and 2B show further exemplary embodiments of electronic components 100, which in addition to the components and components described above
  • Potting material 6 have, in which the electronic
  • FIG. 2A shows a sectional view through a corresponding one
  • the frame elements 2 in this embodiment have a greater height than the combination of the semiconductor chips 3 with the wavelength conversion layers 4 arranged thereon.
  • the potting material 6 extends to the
  • Carrier element 1 facing away from the upper side of the frame members 2, so that they are free of the potting material 6 and thereby the external contact easily accessible, while the semiconductor chips 3 and the
  • Wavelength conversion layers 4 are completely enveloped.
  • the potting material 6 has, in particular, a plastic material which can be applied, for example, by casting or injection molding and which serves to protect the
  • the plastic material of the potting material 6 may contain additional substances and / or materials by which the optical or other properties of the potting material can be adapted in a manner known to those skilled in the art.
  • the frame elements 2 may, for example, also have the same height as the combination of the semiconductor chips 3 and the wavelength conversion layers 4, so that the Carrier element 1 facing away from the top
  • Carrier element 1 facing away from the upper sides of the frame members 2 are not covered by the potting material 6, as in
  • Embodiment of Figure 2B is shown in a plan view.
  • FIGS. 3A and 3B show exemplary embodiments of FIG.
  • the frame element 2 according to the embodiment of Figure 3A has a base body 20 which comprises or consists of silicon. On the body 20 are metallic
  • the frame element 2 in contrast to the embodiment of Figure 3A has a base body 20 which by a metallic
  • Body is formed.
  • a metal layer 23 is applied to the base body 20, which forms the second metallic surface 22, while the first metallic surface 21 is formed by the metallic base body itself.
  • the first and second metallic surfaces 21, 22 may also be interchanged, or a metal layer may be present to form both metallic surfaces 21, 22.
  • the metallic base body by copper or a
  • Copper compound may be formed while the metal layer 23 comprises or consists of aluminum. Between the metallic base body 20 and the metal layer 23 further layers, in particular for example as
  • Diffusion barrier formed layers be arranged.
  • Frame elements 2 is mounted.
  • the optical element 7 through a transparent cover plate, a diffuser plate, a wavelength conversion element, a
  • Lens or a combination thereof may be formed.
  • Component 100 of the embodiment of Figure 4 a Potting material 6, as described in connection with Figures 2A and 2B, have.
  • Pads are applied with at least two electrical connection elements 11 on a mounting side.
  • the application of the electrical connection surfaces by means known in the silicon process technology
  • Allow metal layers For the sake of clarity, only one electrical connection element 11 is provided with a reference symbol. Each of the pads is associated with a later electronic component.
  • a frame wafer 9 is in the form of a second
  • Silicon wafer provided. This has openings 90 which, for example, by etching the silicon material of
  • Frame wafer 9 can be produced.
  • the openings 90 are arranged so that they are in an assembly of the
  • Frame wafer 9 are arranged on the carrier wafer 8 at least partially over the electrical connection surfaces, so that these after mounting the frame wafer 9 on the
  • Carrier wafer 8 are at least partially exposed. Such an assembled state is shown in Fig. 5C.
  • the assembly of the frame wafer 9 on the carrier wafer 8 takes place for example by eutectic soldering, anodic bonding or gluing. This can be done on a surface of the carrier wafer 8
  • Frame wafer 9 which faces after the assembly of the frame wafer 9 on the carrier wafer 8 to the carrier wafer 8, prior to assembly as described above first metallic
  • Carrier wafer 8 for example, a ceramic wafer with a correspondingly applied metallization for formation
  • circuit board such as a printed circuit board, provided on which electronic semiconductor devices and frame elements and other components, for example, as described in connection with the previous embodiments,
  • one frame element can be mounted on two of the at least two electrical connection elements on each of the electrical connection surfaces.
  • Applied components can be a variety of electronic components 100, as in connection with the previous
  • the isolated electronic components 100 have a potting material 6, then they can be cast together in conjunction with the potting material 6.
  • a common border 102 shown in FIG. 6A for example in the form of a silicone bead around the area corresponding to the later electronic components, can be used
  • a potting material 6 can be applied, as shown in FIG. 6B. This makes it possible to encapsulate a variety of electronic components in Individual processes, as practiced in the prior art, to avoid.

Landscapes

  • Led Device Packages (AREA)

Abstract

L'invention concerne un composant électronique (100), comprenant un élément porteur (1) qui possède, sur un côté de montage (10), une surface de raccordement électrique dotée d'au moins deux éléments de raccordement électrique (11), sur laquelle est montée et raccordée électriquement au moins une puce électronique en semiconducteur (3). Au moins un élément formant cadre (2) est monté sur le côté de montage (10). L'invention concerne également un procédé de fabrication de composants électroniques (100).
PCT/EP2015/063207 2014-07-28 2015-06-12 Composant électronique et procédé de fabrication d'un composant électronique Ceased WO2016015911A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102014110614.8 2014-07-28
DE102014110614.8A DE102014110614A1 (de) 2014-07-28 2014-07-28 Elektronisches Bauelement und Verfahren zur Herstellung eines elektronischen Bauelements

Publications (1)

Publication Number Publication Date
WO2016015911A1 true WO2016015911A1 (fr) 2016-02-04

Family

ID=53491492

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2015/063207 Ceased WO2016015911A1 (fr) 2014-07-28 2015-06-12 Composant électronique et procédé de fabrication d'un composant électronique

Country Status (2)

Country Link
DE (1) DE102014110614A1 (fr)
WO (1) WO2016015911A1 (fr)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090242923A1 (en) * 2008-03-28 2009-10-01 M/A-Com, Inc. Hermetically Sealed Device with Transparent Window and Method of Manufacturing Same
US20100308350A1 (en) * 2008-08-26 2010-12-09 Jeffrey Bisberg LED Chip-Based Lighting Products And Methods Of Building

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101662038B1 (ko) * 2010-05-07 2016-10-05 삼성전자 주식회사 칩 패키지
US9275949B2 (en) * 2011-06-01 2016-03-01 Canon Kabushiki Kaisha Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090242923A1 (en) * 2008-03-28 2009-10-01 M/A-Com, Inc. Hermetically Sealed Device with Transparent Window and Method of Manufacturing Same
US20100308350A1 (en) * 2008-08-26 2010-12-09 Jeffrey Bisberg LED Chip-Based Lighting Products And Methods Of Building

Also Published As

Publication number Publication date
DE102014110614A1 (de) 2016-01-28

Similar Documents

Publication Publication Date Title
DE102012213343B4 (de) VERFAHREN ZUM HERSTELLEN EINES OPTOELEKTRONISCHES HALBLEITERBAUTEILs MIT SAPHIR-FLIP-CHIP
DE10201781B4 (de) Hochfrequenz-Leistungsbauteil und Hochfrequenz-Leistungsmodul sowie Verfahren zur Herstellung derselben
DE10305021B4 (de) Verfahren zur Herstellung oberflächenmontierbarer Hochleistungs-Leuchtdioden
WO2020169524A1 (fr) Composant à semi-conducteur optoélectronique et procédé de production d'un composant à semi-conducteur optoélectronique
WO2014060355A2 (fr) Procédé de fabrication d'une pluralité de composants optoélectroniques à semi-conducteurs
DE102012002605B4 (de) Verfahren zur Herstellung eines optoelektronischen Halbleiterbauteils und optoelektronisches Halbleiterbauteil
WO2009132618A1 (fr) Module à diodes électroluminescentes pouvant être monté en surface et procédé de production associé
DE112015000703B4 (de) Optoelektronisches Halbleiterbauelement
DE102014108368A1 (de) Oberflächenmontierbares Halbleiterbauelement und Verfahren zu dessen Herstellung
DE102015114292A1 (de) Laserbauelement und Verfahren zu seiner Herstellung
WO2014048830A1 (fr) Composant optoélectronique
DE102017128457A1 (de) Herstellung optoelektronischer bauelemente
WO2015010997A1 (fr) Composant à semi-conducteur optoélectronique pouvant être monté sur une surface et procédé permettant de produire au moins un composant à semi-conducteur optoélectronique pouvant être monté sur une surface
EP2415077A1 (fr) Composant optoélectronique
DE102014102184A1 (de) Herstellung eines optoelektronischen Bauelements
DE102016118990A1 (de) Sensor
DE102015109953A1 (de) Herstellung elektronischer Bauelemente
WO2017178332A1 (fr) Composant muni d'un réflecteur et procédé de fabrication de composants
EP3360167A1 (fr) Élément optoélectronique doté d'un châssis de connexion pourvu d'une structure de renforcement
WO2016074914A1 (fr) Composant semiconducteur optoélectronique et procédé de fabrication d'un composant semiconducteur optoélectronique
EP2486604B1 (fr) Mise en contact d'un composant semi-conducteur optoélectronique par un élément de conversion
DE102016101526A1 (de) Herstellung eines Multichip-Bauelements
DE102018131775A1 (de) Elektronisches Bauelement und Verfahren zur Herstellung eines elektronischen Bauelements
DE102013221429A1 (de) Optoelektronisches Bauelement und Verfahren zu seiner Herstellung
WO2016015911A1 (fr) Composant électronique et procédé de fabrication d'un composant électronique

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15732177

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15732177

Country of ref document: EP

Kind code of ref document: A1