WO2017134808A1 - Procédé pour production de dispositif à semi-conducteurs - Google Patents

Procédé pour production de dispositif à semi-conducteurs Download PDF

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Publication number
WO2017134808A1
WO2017134808A1 PCT/JP2016/053459 JP2016053459W WO2017134808A1 WO 2017134808 A1 WO2017134808 A1 WO 2017134808A1 JP 2016053459 W JP2016053459 W JP 2016053459W WO 2017134808 A1 WO2017134808 A1 WO 2017134808A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
manufacturing
range
semiconductor wafer
solvent
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2016/053459
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English (en)
Japanese (ja)
Inventor
小笠原　淳
浩二 伊東
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to PCT/JP2016/053459 priority Critical patent/WO2017134808A1/fr
Priority to CN201780000314.3A priority patent/CN107533972B/zh
Priority to PCT/JP2017/002218 priority patent/WO2017135094A1/fr
Priority to JP2017523009A priority patent/JP6235190B1/ja
Priority to TW106103485A priority patent/TWI612567B/zh
Publication of WO2017134808A1 publication Critical patent/WO2017134808A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C8/00—Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions
    • C03C8/02—Frit compositions, i.e. in a powdered or comminuted form
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C8/00—Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions
    • C03C8/02—Frit compositions, i.e. in a powdered or comminuted form
    • C03C8/04—Frit compositions, i.e. in a powdered or comminuted form containing zinc
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/50—PIN diodes 

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • a method of manufacturing a semiconductor device including a glass film forming step of forming a glass film on the surface of a semiconductor wafer is known (for example, Japanese Patent Laid-Open Nos. 63-22457 and 60-94729, No. 57-143832).
  • lead-free glass fine particles not containing lead are deposited on a mesa groove of a semiconductor wafer by electrophoretic deposition (EPD), and then the lead-free glass deposited in the mesa groove.
  • the passivation film of the semiconductor device is formed by firing the fine particles to vitrify.
  • a suspension in which lead-free glass fine particles are suspended in a solvent is used in the glass film forming step by electrophoretic deposition. And the characteristic of the electrolyte added to this suspension is not necessarily constant.
  • the adhesion of lead-free glass particles to the semiconductor wafer by the electrophoretic deposition method is not stable, and the thickness of the lead-free glass particles deposited in the mesa groove is accurately determined to a predetermined thickness.
  • it cannot be controlled it does not adhere until the thickness of the deposit of lead-free glass fine particles reaches a predetermined thickness).
  • the semiconductor device cut and separated from the semiconductor wafer As a result, the insulation properties (reverse characteristics) of the passivation film vary and the reliability of the semiconductor device is lowered.
  • the lead-free glass fine particle semiconductor by the electrophoretic deposition method due to the variation in the characteristics of the electrolyte added to the suspension.
  • the adhesion to the wafer is not stable and the thickness of the lead-free glass fine particles deposited in the mesa groove cannot be accurately controlled to a predetermined thickness.
  • an object of the present invention is to provide a method of manufacturing a semiconductor device capable of accurately controlling the thickness of the lead-free glass fine particles deposited in the mesa groove to a predetermined thickness.
  • a method for manufacturing a semiconductor device includes: A semiconductor wafer preparation step of preparing a semiconductor wafer having mesa grooves formed on a glass coating formation surface, and a suspension in which lead-free glass fine particles are suspended in a solvent, the first electrode plate and the second electrode plate are A state in which the semiconductor wafer is placed between the first electrode plate and the second electrode plate while facing each other while being immersed in the suspension, and the glass film forming surface faces the first electrode plate side A glass film forming step of forming a glass film on the glass film forming surface by electrophoretic deposition, and a method for manufacturing a semiconductor device,
  • the suspension used in the glass coating forming step is controlled by adding a surfactant, water, and an electrolyte to the solvent after controlling the dielectric constant of the solvent containing the lead-free glass fine particles to the first range.
  • the suspension is characterized in that its electric conductivity is controlled in the second range.
  • the electrical conductivity of the suspension is controlled in the second range by adjusting at least one of the surfactant, the water, and the electrolyte.
  • the first range of the dielectric constant of the solvent is in the range of 5 to 11.
  • the second range of the electrical conductivity of the suspension is characterized by being in the range of 200 nS / cm to 400 nS / cm.
  • the electrolyte Prior to being added to the solvent, the electrolyte has a conductivity controlled to a third range;
  • the third range of the electric conductivity of the electrolyte is 90 ⁇ S / cm to 130 ⁇ S / cm.
  • the electrolyte is a mixed solution containing an organic solvent and nitric acid.
  • the organic solvent is isopropyl alcohol or ethyl acetate.
  • the electrical conductivity of the electrolyte is controlled to the third range by adjusting a ratio of the nitric acid in the mixed solution.
  • the solvent is a mixed solvent of isopropyl alcohol and ethyl acetate.
  • the dielectric constant of the solvent is controlled to the first range by adjusting a ratio of the ethyl acetate in the mixed solvent.
  • the lead-free glass fine particles are lead-free glass fine particles containing at least one of SiO 2 , Al 2 O 3 , CaO, MgO, ZnO, B 2 O 3 , and BaO.
  • the surfactant is a nonionic surfactant.
  • the surfactant is polyethylene glycol.
  • the semiconductor wafer preparation step includes a step of preparing a semiconductor wafer having a pn junction parallel to the main surface; Forming an exposed portion of the pn junction on the inner surface of the groove by forming a groove having a depth exceeding the pn junction from one surface of the semiconductor wafer; And a step of forming a base insulating film on the inner surface of the groove so as to cover the exposed portion of the pn junction.
  • the semiconductor wafer preparation step A step of forming an exposed portion of a pn junction on the surface of the semiconductor wafer; and a step of forming a base insulating film on the surface of the semiconductor wafer so as to cover the exposed portion of the pn junction.
  • a method of manufacturing a semiconductor device includes a semiconductor wafer preparation step of preparing a semiconductor wafer having mesa grooves formed on a glass film forming surface, and a suspension in which lead-free glass fine particles are suspended in a solvent.
  • the first electrode plate and the second electrode plate are placed facing each other in a state where the first electrode plate and the second electrode plate are immersed in the suspension.
  • the suspension used in the glass film forming step is a method in which the dielectric constant of the solvent containing glass fine particles is controlled within the first range, and then the surfactant, water is added to the solvent whose dielectric constant is controlled within the first range. , And an electrolyte, and the electric conductivity is controlled to a second range. Then, the electrical conductivity of the suspension is controlled within the second range by adjusting at least one of the surfactant, water, and the electrolyte.
  • the dielectric constant of the solvent containing lead-free glass fine particles is controlled within the first range, and then the dielectric constant is controlled within the first range.
  • a surfactant, water, and an electrolyte are added to the lead-free glass particles in the suspension by electrophoretic deposition using a suspension in which the electrical conductivity is controlled to the second range. Deposit in mesa groove.
  • the thickness of the lead-free glass fine particles deposited in the mesa groove formed on the semiconductor wafer can be accurately controlled to a predetermined thickness.
  • the thickness of the lead-free glass particulate deposit is controlled to a predetermined thickness
  • the thickness of the passivation film obtained by firing and depositing the deposit is also controlled to a predetermined thickness. It is possible to improve the reliability of the semiconductor device by reducing variations in the insulating properties (reverse characteristics) of the passivation film of the semiconductor device cut and separated from the semiconductor wafer.
  • FIG. 1 is a diagram illustrating a process of a method for manufacturing a semiconductor device according to the first embodiment.
  • FIG. 2 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 1.
  • FIG. 3 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 2.
  • FIG. 4 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 3.
  • FIG. 5 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 4.
  • FIG. 6 is a diagram illustrating steps in the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 5.
  • FIG. 5 is a diagram illustrating steps in the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 5.
  • FIG. 7 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 6.
  • FIG. 8 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 7.
  • FIG. 9 is a cross-sectional view of the glass film forming apparatus 1 as seen from the lateral direction.
  • FIG. 10 is a diagram illustrating an example of the composition of the suspension 12 used in the electrophoretic deposition method of the semiconductor device manufacturing method according to the first embodiment.
  • FIG. 11 is a view showing the upper surface of a semiconductor wafer in which lead-free glass fine particles are deposited in the mesa groove by the semiconductor device manufacturing method according to the comparative example.
  • FIG. 12 is a view of a semiconductor wafer in which lead-free glass particles are deposited in mesa grooves by the method for manufacturing a semiconductor device according to the first embodiment.
  • the method of manufacturing a semiconductor device according to the first embodiment includes a “semiconductor wafer preparation step”, a “glass film formation step”, an “oxide film removal step”, and a “roughened region”.
  • the “forming process”, “electrode forming process”, and “semiconductor wafer cutting process” are performed in this order.
  • the semiconductor device manufacturing method according to the embodiment will be described below in the order of steps.
  • a p + type diffusion layer 112 is formed by diffusion of p type impurities from one surface of an n ⁇ type semiconductor wafer (for example, an n ⁇ type silicon wafer having a diameter of 4 inches) 110,
  • An n + -type diffusion layer 114 is formed by diffusion of n-type impurities from the other surface to prepare a semiconductor wafer in which a pn junction parallel to the main surface is formed (FIG. 1).
  • oxide films 116 and 118 are formed on the surfaces of the p + type diffusion layer 112 and the n + type diffusion layer 114 by thermal oxidation (FIG. 1).
  • a predetermined opening is formed in a predetermined portion of the oxide film 116 by a photoetching method.
  • the semiconductor wafer is subsequently etched to form a groove (mesa groove) 120 having a depth exceeding the pn junction from one surface of the semiconductor wafer (FIG. 2).
  • the exposed portion A of the pn junction is formed on the inner surface of the groove 120. That is, an exposed portion of the pn junction is formed on the surface of the semiconductor wafer.
  • a base insulating film 121 made of a silicon oxide film is formed on the inner surface of the groove 120 by a thermal oxidation method using dry oxygen (DryO 2 ) (FIG. 3). That is, the base insulating film 121 is formed on the surface of the semiconductor wafer (the inner surface of the groove 120) so as to cover the exposed portion A of the pn junction.
  • DryO 2 dry oxygen
  • the thickness of the base insulating film 121 is, for example, in the range of 5 nm to 60 nm (for example, 20 nm).
  • the base insulating film 121 is formed by placing the semiconductor wafer in a diffusion furnace and then treating it at a temperature of 900 ° C. for 10 minutes while flowing an oxygen gas. If the thickness of the base insulating film 121 is less than 5 nm, the effect of reducing the BT resistance may not be obtained. On the other hand, if the thickness of the base insulating film 121 exceeds 60 nm, it may not be possible to form a glass film by electrophoretic deposition in the next glass film forming process.
  • a semiconductor wafer having a mesa groove formed on the glass film forming surface is prepared.
  • a glass film forming apparatus having the following configuration, that is, a tank 10 for storing the suspension 12 in which the lead-free glass fine particles are suspended, and in a state facing each other.
  • the first electrode plate 14 and the second electrode plate 16 installed in the tank 10 are installed between the first electrode plate 14 and the second electrode plate 16 to dispose the semiconductor wafer W at a predetermined position.
  • a glass film forming apparatus including a semiconductor wafer placement jig (not shown) and a power supply device 20 for applying a potential to the first electrode plate 14 and the second electrode plate 16 is used (FIG. 9).
  • the first electrode plate 14 connected to the plus terminal and the first terminal connected to the minus terminal are inside the tank 10 storing the suspension 12 in which the lead-free glass particles are suspended.
  • the two electrode plates 16 are placed facing each other while being immersed in the suspension 12, and the semiconductor wafer W is formed between the first electrode plate 14 and the second electrode plate 16 on the surface on which the glass film is to be formed (FIG. 9).
  • the glass coating 124 is formed on the surface on which the glass coating is to be formed by electrophoretic deposition in a state where the inner surface of the groove is arranged in a posture facing the first electrode plate 14 side.
  • a voltage applied between the first electrode plate 14 and the second electrode plate 16 a voltage of 10V to 800V (for example, 400V) is applied.
  • the suspension 12 used in this glass film forming step is controlled in the first range of the dielectric constant of the solvent (1) containing the lead-free glass fine particles, and then the electrolyte (2 ), Water (3), and surfactant (4) are added, and the electrical conductivity (EC: Electro Conductivity) is controlled within the second range (see FIG. 10).
  • the lead-free glass particles made of lead-free glass include, for example, at least one of the following glass particles, that is, SiO 2 , Al 2 O 3 , CaO, MgO, ZnO, B 2 O 3 , BaO. And lead-free glass particles prepared from a melt obtained by melting a raw material containing substantially no Pb.
  • the solvent (1) is a mixed solvent of isopropyl alcohol and ethyl acetate.
  • the dielectric constant of the solvent (1) is controlled to the first range described above by adjusting the ratio of ethyl acetate in the mixed solvent.
  • the first range of the dielectric constant of the solvent (1) is in the range of 5 to 11 (more preferably 5 to 8).
  • the electrolyte (2) is a mixed solution of an organic solvent (isopropyl alcohol (IPA)) and nitric acid (HNO 3 ).
  • the volume ratio of the organic solvent and nitric acid in this mixed solution is, for example, 1000: 1 to 5.
  • the organic solvent may be ethyl acetate.
  • the electrical conductivity of the suspension 12 is adjusted to the second described above. Control to the range.
  • the second range of the electric conductivity of the suspension 12 is in the range of 200 nS / cm to 400 nS / cm.
  • the electrical conductivity (conductivity) of the suspension in which the lead glass powder is suspended is 150. ⁇ 50 ⁇ S / cm (see the above-mentioned JP-A-63-22457).
  • the condition of the electrical conductivity of the conventional suspension is greatly different from that of the second range of the electrical conductivity of the suspension 12 described above. And it has been confirmed that the lead-free glass applied in the present embodiment cannot be deposited in the mesa groove of the semiconductor element by the electrophoretic deposition method under the condition of the electrical conductivity of the conventional suspension.
  • the electric conductivity of the electrolyte (2) is controlled within the third range.
  • the electrical conductivity of the electrolyte (2) is controlled to the third range described above by adjusting the ratio of nitric acid in the mixed solution.
  • the third range of the electric conductivity of the electrolyte (2) is in the range of 90 ⁇ S / cm to 130 ⁇ S / cm.
  • the electrolyte (2) is about 30 to 40 cc
  • the surfactant (3) is about 30 to 40 cc
  • the water (4) is about 20 cc.
  • the surfactant (4) described above is more preferably a nonionic surfactant.
  • the surfactant (4) is polyethylene glycol.
  • volume ratio of isopropyl alcohol to the surfactant in the suspension 12 is, for example, 100: 1.
  • the dielectric constant of the solvent containing the lead-free glass fine particles is controlled within the first range (5 to 11), and then the dielectric constant is changed to the first dielectric constant.
  • the electrolyte (2), water (3), and surfactant (4) are added to the solvent controlled to the range (mixed solvent of isopropyl alcohol (IPA) and ethyl acetate), and the electric conductivity is adjusted to the second range.
  • the lead-free glass particles in the suspension are deposited on the mesa grooves of the semiconductor wafer by electrophoretic deposition using a suspension controlled at (200 nS / cm to 400 nS / cm).
  • the electric conductivity of the electrolyte (2) is controlled within the third range (90 ⁇ S / cm to 130 ⁇ S / cm).
  • the thickness of the lead-free glass fine particles deposited in the mesa groove formed in the semiconductor wafer can be accurately controlled to a predetermined thickness.
  • the thickness of the lead-free glass particulate deposit is controlled to a predetermined thickness
  • the thickness of the passivation film obtained by firing and depositing the deposit is also controlled to a predetermined thickness. It is possible to improve the reliability of the semiconductor device by reducing variations in the insulating properties (reverse characteristics) of the passivation film of the semiconductor device cut and separated from the semiconductor wafer.
  • Electrode forming step Ni plating is performed on the semiconductor wafer to form the anode electrode 134 on the roughened region 132 and the cathode electrode 136 is formed on the other surface of the semiconductor wafer (FIG. 7).
  • the semiconductor device (mesa type pn diode) 100 can be manufactured.
  • FIG. 11 is a view showing the upper surface of a semiconductor wafer in which lead-free glass fine particles are deposited in the mesa groove by the semiconductor device manufacturing method according to the comparative example.
  • FIG. 12 is a view of a semiconductor wafer in which lead-free glass fine particles are deposited in mesa grooves by the method for manufacturing a semiconductor device according to the first embodiment.
  • the electrical conductivity EC of the electrolyte is about 30 ⁇ S / cm.
  • the third range of the electrical conductivity EC of the electrolyte (2) is in the range of 100 ⁇ S / cm to 130 ⁇ S / cm.
  • the voltage between the electrodes during EPD is 150V.
  • the adhesion amount of the lead-free glass particles is only 22 mg, and the adhesion of the lead-free glass particles to the semiconductor wafer is stabilized. Therefore, the thickness of the lead-free glass fine particles deposited in the mesa groove cannot be accurately controlled to a predetermined thickness.
  • the adhesion amount of lead-free glass particles is 45 mg (electrical conductivity EC
  • the third range is 95 ⁇ S / cm) and 50 mg (the third range of electrical conductivity EC is 125 ⁇ S / cm), and the adhesion of lead-free glass particles to the semiconductor wafer is stable and deposited in the mesa groove.
  • the thickness of the lead-free glass fine particle deposit can be controlled to a predetermined thickness with high accuracy.
  • a method for manufacturing a semiconductor device includes a semiconductor wafer preparation step of preparing a semiconductor wafer having a mesa groove formed on a glass film forming surface, and suspending lead-free glass fine particles in a solvent.
  • the first electrode plate and the second electrode plate are placed opposite to each other in a state where the first electrode plate and the second electrode plate are immersed in the suspension, and the semiconductor wafer is glass between the first electrode plate and the second electrode plate.
  • a glass film forming step of forming a glass film on the glass film forming surface by an electrophoretic deposition method with the film forming surface facing the first electrode plate.
  • the suspension used in the glass film forming step is a method in which the dielectric constant of the solvent containing glass fine particles is controlled within the first range, and then the surfactant, water is added to the solvent whose dielectric constant is controlled within the first range. , And an electrolyte, and the electric conductivity is controlled to a second range. Then, the electrical conductivity of the suspension is controlled within the second range by adjusting at least one of the surfactant, water, and the electrolyte.
  • the dielectric constant of the solvent containing lead-free glass fine particles is controlled within the first range, and then the dielectric constant is controlled within the first range.
  • the mixed solvent of isopropyl alcohol and ethyl acetate is added with a surfactant, water, and an electrolyte, and the suspension is subjected to electrophoretic deposition using a suspension whose electric conductivity is controlled in the second range.
  • Lead-free glass particles in the liquid are deposited on the mesa groove of the semiconductor wafer.
  • the thickness of the lead-free glass fine particles deposited in the mesa groove formed on the semiconductor wafer can be accurately controlled to a predetermined thickness.
  • the thickness of the lead-free glass particulate deposit is controlled to a predetermined thickness
  • the thickness of the passivation film obtained by firing and depositing the deposit is also controlled to a predetermined thickness. It is possible to improve the reliability of the semiconductor device by reducing variations in the insulating properties (reverse characteristics) of the passivation film of the semiconductor device cut and separated from the semiconductor wafer.
  • a semiconductor wafer plate made of silicon is used as the semiconductor wafer, but the present invention is not limited to this.
  • a semiconductor wafer made of SiC, GaN, GaO or the like can be used.

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  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Procédé de fabrication d'un dispositif à semi-conducteurs comprenant : une étape de préparation de plaquette semi-conductrice dans laquelle est préparée une plaquette semi-conductrice qui présente une rainure mésa formée sur une surface de formation de revêtement de verre ; et une étape de formation de revêtement de verre dans laquelle une première plaque d'électrode et une seconde plaque électrode sont installées, se faisant face dans une suspension, qui est formée par la suspension de particules fines de verre sans plomb dans un solvant, lesdites plaques d'électrode étant immergées dans la suspension, et un revêtement de verre étant formé sur la surface de formation de revêtement de verre par dépôt électrophorétique avec la plaquette semi-conductrice disposée entre la première plaque d'électrode et la seconde plaque d'électrode de telle sorte que la surface de formation de revêtement de verre fait face au côté première plaque d'électrode.
PCT/JP2016/053459 2016-02-05 2016-02-05 Procédé pour production de dispositif à semi-conducteurs Ceased WO2017134808A1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
PCT/JP2016/053459 WO2017134808A1 (fr) 2016-02-05 2016-02-05 Procédé pour production de dispositif à semi-conducteurs
CN201780000314.3A CN107533972B (zh) 2016-02-05 2017-01-24 半导体装置的制造方法
PCT/JP2017/002218 WO2017135094A1 (fr) 2016-02-05 2017-01-24 Procédé pour production de dispositif à semi-conducteurs
JP2017523009A JP6235190B1 (ja) 2016-02-05 2017-01-24 半導体装置の製造方法
TW106103485A TWI612567B (zh) 2016-02-05 2017-02-02 半導體裝置的製造方法

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PCT/JP2016/053459 WO2017134808A1 (fr) 2016-02-05 2016-02-05 Procédé pour production de dispositif à semi-conducteurs

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WO2017134808A1 true WO2017134808A1 (fr) 2017-08-10

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JP6235190B1 (ja) * 2016-02-05 2017-11-22 新電元工業株式会社 半導体装置の製造方法

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CN109121423B (zh) * 2017-04-19 2020-05-19 新电元工业株式会社 半导体装置的制造方法
DE112024000163T5 (de) * 2023-12-21 2025-11-27 Shindengen Electric Manufacturing Co., Ltd. Verfahren zur Herstellung einer Halbleitervorrichtung und einer Mesa-Diode

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JPS5834198A (ja) * 1981-08-21 1983-02-28 Toshiba Corp 粉体塗布方法
JPH033931B2 (fr) * 1983-10-27 1991-01-21 Nippon Electric Glass Co
WO2013168314A1 (fr) * 2012-05-08 2013-11-14 新電元工業株式会社 Procédé de fabrication de dispositif semi-conducteur et dispositif semi-conducteur

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JPS5596640A (en) * 1979-01-19 1980-07-23 Hitachi Ltd Method of forming glass film on semiconductor substrate
JPS582034A (ja) * 1981-06-29 1983-01-07 Toshiba Corp 半導体装置の製造方法
JPS5951533A (ja) * 1982-09-17 1984-03-26 Matsushita Electronics Corp 半導体装置の製造方法
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WO2011093177A1 (fr) * 2010-01-28 2011-08-04 日本電気硝子株式会社 Verre pour revêtement de semi-conducteur et matériau pour revêtement de semi-conducteur l'utilisant
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WO2017134808A1 (fr) * 2016-02-05 2017-08-10 新電元工業株式会社 Procédé pour production de dispositif à semi-conducteurs

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JPS57143832A (en) * 1981-02-27 1982-09-06 Matsushita Electronics Corp Manufacture of semiconductor device
JPS5834198A (ja) * 1981-08-21 1983-02-28 Toshiba Corp 粉体塗布方法
JPH033931B2 (fr) * 1983-10-27 1991-01-21 Nippon Electric Glass Co
WO2013168314A1 (fr) * 2012-05-08 2013-11-14 新電元工業株式会社 Procédé de fabrication de dispositif semi-conducteur et dispositif semi-conducteur

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CN107533972B (zh) 2020-07-24
JP6235190B1 (ja) 2017-11-22
WO2017135094A1 (fr) 2017-08-10
CN107533972A (zh) 2018-01-02
TWI612567B (zh) 2018-01-21
JPWO2017135094A1 (ja) 2018-02-08

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