WO2017168220A1 - Contrôleur destiné à être utilisé avec un convertisseur d'énergie, et son procédé de fonctionnement - Google Patents

Contrôleur destiné à être utilisé avec un convertisseur d'énergie, et son procédé de fonctionnement Download PDF

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Publication number
WO2017168220A1
WO2017168220A1 PCT/IB2016/053312 IB2016053312W WO2017168220A1 WO 2017168220 A1 WO2017168220 A1 WO 2017168220A1 IB 2016053312 W IB2016053312 W IB 2016053312W WO 2017168220 A1 WO2017168220 A1 WO 2017168220A1
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WIPO (PCT)
Prior art keywords
side switching
switching device
low
bias voltage
power converter
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PCT/IB2016/053312
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English (en)
Inventor
Magnus Karlsson
Jonas Malmberg
Fredrik Wahledow
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Telefonaktiebolaget LM Ericsson AB
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Telefonaktiebolaget LM Ericsson AB
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/40—Means for preventing magnetic saturation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/3353—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having at least two simultaneously operating switches on the input side, e.g. "double forward" or "double (switched) flyback" converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/337—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration
    • H02M3/3376—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration with automatic control of output voltage or current
    • H02M3/3378—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration with automatic control of output voltage or current in a push-pull configuration of the parallel type

Definitions

  • the present invention is directed, in general, to the field of power electronics and, more specifically, to a controller for use with a power converter, and method of operating the same.
  • a switched-mode power converter is a type of power converter having a diverse range of applications by virtue of its small size, weight and high efficiency.
  • switched-mode power converters are widely used in personal computers and portable electronic devices such as cellphones.
  • a switching device e.g., a metal-oxide semiconductor field-effect transistor ("MOSFET")
  • MOSFET metal-oxide semiconductor field-effect transistor
  • the switched-mode power converters have for many years been designed for higher power conversion efficiency in a load range of 50 to 100 percent. This has led to the adoption of more efficient rectification techniques for the switched-mode power converters such as synchronous rectification, which yield high efficiency at high current levels.
  • An orderly start-up process of the switched-mode power converter is often employed to balance a magnetic flux of a transformer thereof around zero.
  • the start-up process may include an application of a first voltage pulse of half a duty cycle to the power train.
  • This is often referred to as half-pulse transformer balancing as described in U.S. Patent Application Publication No. 201 1/0164438, entitled "Switch Mode Converter and a Method of Starting a Switched Mode Converter," to Appelberg, published July 7, 201 1, which is incorporated herein by reference.
  • Unequal voltages resulting, for instance, from parasitic capacitances in the switching devices evident on a primary winding of the transformer within the switched-mode power converter may cause challenges to the operation of the half-pulse transformer balancing technique.
  • the power converter includes a power train having a first high-side switching device coupled in series at a first circuit node with a first low-side switching device.
  • the controller of the power converter is coupled to a first bias voltage boot-strap capacitor having a first terminal couplable to a first bias voltage source and a second terminal coupled to the first circuit node.
  • the controller includes a processor and a memory including computer program code that are collectively operable to apply a short control pulse to and momentarily turn on the first low-side switching device to charge up the first bias voltage boot-strap capacitor via the first bias voltage source at a start-up of the power converter.
  • FIGURE 1 illustrates a schematic diagram of an embodiment of a power converter
  • FIGUREs 2 and 3 illustrate timing diagrams demonstrating operations of the power converter of FIGURE 1;
  • FIGURE 4 illustrates a schematic diagram of an embodiment of a power converter
  • FIGUREs 5 and 6 illustrate schematic diagrams of embodiments of portions of the power converter of FIGURE 4;
  • FIGUREs 7 to 10 illustrate timing diagrams demonstrating operations of the power converter of FIGUREs 4 to 6;
  • FIGURE 11 illustrates a schematic diagram of an embodiment of a power converter
  • FIGUREs 12 and 13 illustrate schematic diagrams of embodiments of portions of the power converter of FIGURE 11 ;
  • FIGUREs 14 to 16 illustrate timing diagrams demonstrating operations of the power converter of FIGUREs 11 to 13;
  • FIGURE 17 illustrates a flow diagram of an embodiment of a method of operating a power converter.
  • a process will be described herein with respect to exemplary embodiments in a specific context, namely, a system and method of controlling an operation of a power converter to reduce magnetic flux saturation in a transformer thereof. While the principles will be described in the environment of a power converter, any environment such as a motor controller that may benefit from such a system and method that enables these functionalities is well within the broad scope of the present disclosure.
  • a power train of the power converter receives an input voltage Vi n and includes first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 arranged in a full bridge
  • the first high-side switching device Q 1 is coupled in series at a first circuit node Va with the first low-side switching device Q3.
  • the second high-side switching device Q2 is coupled in series at a second circuit node Vb with the second low-side switching device Q4.
  • the first and second circuit nodes Va, Vb are coupled to opposite ends of a primary winding of a transformer TR.
  • a secondary winding of the transformer TR is coupled to a synchronous rectifier formed by a third high-side switching device Q5 (including a parasitic capacitance, not shown) and a third low-side switching device Q6 (including a parasitic capacitance, not shown).
  • a center tap of the secondary winding of the transformer TR is coupled to an output filter including output inductor L and output capacitor C that filters an output voltage V out provided to a load represented by a resistor R.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are controlled to provide a high frequency alternating current ("ac") voltage to the primary winding of the transformer TR.
  • the high frequency ac voltage is impressed across to the secondary winding of the transformer TR and the third high-side switching device Q5 and the third low-side switching device Q6 are controlled to provide a rectified direct current (“dc") voltage.
  • the rectified dc voltage is then filtered by the output filter, which provides the output voltage V ou t to the load R.
  • the switching devices are illustrated as MOSFETs, it should be understood that any semiconductor switch technology can be used as the application dictates.
  • the power train includes a full bridge configuration and synchronous rectifier, other topologies and rectification techniques may be employed to advantage.
  • the half-pulse transformer balancing techniques are limited due to unequal voltages produced at the first and second circuit nodes Va, Vb.
  • Unequal voltages are due to unbalances in a capacitive voltage divider formed by parasitic capacitances in the switching devices (see, e.g. , illustrated as parallel capacitances in FIGURE 4).
  • FIGURE 2 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURE 1.
  • the timing diagrams represent the conduction intervals for the switching devices Q l, Q2, Q3, Q4, Q5, Q6 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 conduct for a duty cycle D delivering energy to the transformer TR.
  • the third low-side switching device Q6 is also conducting during this time.
  • the first and second high-side switching devices Q l, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the third high-side and low-side switching devices Q5, Q6 of the synchronous rectifier.
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to the transformer TR.
  • the third high-side switching device Q5 is also conducting during this time.
  • the first and second high-side switching devices Q l, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the third high- side and low-side switching devices Q5, Q6 of the synchronous rectifier.
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the application of full duty cycles to the transformer TR during a start-up of the power converter can produce saturation of the magnetic core thereof resulting in excessive currents. It is advantageous if both legs in the primary winding of the transformer TR transfer substantially the same amount of energy to keep the magnetic flux therein substantially balanced, thereby avoiding excessive currents in the power converter, particularly at start-up.
  • FIGURE 3 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURE 1.
  • the timing diagrams represent the conduction intervals for the switching devices Ql, Q2, Q3, Q4, Q5, Q6 over a switching interval T as a function of time t (on the horizontal axis).
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to the transformer TR.
  • the third high-side switching devices Q5 is also conducting during this time.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the third high-side and low-side switching devices Q5, Q6 of the synchronous rectifier.
  • the timing diagrams of FIGURE 3 follow an analogous pattern as the timing diagrams of FIGURE 2.
  • the application of half duty cycles for the second high-side switching device Q2 and the first low-side switching device Q3 at start-up of the power converter can avoid saturation of the magnetic core of the transformer TR and the large currents that can result from saturation of the magnetic core of transformer TR.
  • FIGURE 4 illustrated is a schematic diagram of an embodiment of a power converter.
  • a power train of the power converter receives an input voltage Vi n and includes first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 arranged in a full bridge configuration and including parasitic capacitances (illustrated with dotted lines as parallel capacitances).
  • the first high-side switching device Q 1 is coupled in series at a first circuit node Va with the first low-side switching device Q3.
  • the second high-side switching device Q2 is coupled in series at a second circuit node Vb with the second low-side switching device Q4.
  • the first and second circuit nodes Va, Vb are coupled to opposite ends of a primary winding of a transformer TR.
  • a secondary winding of the transformer TR is coupled to a synchronous rectifier formed by a third high-side switching device Q5 (including a parasitic capacitance, not shown) coupled to a third low-side switching device Q6 (including a parasitic capacitance, not shown).
  • a center tap of the secondary winding of the transformer TR is coupled to an output filter including output inductor L and output capacitor C that filters an output voltage V ou t provided to a load represented by a resistor R.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are controlled to provide a high frequency ac voltage to the primary winding of the transformer TR.
  • the high frequency ac voltage is impressed across to the secondary winding of the transformer TR and the third high-side switching device Q5 and the third low-side switching device Q6 are controlled to provide a rectified dc voltage.
  • the rectified dc voltage is then filtered by the output filter, which provides the output voltage V ou t to the load R.
  • the switching devices are illustrated as MOSFETs, it should be understood that any semiconductor switch technology can be used as the application dictates.
  • the power train includes a full bridge configuration and synchronous rectifier, other topologies and rectification techniques may be employed to advantage.
  • a controller 410 including a processor (“PR”) 420 and memory (“M”) 430 controls and generates control signals for the first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 to regulate the output voltage Vout (an output characteristic of the power converter).
  • the controller 410 also generates control signals for the synchronous rectifier formed by the third high-side switching device Q5 and the third low-side switching device Q6.
  • the processor 420 may be embodied as any type of processor and associated circuitry configured to perform one or more of the functions described herein.
  • the processor 420 may be embodied as or otherwise include a single or multi- core processor, an application specific integrated circuit, a collection of logic devices, or other circuits.
  • the memory 430 may be embodied as read-only memory devices and/or random access memory devices.
  • the memory 430 may be embodied as or otherwise include dynamic random access memory devices ("DRAM”), synchronous dynamic random access memory devices (“SDRAM”), double-data rate dynamic random access memory devices (“DDR SDRAM”), and/or other volatile or non-volatile memory devices.
  • DRAM dynamic random access memory devices
  • SDRAM synchronous dynamic random access memory devices
  • DDR SDRAM double-data rate dynamic random access memory devices
  • the memory 430 may have stored therein programs including a plurality of instructions or computer program code for execution by the processor 420 to control particular functions of the power converter as discussed in more detail below.
  • the voltages at the first and second circuit nodes Va, Vb are about half the input voltage V m during portions of the operation of the power train. At times, however, the voltages at the first and second circuit nodes Va, Vb may compromise half-pulse transformer magnetic flux balancing, since the resulting magnetic flux induced in the transformer TR at start-up does not correspond to half of the peak-to-peak magnetic flux.
  • FIGURE 5 illustrated is a schematic diagram of an embodiment of portions of the power converter of FIGURE 4.
  • the first high-side switching device Q 1 is coupled in series at the first circuit node Va with the first low-side switching device Q3.
  • the power converter includes a first driver 510 for the first high-side switching device Q l and a second driver 520 for the first low-side switching device Q3.
  • the first driver 510 receives a control signal Gl from the controller 410 and provides a gate drive signal to the first high-side switching device Q 1.
  • a level shifter (“LS") enables the first driver 510 to drive the first high-side switching device Ql referenced to local circuit ground.
  • LS level shifter
  • the second driver 520 receives a control signal G3 from the controller 410 and provides a gate drive signal to the first low-side switching device Q3.
  • a first bias voltage boot-strap capacitor CBI has a first terminal couplable to a first bias voltage source VD and a second terminal coupled to the first circuit node Va.
  • a first blocking diode DBI is couplable between the first bias voltage source VD and the first terminal of the first bias voltage boot-strap capacitor CBI.
  • the first bias voltage boot-strap capacitor CBI retains a bias voltage for the first driver 510.
  • the first bias voltage source VD is often about 5 to 10 volts ("V") and may be derived from a voltage divider that can be formed with capacitors from the input voltage V; n (which can be substantially higher such as 50 volts). Hence, the first bias voltage source VD is produced and increases after application of the input voltage Vi n .
  • the first circuit node Va is capacitively divided to produce a driver voltage from the first bias voltage source VD.
  • the capacitance of the first bias voltage boot-strap capacitor CBI is usually ten times or more than the parasitic capacitances of the first high-side switching device Q 1 and the first low-side switching device Q3. Hence, the first bias voltage bootstrap capacitor CBI may not be fully charged when initially applying the input voltage V; n to the power converter. An effective way of charging the first bias voltage boot-strap capacitor CBI is to initially turn on the first low-side switching device Q3.
  • the first high-side switching device Q 1 cannot be turned on due to absence of an initial voltage across the first bias voltage boot-strap capacitor CBI.
  • charging of the first bias voltage boot-strap capacitor CBI should be performed before commencing a half-pulse transformer magnetic flux balancing procedure.
  • FIGURE 6 illustrated is a schematic diagram of an embodiment of portions of the power converter of FIGURE 4.
  • the second high-side switching device Q2 is coupled in series at the second circuit node Vb with the second low-side switching device Q4.
  • the power converter includes a third driver 610 for the second high-side switching device Q2 and a fourth driver 620 for the second low-side switching device Q4.
  • the third driver 610 receives a control signal G2 from the controller 410 and provides a gate drive signal to the second high-side switching device Q2.
  • a level shifter (“LS") enables the third driver 610 to drive the second high-side switching device Q2 referenced to local circuit ground.
  • LS level shifter
  • the fourth driver 620 receives a control signal G4 from the controller 410 and provides a gate drive signal to the second low-side switching device Q4.
  • a second bias voltage boot-strap capacitor CBI has a first terminal couplable to the first bias voltage source VD and a second terminal coupled to the second circuit node Vb.
  • a second blocking diode D B2 is couplable between the first bias voltage source VD and the first terminal of the second bias voltage boot-strap capacitor CB 2 -
  • the second bias voltage boot-strap capacitor CB 2 retains a bias voltage for the third driver 610.
  • the first bias voltage source VD is often about 5 to 10 volts ("V") and may be derived from a voltage divider that can be formed with capacitors from the input voltage V; n (which can be substantially higher such as 50 volts). Hence, the first bias voltage source VD is produced and increases after application of the input voltage V; n .
  • the second circuit node Vb is capacitively divided to produce a driver voltage from the first bias voltage source VD.
  • the capacitance of the second bias voltage boot-strap capacitor CB 2 is usually ten times or more than the parasitic capacitances of the second high-side switching device Q2 and the second low-side switching device Q4. Hence, the second bias voltage boot-strap capacitor CB 2 may not be fully charged when initially applying the input voltage V; n to the power converter.
  • An effective way of charging the second bias voltage boot-strap capacitor CB 2 is to initially turn on the second low-side switching device Q4.
  • the second high-side switching device Q2 cannot be turned on due to absence of an initial voltage across the second bias voltage boot-strap capacitor CB 2 -
  • charging of the second bias voltage boot-strap capacitor CB 2 should be performed before commencing a half-pulse transformer magnetic flux balancing procedure.
  • an improved magnetic flux balancing timing sequence for the transformer is employed for start-up in a pre-bias situation.
  • the first energy transfer and transformer balancing pulse (a short control pulse) is improved by discharging parasitic capacitances of the first and second low-side switching devices Q3, Q4 of the power train, and charging the first and second bias voltage boot-strap capacitors CBI, CB2 for the first and second high-side switching devices Q l, Q2, respectively.
  • a similar bias voltage boot-strap capacitor and accompanying components can be applied to the synchronous rectifier.
  • the operation of the power converter can be divided into multiple sections. Initially, a short control pulse is applied to at least one of the low-side switching devices (e.g. , the first low-side switching device Q3) to discharge a parasitic capacitance thereof, and charge a bias voltage boot-strap capacitor (e.g., the first bias voltage boot-strap capacitor CBI) for the corresponding high-side switching device (e.g., the first high-side switching device Q l). Then, a half-pulse magnetic flex balancing for the transformer TR is initiated.
  • the low-side switching devices e.g., the first low-side switching device Q3
  • a bias voltage boot-strap capacitor e.g., the first bias voltage boot-strap capacitor CBI
  • the controller 410 controls the operation of the first and second high-side switching devices Q l, Q2 and the first and second low-side switching devices Q3, Q4 and synchronous rectifier to regulate the output voltage V ou t-
  • the controller 410 controls the operation of the first and second high-side switching devices Q l, Q2 and the first and second low-side switching devices Q3, Q4 and synchronous rectifier to regulate the output voltage V ou t-
  • many variants and orders of the short control pulses are possible.
  • FIGURE 7 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURES 4 to 6.
  • the timing diagrams represent the conduction intervals for the switching devices Q l, Q2, Q3, Q4 over a switching interval T as a function of time t (on the horizontal axis).
  • short control pulses 710, 720 are applied to briefly turn on (and then turn off) and discharge the parasitic capacitances of the first and second low-side switching devices Q3, Q4, respectively, of the power train.
  • the first and second bias voltage boot-strap capacitors CBI, CB2 are also charged for the first and second high-side switching devices Q l, Q2, respectively.
  • a duration of the short control pulses 710, 720 may be varied depending on the application. For instance, there may be times when the short control pulses 710, 720 are limited to one percent or five percent of the switching interval T. Additionally, the duration of the short control pulses 710, 720 may be different for the first and second low-side switching devices Q3, Q4, respectively. Thus, the duration of the short control pulses 710, 720 is limited to substantially maintain a magnetic flux balance in the transformer TR while sufficient to charge the first and second bias voltage boot-strap capacitors CBI, CB2, respectively.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to and maintain a magnetic flux balance of the transformer TR for a period representing half a duty cycle D/2. Then, the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier.
  • the first high-side switching device Q 1 and the second low-side switching device Q4 conduct for a duty cycle D delivering energy to the transformer TR.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier.
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to the transformer TR.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier.
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • both legs in the primary winding of the transformer TR transfer substantially the same amount of energy to keep the magnetic flux therein substantially balanced, thereby avoiding excessive currents in the power converter, particularly at start-up.
  • FIGURE 8 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURES 4 to 6.
  • the timing diagrams represent the conduction intervals for the switching devices Q l, Q2, Q3, Q4 over a switching interval T as a function of time t (on the horizontal axis).
  • a short control pulse 810 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the second low-side switching device Q4 of the power train.
  • the second bias voltage boot-strap capacitor CB 2 is also charged for the second high-side switching device Q2.
  • FIGURE 9 illustrated are timing diagrams demonstrating an operation of the power converter of FIGUREs 4 to 6.
  • the timing diagrams represent the conduction intervals for the switching devices Q l, Q2, Q3, Q4 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 are controlled with the same control signal
  • the second high-side switching device Q2 and the first low-side switching device Q3 are controlled with the same control signal, thereby reducing the number of control signals per the switching interval T.
  • a short control pulse 910 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the second low-side switching device Q4 of the power train. While the short control pulse 910 is also applied to the first high-side switching device Ql, it is sufficiently short in duration to avoid any damage to the power converter. It should be noted that the short-circuit current from the input voltage Vi n (as a result of the simultaneous conduction of the switching devices Ql, Q4) that may cause the damage may also be limited by an input filter choke to the power converter..
  • the second bias voltage boot-strap capacitor CB 2 is also charged for the second high-side switching device Q2.
  • FIGURE 10 illustrated are timing diagrams demonstrating an operation of the power converter of FIGUREs 4 to 6.
  • the timing diagrams represent the conduction intervals for the switching devices Q l, Q2, Q3, Q4 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 are controlled with the same control signal
  • the second high-side switching device Q2 and the first low-side switching device Q3 are controlled with the same control signal, thereby reducing the number of control signals per the switching interval T.
  • short control pulses 1010, 1020 are applied to briefly turn on (and then turn off) and discharge the parasitic capacitances of the first and second low-side switching devices Q3, Q4, respectively, of the power train. While the short control pulses 1010, 1020 are also applied to the first and second high- side switching devices Q l, Q2, they are sufficiently short in duration to avoid any damage to the power converter. It should be noted that the short-circuit current from the input voltage Vi n (as a result of the simultaneous conduction of the switching devices Q 1, Q2, Q3, Q4) that may cause the damage may also be limited by an input filter choke to the power converter.
  • the first and second bias voltage boot-strap capacitors CBI, CB 2 are also charged for the first and second high-side switching devices Ql, Q2, respectively.
  • the application of the short control pulses 1010, 1020 reduce the magnetic flux unbalance in the transformer TR since the parasitic capacitances are discharged through the first and second low-side switching devices Q3, Q4 and not through the transformer TR.
  • the duration of the short control pulses 1010, 1020 may be varied depending on the application. Thereafter, the timing diagrams of FIGURE 10 follow an analogous pattern as the timing diagrams of FIGURE 7.
  • FIGURE 11 illustrated is a schematic diagram of an embodiment of a power converter.
  • a power train of the power converter receives an input voltage Vi n and includes first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 arranged in a full bridge configuration and including parasitic capacitances (not shown).
  • the first high-side switching device Q l is coupled in series at a first circuit node Va with the first low-side switching device Q3.
  • the second high-side switching device Q2 is coupled in series at a second circuit node Vb with the second low-side switching device Q4.
  • the first and second circuit nodes Va, Vb are coupled to opposite ends of a primary winding of a transformer TR.
  • a secondary winding of the transformer TR is coupled to a synchronous rectifier in a full bridge configuration formed by a third high-side switching device Q5 (including a parasitic capacitance, not shown) coupled to a third low-side switching device Q7 (including a parasitic capacitance, not shown) at a third circuit node Vc.
  • the synchronous rectifier is also formed by a fourth high-side switching device Q6 (including a parasitic capacitance, not shown) coupled to a fourth low-side switching device Q8 (including a parasitic capacitance, not shown) at a fourth circuit node Vd.
  • the third and fourth circuit nodes Vc, Vd are coupled to the secondary winding of the transformer TR.
  • the synchronous rectifier is coupled to an output filter including output inductor L and output capacitor C that filters an output voltage V ou t provided to a load represented by a resistor R.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are controlled to provide a high frequency ac voltage to the primary winding of the transformer TR.
  • the high frequency ac voltage is impressed across to the secondary winding of the transformer TR and the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8 are controlled to provide a rectified dc voltage.
  • the rectified dc voltage is then filtered by the output filter, which provides the output voltage V ou t to the load R.
  • the switching devices are illustrated as MOSFETs, it should be understood that any semiconductor switch technology can be used as the application dictates.
  • the power train includes a full bridge configuration and synchronous rectifier, other topologies and rectification techniques may be employed to advantage.
  • a controller 1110 including a processor (“PR”) 1120 and memory (“M”) 1130 controls and generates control signals for the first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 to regulate the output voltage Vout (an output characteristic of the power converter).
  • the controller 1110 also generates control signals for the synchronous rectifier formed by the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8.
  • a description of analogous controller 410 is described above with respect to FIGURE 4.
  • the voltages at the first and second circuit nodes Va, Vb are about half the input voltage Vi n during portions of the operation of the power train.
  • the voltages at the first and second circuit nodes Va, Vb may compromise half-pulse transformer magnetic flux balancing, since the resulting magnetic flux induced in the transformer TR at start-up does not correspond to half of the peak-to-peak magnetic flux.
  • FIGURE 12 illustrated is a schematic diagram of an embodiment of portions of the power converter of FIGURE 11.
  • the drivers and accompanying components for the first and second high-side switching devices Ql, Q2, and first and second low-side switching devices Q3, Q4 are analogous to the drivers as set forth above with respect to FIGUREs 5 and 6 and, as such, will not be herein repeated.
  • the third high-side switching device Q5 is coupled in series at the third circuit node Vc with the third low-side switching device Q7.
  • the power converter includes a driver 1210 for the third high-side switching device Q5 and another driver 1220 for the third low-side switching device Q7.
  • the driver 1210 receives a control signal G5 from the controller 1110 and provides a gate drive signal to the third high-side switching device Q5.
  • a level shifter (“LS") enables the driver 1210 to drive the third high-side switching device Q5 referenced to local circuit ground.
  • the another driver 1220 receives a control signal G7 from the controller 1110 and provides a gate drive signal to the third low-side switching device Q7.
  • a bias voltage boot-strap capacitor CBS has a first terminal couplable to a bias voltage source VDS and a second terminal coupled to the third circuit node Vc.
  • a blocking diode D B s is couplable between the bias voltage source VDS and the first terminal of the bias voltage boot-strap capacitor CBS-
  • the bias voltage boot-strap capacitor CBS retains a bias voltage for the drivers 1210, 1220.
  • the bias voltage source VDS is often about 5 to 10 volts ("V") and may be derived from a voltage divider that can be formed with capacitors from the input voltage Vin (which can be substantially higher such as 50 volts). Hence, the bias voltage source VDS is produced and increases after application of the input voltage Vin.
  • FIGURE 13 illustrated is a schematic diagram of an embodiment of portions of the power converter of FIGURE 11.
  • the fourth high-side switching device Q6 is coupled in series at the fourth circuit node Vd with the fourth low-side switching device Q8.
  • the power converter includes a driver 1310 for the fourth high-side switching device Q6 and another driver 1320 for the fourth low-side switching device Q8.
  • the driver 1310 receives a control signal G6 from the controller 1110 and provides a gate drive signal to the fourth high-side switching device Q6.
  • a level shifter (“LS") enables the driver 1310 to drive the fourth high-side switching device Q6 referenced to local circuit ground.
  • LS level shifter
  • the another driver 1320 receives a control signal G8 from the controller 1110 and provides a gate drive signal to the fourth low-side switching device Q8.
  • a bias voltage boot-strap capacitor CBS has a first terminal couplable to a bias voltage source VDS and a second terminal coupled to the third circuit node Vd.
  • a blocking diode D B s is couplable between the bias voltage source VDS and the first terminal of the bias voltage boot-strap capacitor CBS-
  • the bias voltage boot-strap capacitor CBS retains a bias voltage for the drivers 1310, 1320.
  • the bias voltage source VDS is often about 5 to 10 volts ("V") and may be derived from a voltage divider that can be formed with capacitors from the input voltage V m (which can be substantially higher such as 50 volts). Hence, the bias voltage source VDS is produced and increases after application of the input voltage V; N .
  • FIGURE 14 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURES 11 to 13.
  • the timing diagrams represent the conduction intervals for the switching devices Ql, Q2, Q3, Q4, Q5, Q6, Q7, Q8 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 are controlled with the same control signal
  • the second high-side switching device Q2 and the first low-side switching device Q3 are controlled with the same control signal, thereby reducing the number of control signals per the switching interval T.
  • the third high-side switching device Q5 and the fourth low-side switching device Q8 are controlled with the same control signal, and the fourth high-side switching device Q6 and the third low-side switching device Q7 are controlled with the same control signal, thereby reducing the number of control signals for the synchronous rectifier per the switching interval T.
  • a short control pulse 1410 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the second low-side switching device Q4 of the power train. While the short control pulse 1410 is also applied to the first high-side switching device Ql, it is sufficiently short in duration to avoid any damage to the power converter. It should be noted that the short-circuit current from the input voltage V; n (as a result of the simultaneous conduction of the switching devices Ql, Q4) that may cause the damage may also be limited by an input filter choke to the power converter..
  • a second bias voltage boot-strap capacitor CB 2 is also charged for the second high-side switching device Q2 (see, e.g. , FIGURE 6). With this procedure, discharge of parasitic capacitance of the first low-side switching device Q3 is performed through the transformer TR, which may produce a small, possibly inconsequential, magnetic flux unbalance thereof.
  • a short control pulse 1420 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the fourth low-side switching device Q8 of the synchronous rectifier.
  • the short control pulse 1420 is also applied to the third high-side switching device Q5.
  • the short control pulse 1420 is sufficiently short in duration to prevent (via circuit inductance) a damaging current from flowing within the power converter.
  • a bias voltage boot-strap capacitor CBS is also charged for the fourth high-side switching device Q6 (see, e.g., FIGURE 13). Again, the duration of the short control pulses 1410, 1420 may be varied depending on the application.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to and maintain a magnetic flux balance of the transformer TR for a period representing half a duty cycle D/2.
  • the fourth high- side switching device Q6 and the third low-side switching device Q7 are also conducting during this time.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier as the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8 are conducting.
  • the first high-side switching device Q 1 and the second low-side switching device Q4 conduct for a duty cycle D delivering energy to the transformer TR.
  • the third high-side switching device Q5 and the fourth low-side switching device Q8 are also conducting during this time.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier (as the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8 are conducting).
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to the transformer TR.
  • the fourth high-side switching device Q6 and the third low-side switching device Q7 are also conducting during this time.
  • the first and second high-side switching devices Q l, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier (as the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8 are conducting).
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • both legs in the primary winding of the transformer TR transfer substantially the same amount of energy to keep the magnetic flux therein substantially balanced, thereby avoiding excessive currents in the power converter, particularly at start-up.
  • FIGURE 15 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURES 11 to 13.
  • the timing diagrams represent the conduction intervals for the switching devices Ql, Q2, Q3, Q4, Q5, Q6, Q7, Q8 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 are controlled with the same control signal
  • the second high-side switching device Q2 and the first low-side switching device Q3 are controlled with the same control signal, thereby reducing the number of control signals per the switching interval T.
  • the third high-side switching device Q5 and the fourth low-side switching device Q8 are controlled with the same control signal, and the fourth high-side switching device Q6 and the third low-side switching device Q7 are controlled with the same control signal, thereby reducing the number of control signals for the synchronous rectifier per the switching interval T.
  • a short control pulse 1510 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the second low-side switching device Q4 of the power train. While the short control pulse 1510 is also applied to the first high-side switching device Ql, it is sufficiently short in duration to avoid any damage to the power converter. It should be noted that the short-circuit current from the input voltage V; n (as a result of the simultaneous conduction of the switching devices Ql, Q4) that may cause the damage may also be limited by an input filter choke to the power converter..
  • the second bias voltage boot-strap capacitor CB 2 is also charged for the second high-side switching device Q2 (see, e.g. , FIGURE 6).
  • a short control pulse 1520 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the fourth low-side switching device Q8 of the synchronous rectifier.
  • the short control pulse 1520 is also applied to the third high-side switching device Q5.
  • the short control pulse 1520 is sufficiently short in duration to prevent (via circuit inductance) a damaging current from flowing within the power converter.
  • a bias voltage boot-strap capacitor CBS is also charged for the fourth high-side switching device Q6 (see, e.g., FIGURE 13).
  • a short control pulse 1530 is also applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the third low-side switching device Q7 of the synchronous rectifier.
  • the short control pulse 1530 is also applied to the fourth high-side switching device Q6.
  • the short control pulse 1530 is sufficiently short in duration to prevent (via circuit inductance) a damaging current from flowing within the power converter.
  • a bias voltage boot-strap capacitor CBS is also charged for the third high-side switching device Q5 (see, e.g., FIGURE 12). Again, the duration of the short control pulses 1510, 1520, 1530 may be varied depending on the application. Thereafter, the timing diagrams of FIGURE 15 follow an analogous pattern as the timing diagrams of FIGURE 14.
  • Synchronous rectification was employed with operation of the power converter of FIGURES 14 and 15.
  • alternative smooth synchronous rectifier ramp- in can be used to simplify pre-bias start-up.
  • the controller 1110 operates the power train at least in part in a discontinuous conduction mode ("DCM").
  • DCM discontinuous conduction mode
  • FIGURE 16 illustrated are timing diagrams demonstrating an operation of the power converter of FIGURES 11 to 13.
  • the timing diagrams represent the conduction intervals for the switching devices Ql, Q2, Q3, Q4, Q5, Q6, Q7, Q8 over a switching interval T as a function of time t (on the horizontal axis).
  • the first high-side switching device Q 1 and the second low-side switching device Q4 are controlled with the same control signal
  • the second high-side switching device Q2 and the first low-side switching device Q3 are controlled with the same control signal, thereby reducing the number of control signals per the switching interval T.
  • a short control pulse 1610 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the second low-side switching device Q4 of the power train. While the short control pulse 1610 is also applied to the first high-side switching device Ql, it is sufficiently short in duration to avoid any damage to the power converter.
  • the short-circuit current from the input voltage Vi n (as a result of the simultaneous conduction of the switching devices Ql, Q4) that may cause the damage may also be limited by an input filter choke to the power converter.
  • a second bias voltage boot-strap capacitor CB 2 is also charged for the second high-side switching device Q2 (see, e.g. , FIGURE 6). With this procedure, discharge of parasitic capacitance of the first low-side switching device Q3 is performed through the transformer TR, which may produce a small, possibly inconsequential, magnetic flux unbalance thereof.
  • a short control pulse 1620 is applied to briefly turn on (and then turn off) and discharge the parasitic capacitance of the fourth low-side switching device Q8 of the synchronous rectifier.
  • the short control pulse 1620 is also applied to the third high-side switching device Q5.
  • the short control pulse 1620 is sufficiently short in duration to prevent (via circuit inductance) a damaging current from flowing within the power converter.
  • a bias voltage boot-strap capacitor CBS is also charged for the fourth high-side switching device Q6 (see, e.g., FIGURE 13). Again, the duration of the short control pulses 1610, 1620 may be varied depending on the application.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to and maintain a magnetic flux balance of the transformer TR for a period representing half a duty cycle D/2.
  • the fourth high- side switching device Q6 and the third low-side switching device Q7 are also conducting during this time.
  • the first and second high-side switching devices Q l, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier through the body diodes of ones of the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8.
  • the first high-side switching device Q 1 and the second low-side switching device Q4 conduct for a duty cycle D delivering energy to the transformer TR.
  • the third high-side switching device Q5 and the fourth low-side switching device Q8 are also conducting during this time.
  • the first and second high-side switching devices Ql, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier (through the body diodes of ones of the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8).
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the second high-side switching device Q2 and the first low-side switching device Q3 conduct delivering energy to the transformer TR.
  • the fourth high-side switching device Q6 and the third low-side switching device Q7 are also conducting during this time.
  • the first and second high-side switching devices Q l, Q2, and the first and second low-side switching devices Q3, Q4 are non-conducting, and a current in the output inductor L flows through the synchronous rectifier (through the body diodes of ones of the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8).
  • a net magnetic flux in the transformer TR is zero (or about zero) as no energy is reflected back to the primary winding of the transformer TR.
  • the body diodes of ones of the third and fourth high-side switching devices Q5, Q6 and the third and fourth low-side switching devices Q7, Q8 are employed during the freewheeling phases of the operation of the power converter. This allows a smooth transition to synchronous rectification operation (see, e.g., from time 0 to D).
  • the power converter may also transition DCM operation to continuous conduction mode (“CCM”) operation.
  • CCM continuous conduction mode
  • FIGURE 17 illustrated is a flow diagram of an embodiment of a method of operating a power converter including a power train with a first high-side switching device coupled in series with a first low-side switching device at a first circuit node.
  • the power converter also includes a first bias voltage boot-strap capacitor having a first terminal couplable to a first bias voltage source and a second terminal coupled to the first circuit node.
  • the power train may also include a second high-side switching device coupled in series with a second low-side switching device at a second circuit node.
  • the power converter may also include a second bias voltage boot-strap capacitor having a first terminal couplable to the first bias voltage source and a second terminal coupled to the second circuit node.
  • the method begins at a start step or module 1700.
  • the method includes applying a short control pulse to and momentarily turn on the first low- side switching device to charge up the first bias voltage boot-strap capacitor via the first bias voltage source at a start-up of the power converter and/or the second low-side switching device to charge up the second bias voltage boot-strap capacitor via the first bias voltage source at the start-up of the power converter.
  • a decisional step or module 1720 it is determined if the power converter includes a synchronous rectifier ("SR") on a secondary side of a transformer. If the power converter includes the synchronous rectifier, the method continues to a step or module 1730.
  • the synchronous rectifier includes a third high-side switching device coupled in series with a third low-side switching device at a third circuit node.
  • the synchronous rectifier also includes a third bias voltage boot-strap capacitor having a first terminal couplable to a second bias voltage source and a second terminal coupled to the third circuit node.
  • the synchronous rectifier may also include a fourth high-side switching device coupled in series with a fourth low-side switching device at a fourth circuit node.
  • the synchronous rectifier may also include a fourth bias voltage boot-strap capacitor having a first terminal couplable to the second bias voltage source and a second terminal coupled to the fourth circuit node.
  • the method includes applying a short control pulse to and momentarily turn on the third low-side switching device to charge up the third bias voltage boot-strap capacitor via the second bias voltage source at the start-up of the power converter and/or the fourth low-side switching device to charge up the fourth bias voltage boot-strap capacitor via the second bias voltage source at the start-up of the power converter. Then, the method includes causing at least one of the third high-side and low-side switching devices, and the fourth high-side and low-side switching devices to conduct for about half a duty cycle at a step or module 1740.
  • the method includes causing at least one of the first high-side and low-side switching devices, and the second high-side and low-side switching devices to conduct for about half a duty cycle at a step or module 1750.
  • the method includes controlling the duty cycle of the second high-side and low-side switching devices in cooperation with controlling the first high-side and low-side switching devices to regulate an output characteristic of the power converter thereafter.
  • the method also includes controlling the duty cycle of the third high-side and low-side switching devices and fourth high-side and low- side switching devices. To that end, the conduction period of ones of the third high-side and low-side switching devices, and fourth high-side and low-side switching devices may be extended beyond the duty cycle during periods of operation of the power converter. The method ends at an end step or module 1770.
  • a circuit for a control process as introduced herein can be implemented using either analog or digital electronics, with no loss of performance.
  • the components of the circuit may be implemented as software components of that may form at least a part of a computer program, module, object or sequence of instructions executable by a programmable signal processing apparatus such as a processor, for example as shown in FIGURES 4 and 1 1.
  • the power converter includes a power train including a first high-side switching device (Q l) coupled in series at a first circuit node (Va) with a first low-side switching device (Q3).
  • the power converter also includes the controller (410, 1 1 10), coupled to a first bias voltage boot-strap capacitor (CBI) having a first terminal couplable to a first bias voltage source (VD) and a second terminal coupled to the first circuit node (Va), configured to apply a short control pulse (710) to and momentarily turn on the first low-side switching device (Q3) to charge up the first bias voltage boot-strap capacitor (CBI) via the first bias voltage source (VD) at a start-up of the power converter.
  • the duration e.g.
  • the power converter may also include a blocking diode (D B i) couplable between the first bias voltage source (VD) and coupled to the first terminal of the first bias voltage boot-strap capacitor (CBI).
  • D B i blocking diode
  • the controller (410, 1 1 10) is further configured to cause the first low-side switching device (Q3) to conduct for about half a duty cycle (D/2) following
  • the controller (410, 1110) may also include a level shifter (LS) coupled to a first driver (510) configured to control a conductivity of the first high-side switching device (Ql), and a second driver (520) configured to control a conductivity of the first low-side switching device (Q3).
  • LS level shifter
  • the power train may also include a second high-side switching device (Q2) coupled in series at a second circuit node (Vb) with a second low-side switching device (Q4).
  • the controller (410, 1110) coupled to a second bias voltage boot-strap capacitor (CB 2 ) having a first terminal couplable to the first bias voltage source (VD) and a second terminal coupled to the second circuit node (Vb), is further configured to apply a short control pulse (720) to and momentarily turn on the second low-side switching device (Q4) to charge up the second bias voltage boot-strap capacitor (CB 2 ) via the first bias voltage source (VD) at the start-up of the power converter.
  • the controller (410, 1110) is further configured to cause the second high-side switching device (Q2) to conduct for about half a duty cycle (D/2) following momentarily turning on the second low-side switching device (Q4), and control the duty cycle (D) of the second high-side switching device (Q2) and the second low-side switching device (Q4) in cooperation with the first high-side switching device (Ql) and the first low-side switching device (Q3) to regulate an output characteristic (V out ) of the power converter thereafter.
  • the power train may also include a transformer (TR) and a third high-side switching device (Q5) coupled in series at a third circuit node (Vc) with a third low-side switching device (Q7) on a secondary side of the power train,
  • the controller (410, 1110) coupled to a third bias voltage boot-strap capacitor (CBS) having a first terminal couplable to a second bias voltage source (VDS) and a second terminal coupled to third circuit node (Vc), is further configured to apply a short control pulse (1530) to and momentarily turn on the third low-side switching device (Q7) to charge up the third bias voltage boot-strap capacitor (CBS) via the second bias voltage source (VDS) at the start-up of the power converter.
  • the controller (410, 1110) is further configured to cause the third high-side switching device (Q5) to conduct for a period longer than a duty cycle (D) following momentarily turning on the third low-side switching device (Q7).
  • the exemplary embodiment provides both a method and corresponding apparatus consisting of various modules providing functionality for performing the steps of the method.
  • the modules may be implemented as hardware (embodied in one or more chips including an integrated circuit such as an application specific integrated circuit), or may be implemented as software or firmware for execution by a processor.
  • firmware or software the exemplary embodiment can be provided as a computer program product including a computer readable storage medium embodying computer program code (i.e., software or firmware) thereon for execution by the computer processor.
  • the computer readable storage medium may be non-transitory (e.g., magnetic disks; optical disks; read only memory; flash memory devices; phase-change memory) or transitory (e.g., electrical, optical, acoustical or other forms of propagated signals-such as carrier waves, infrared signals, digital signals, etc.).
  • the coupling of a processor and other components is typically through one or more busses or bridges (also termed bus controllers).
  • the storage device and signals carrying digital traffic respectively represent one or more non-transitory or transitory computer readable storage medium.
  • the storage device of a given electronic device typically stores code and/or data for execution on the set of one or more processors of that electronic device such as a controller.

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  • Dc-Dc Converters (AREA)

Abstract

L'invention concerne un contrôleur destiné à être utilisé avec un convertisseur d'énergie et son procédé de fonctionnement. Dans un mode de réalisation, le convertisseur d'énergie comprend un train de puissance comportant un premier dispositif de commutation côté haut branché en série au niveau d'un premier nœud de circuit avec un premier dispositif de commutation côté bas. Le contrôleur du convertisseur d'énergie est relié à un premier condensateur d'amorçage à tension de polarisation pourvu d'une première borne qui peut être reliée à une première source de tension de polarisation et une deuxième borne reliée au premier nœud de circuit. Le contrôleur comprend un processeur et une mémoire, laquelle contient un code de programme informatique, qui peuvent être utilisés collectivement pour appliquer une impulsion de commande courte au premier dispositif de commutation côté bas et l'activer momentanément afin de charger le premier condensateur d'amorçage à tension de polarisation par le biais de la première source de tension de polarisation lors d'un démarrage du convertisseur d'énergie.
PCT/IB2016/053312 2016-03-28 2016-06-06 Contrôleur destiné à être utilisé avec un convertisseur d'énergie, et son procédé de fonctionnement Ceased WO2017168220A1 (fr)

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CN110460226A (zh) * 2018-05-07 2019-11-15 欧姆龙株式会社 开关电源装置
CN110957914A (zh) * 2018-09-26 2020-04-03 台达电子工业股份有限公司 变换装置
WO2021021264A1 (fr) * 2019-07-31 2021-02-04 Raytheon Company Circuit de commande de prédémarrage d'un convertisseur de puissance de commutation comprenant un commutateur redresseur synchrone sur le côté secondaire d'une section de stockage d'énergie
US11594976B2 (en) 2020-06-05 2023-02-28 Delta Electronics, Inc. Power converter and control method thereof
EP4531257A4 (fr) * 2022-07-13 2025-09-24 Guangdong Oppo Mobile Telecommunications Corp Ltd Circuit cccc, procédé de démarrage de circuit, dispositif, support et produit-programme

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Cited By (12)

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Publication number Priority date Publication date Assignee Title
CN110460226A (zh) * 2018-05-07 2019-11-15 欧姆龙株式会社 开关电源装置
CN110957914A (zh) * 2018-09-26 2020-04-03 台达电子工业股份有限公司 变换装置
EP3633840A1 (fr) * 2018-09-26 2020-04-08 Delta Electronics, Inc. Convertisseur
US11070135B2 (en) 2018-09-26 2021-07-20 Delta Electronics, Inc. Converter with soft-start period of output voltage
CN110957914B (zh) * 2018-09-26 2021-09-07 台达电子工业股份有限公司 变换装置
CN113794378A (zh) * 2018-09-26 2021-12-14 台达电子工业股份有限公司 变换装置
CN113794378B (zh) * 2018-09-26 2023-11-24 台达电子工业股份有限公司 变换装置
WO2021021264A1 (fr) * 2019-07-31 2021-02-04 Raytheon Company Circuit de commande de prédémarrage d'un convertisseur de puissance de commutation comprenant un commutateur redresseur synchrone sur le côté secondaire d'une section de stockage d'énergie
US10924020B1 (en) 2019-07-31 2021-02-16 Raytheon Company Prestart control circuit for a switching power converter
US11594976B2 (en) 2020-06-05 2023-02-28 Delta Electronics, Inc. Power converter and control method thereof
US11777417B2 (en) 2020-06-05 2023-10-03 Delta Electronics, Inc. Power converter and control method thereof
EP4531257A4 (fr) * 2022-07-13 2025-09-24 Guangdong Oppo Mobile Telecommunications Corp Ltd Circuit cccc, procédé de démarrage de circuit, dispositif, support et produit-programme

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