WO2017207352A1 - Détection d'erreur sur des broches d'entrée/sortie de circuit intégré - Google Patents
Détection d'erreur sur des broches d'entrée/sortie de circuit intégré Download PDFInfo
- Publication number
- WO2017207352A1 WO2017207352A1 PCT/EP2017/062409 EP2017062409W WO2017207352A1 WO 2017207352 A1 WO2017207352 A1 WO 2017207352A1 EP 2017062409 W EP2017062409 W EP 2017062409W WO 2017207352 A1 WO2017207352 A1 WO 2017207352A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- input
- value
- output
- output pin
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/64—Testing of capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/26—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC
- H05B41/28—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters
- H05B41/282—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters with semiconductor devices
- H05B41/285—Arrangements for protecting lamps or circuits against abnormal operating conditions
- H05B41/2851—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions
Definitions
- dedicated hardware implementations such as application-specific integrated circuits (ASICs), programmable logic arrays and other hardware components, can be constructed to implement one or more of the methods described herein.
- ASICs application-specific integrated circuits
- One or more embodiments described herein may implement functions using two or more specific interconnected hardware modules or devices with related control and data signals that can be communicated between and through the modules. Accordingly, the present disclosure encompasses software, firmware, and hardware implementations. None in the present application should be interpreted as being implemented or
- Providing a second, disparate value at S620 may be performed in several different ways. For instance, value set by a received signal may be identified, so that the pin can be set with a different level at S620. Alternatively, a previous value set for an input/output pin configured for output may be considered a first value, and the second, disparate value may be set to ensure that the pin is not stuck at the previous (first) level.
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
La présente invention concerne un procédé de détection d'erreur sur une broche d'entrée/sortie (ES) d'un circuit intégré qui comprend l'utilisation de la broche d'entrée/sortie du circuit intégré dans un premier mode par réception ou envoi d'une première valeur sous forme de donnée analogique ou donnée numérique. La broche d'entrée/sortie est basculée dans un mode de test après chaque instance d'utilisation de la broche d'entrée/sortie dans le premier mode. Le mode de test comprend la fourniture d'une deuxième valeur distincte de la première valeur pendant un temps défini après l'utilisation de la broche d'entrée/sortie dans le premier mode, la réception en retour, pendant le temps défini, d'une valeur résultante sur la base de la fourniture de la deuxième valeur, la mesure de la valeur résultante, et l'identification d'une erreur sur la broche d'entrée/sortie du circuit intégré sur la base de la valeur résultante mesurée.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/305,197 US11467211B2 (en) | 2016-06-01 | 2017-05-23 | Error detection on integrated circuit input/output pins |
| CN201780034306.0A CN109564265B (zh) | 2016-06-01 | 2017-05-23 | 集成电路输入/输出引脚上的错误检测 |
| EP17724389.6A EP3465239B1 (fr) | 2016-06-01 | 2017-05-23 | Circuit intégré de détection d'erreur sur des broches d'entrée/sortie |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662343998P | 2016-06-01 | 2016-06-01 | |
| US62/343998 | 2016-06-01 | ||
| EP16174882.7 | 2016-06-17 | ||
| EP16174882 | 2016-06-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2017207352A1 true WO2017207352A1 (fr) | 2017-12-07 |
Family
ID=56137165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2017/062409 Ceased WO2017207352A1 (fr) | 2016-06-01 | 2017-05-23 | Détection d'erreur sur des broches d'entrée/sortie de circuit intégré |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2017207352A1 (fr) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111736057A (zh) * | 2020-06-12 | 2020-10-02 | 青岛地铁集团有限公司运营分公司 | 一种集成电路板的在线检测装置 |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4459693A (en) * | 1982-01-26 | 1984-07-10 | Genrad, Inc. | Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like |
| JPH07113850A (ja) * | 1993-10-19 | 1995-05-02 | Matsushita Electric Ind Co Ltd | 半導体集積回路 |
| US20020135391A1 (en) * | 2001-03-21 | 2002-09-26 | Rearick Jeffrey R. | Systems and methods for facilitating testing of pad receivers of integrated circuits |
| US20070143047A1 (en) * | 2005-11-24 | 2007-06-21 | Rearick Jeffrey R | Testing target resistances in circuit assemblies |
| US20080265262A1 (en) * | 2007-04-26 | 2008-10-30 | General Electric Company | Methods and systems for testing a functional status of a light unit |
| US20100045328A1 (en) * | 2008-08-25 | 2010-02-25 | Freescale Semiconductor, Inc | Circuit for detecting bonding defect in multi-bonding wire |
| US20110148429A1 (en) * | 2009-12-21 | 2011-06-23 | Minemier Ronald K | DC Testing Integrated Circuits |
| US20110187384A1 (en) * | 2010-02-02 | 2011-08-04 | Stmicroelectronics S.R.L. | Electrical interconnection integrated device with fault detecting module and electronic apparatus comprising the device |
| US20110234105A1 (en) * | 2010-03-23 | 2011-09-29 | Stmicroelectronics S.R.I. | Automatic method to detect short and open conditions on the outputs of a led driver device |
| US20120235585A1 (en) * | 2009-11-19 | 2012-09-20 | Koninklijke Philips Electronics, N.V. | Method and apparatus selectively determining universal voltage input for solid state light fixtures |
-
2017
- 2017-05-23 WO PCT/EP2017/062409 patent/WO2017207352A1/fr not_active Ceased
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4459693A (en) * | 1982-01-26 | 1984-07-10 | Genrad, Inc. | Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like |
| JPH07113850A (ja) * | 1993-10-19 | 1995-05-02 | Matsushita Electric Ind Co Ltd | 半導体集積回路 |
| US20020135391A1 (en) * | 2001-03-21 | 2002-09-26 | Rearick Jeffrey R. | Systems and methods for facilitating testing of pad receivers of integrated circuits |
| US20070143047A1 (en) * | 2005-11-24 | 2007-06-21 | Rearick Jeffrey R | Testing target resistances in circuit assemblies |
| US20080265262A1 (en) * | 2007-04-26 | 2008-10-30 | General Electric Company | Methods and systems for testing a functional status of a light unit |
| US20100045328A1 (en) * | 2008-08-25 | 2010-02-25 | Freescale Semiconductor, Inc | Circuit for detecting bonding defect in multi-bonding wire |
| US20120235585A1 (en) * | 2009-11-19 | 2012-09-20 | Koninklijke Philips Electronics, N.V. | Method and apparatus selectively determining universal voltage input for solid state light fixtures |
| US20110148429A1 (en) * | 2009-12-21 | 2011-06-23 | Minemier Ronald K | DC Testing Integrated Circuits |
| US20110187384A1 (en) * | 2010-02-02 | 2011-08-04 | Stmicroelectronics S.R.L. | Electrical interconnection integrated device with fault detecting module and electronic apparatus comprising the device |
| US20110234105A1 (en) * | 2010-03-23 | 2011-09-29 | Stmicroelectronics S.R.I. | Automatic method to detect short and open conditions on the outputs of a led driver device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111736057A (zh) * | 2020-06-12 | 2020-10-02 | 青岛地铁集团有限公司运营分公司 | 一种集成电路板的在线检测装置 |
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