WO2018209866A1 - Circuit de conversion de type t et circuit de conversion triphasé correspondant et dispositif de conversion - Google Patents

Circuit de conversion de type t et circuit de conversion triphasé correspondant et dispositif de conversion Download PDF

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Publication number
WO2018209866A1
WO2018209866A1 PCT/CN2017/103300 CN2017103300W WO2018209866A1 WO 2018209866 A1 WO2018209866 A1 WO 2018209866A1 CN 2017103300 W CN2017103300 W CN 2017103300W WO 2018209866 A1 WO2018209866 A1 WO 2018209866A1
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WIPO (PCT)
Prior art keywords
diode
controllable switching
conversion circuit
igbt
switching device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/103300
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English (en)
Chinese (zh)
Inventor
陈四雄
陈成辉
易龙强
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Xiamen Kehua Hengsheng Co Ltd
Original Assignee
Xiamen Kehua Hengsheng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to DE112017007565.3T priority Critical patent/DE112017007565T5/de
Publication of WO2018209866A1 publication Critical patent/WO2018209866A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/66—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output with possibility of reversal
    • H02M7/68—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output with possibility of reversal by static converters
    • H02M7/72—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/797—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/327—Means for protecting converters other than automatic disconnection against abnormal temperatures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to the field of electrical energy conversion, and in particular to a ⁇ -type conversion circuit.
  • the conversion circuit of the ⁇ type layout generally comprises two vertically arranged controllable switching devices and two laterally arranged controllable switching devices; two vertically arranged controllable switching devices are connected in series, and one end is connected to the positive bus bars. The other end is connected to the negative bus; the connection point between the two vertically arranged controllable switching devices is used as the input and output end of the conversion circuit; the two laterally disposed controllable switching devices are generally disposed on the intermediate bridge arm, the intermediate bridge One end of the arm is connected to the input and output ends, and the other end of the intermediate bridge is connected to the center line.
  • FIG. 1 shows a case where two laterally disposed controllable switching devices are connected in reverse series with each other and connected to each other with a drain or a collector.
  • Fig. 2 shows the case where two laterally disposed controllable switching devices are connected in reverse series with each other and connected to each other with a source or an emitter.
  • Figure 3 shows the case where two laterally-connected controllable switching devices are connected in series with one diode and then connected in parallel to the intermediate bridge arm.
  • controllable switching devices include an IGBT tube and a freewheeling diode connected in anti-parallel with the IGBT tube.
  • the ⁇ -type three-level conversion circuit in the prior art has the advantages of a single IG ⁇ tube blocking voltage halving, low harmonics, low loss, and high efficiency.
  • the power consumption of each IGBT tube can be divided into an on-state power consumption and an on-off power consumption, wherein the on-off power consumption can be divided into a power consumption phase and a shutdown phase power. Consumption. At lower operating frequency, the on-state power consumption is dominant; but when the operating frequency is higher, the on-off power consumption is increased to the main power consumption, where the power consumption in the pass-through phase is greater than that in the shutdown phase. . Therefore, in the case of a high operating frequency, it is necessary to implement "soft switching", which means that the controllable switching device can achieve zero voltage switching (ZVS) and zero current switching (ZCS). Or zero voltage zero current (ZVZXCS), or the current or voltage rises with a limited slope during the on/off process.
  • ZVS zero voltage switching
  • ZCS zero current switching
  • ZVZXCS zero voltage zero current
  • the power device is susceptible to secondary breakdown; under the inductive load condition, the power device is turned off and there is a spike voltage; and under the capacitive load condition, the power device has a peak current through the through-state; Sub-breakdown, which greatly jeopardizes the safe operation of power devices, necessitating the design of a large safe working area (so
  • the circuit topology is very sensitive to the parasitic parameters of the power device; when the soft switch cannot be realized, there may be a problem of the pass-through arm of the upper and lower arms, and since the soft switch cannot be realized, the power device still has a delay time. (Dead zone), and in the case of high frequency, in order to eliminate the impact of the dead zone on the performance of the inverter, the corrective measures taken make the design of the whole system complicated;
  • the power device will generate noise pollution after high frequency switching, so the conversion circuit has higher requirements on the input and output filters.
  • the object of the present invention is to solve the problems in the prior art, and provide a T-type conversion circuit and corresponding three
  • the phase conversion circuit and the conversion device enable the power device to perform soft-switching work, thereby reducing power consumption of the power device and the diode device, and solving the problems in the prior art.
  • a T-type conversion circuit includes two vertically disposed controllable switching devices, two laterally disposed controllable switching devices, an inductor, a first diode, a second diode, and a third a diode, a fourth diode, a first capacitor and a second capacitor; the two vertically disposed controllable switching devices are connected in series, one end is connected to the positive bus bar, and the other end is connected to the negative bus bar; a connection point between the vertically controllable switching devices is used as an input and output terminal; the two laterally disposed controllable switching devices are located on the intermediate bridge arm; one end of the intermediate bridge arm is connected to the input and output ends, The other end of the intermediate bridge arm is connected to one end of the inductor; the other end of the inductor is connected to the neutral line; in the two laterally disposed controllable switching devices, the controllable switching device definition conforming to the first condition or the second condition For the second controllable switching device, the controllable switching device that meets
  • the second controllable switching device is connected in reverse series with the third controllable switching device, and the drain or collector of the second controllable switching device and the third controllable The drain or collector of the bypass device is connected.
  • the second controllable switching device is connected in reverse series with the third controllable switching device, and the source or emitter of the second controllable switching device and the third controllable The source or emitter of the device is connected.
  • the intermediate bridge arm further includes a fifth diode and a sixth diode; and the third controllable switch a source or an emitter of the device and a drain or collector of the second controllable switching device are connected to the input and output terminals; and a source or emitter of the second controllable switching device is connected to the fifth The anode of the diode; the drain or collector of the third controllable switching device is connected to the cathode of the sixth diode; the cathode of the fifth diode and the anode of the sixth diode are connected to the inductor .
  • any one of the two vertically disposed controllable switching devices adopts an IGBT unit or an M OS unit.
  • the IGBT unit includes an IGBT tube and an IGBT tube.
  • the anti-parallel connected diode; when the MOS unit is used, the MOS unit may be a MOSFET with a body diode or a MOS tube and an anti-parallel diode without a body diode.
  • any one of the two laterally disposed controllable switching devices adopts an IGBT unit or an M OS unit.
  • the IGBT unit includes an IGBT tube and is opposite to the IGBT tube. Diodes connected in parallel;
  • MOS cells When MOS cells are used, the MOS cells may be MOS transistors with body diodes or MOS transistors and anti-parallel diodes without body diodes.
  • a three-phase conversion circuit includes a first conversion circuit, a second conversion circuit, and a third conversion circuit; each of the first conversion circuit, the second conversion circuit, and the third conversion circuit adopts one of the foregoing A ⁇ -type conversion circuit; a center line of the first conversion circuit, a center line of the second conversion circuit, and a center line of the third conversion circuit are connected to each other.
  • a conversion device comprising a T-type conversion circuit as described above for implementing a current conversion to cause electrical energy to flow from a DC side to an AC side or to pass electrical energy from an AC side to a DC side.
  • the third diode, the fourth diode, the second capacitor, and the second controllable switching device in the T-type conversion circuit are integrated into a first circuit module; a first end of the circuit module is connected to a source or an emitter of the second controllable switching device, and a second end of the first circuit module is connected to a drain or a collector of the second controllable switching device, the first circuit
  • the third end of the module is connected to the anode of the fourth diode for connecting the negative bus.
  • the first diode, the second diode, the first capacitor and the third controllable switching device in the T-type conversion circuit are integrated into a second circuit module;
  • the fourth end of the two circuit module is connected to the drain or the collector of the third controllable switching device, and the fifth end of the second circuit module is connected to the source or the emitter of the third controllable switching device, the second circuit
  • the sixth end of the module is connected to the cathode of the first diode for connecting the positive bus.
  • all controllable switching devices and diode devices can implement soft switching, that is, zero voltage switching (ZVS), zero current switching (ZCS) or zero voltage.
  • Zero current switch (ZVZCS) Zero current switch
  • the controllable switching device performs on-off switching with limited dv/dt and di/dt, so the system EMI electromagnetic interference is much more optimized than the unimplemented soft-switching;
  • the conversion device can work twice as much as the operating frequency of the conventional conversion device, so the output filter parameter requirements of the conversion device are reduced, and the size can be doubled. Reduced, which is beneficial to further reduce material costs, reduce product size, and increase product power density;
  • FIG. 1 is a circuit diagram of a first case in the prior art
  • 2 is a circuit diagram of a second case in the prior art
  • 3 is a circuit diagram of a third case in the prior art
  • Embodiment 4 is a circuit diagram of Embodiment 1 of a T-type conversion circuit according to the present invention.
  • FIG. 5 is a circuit diagram of a second embodiment of a T-type conversion circuit according to the present invention.
  • FIG. 6 is a circuit diagram of a third embodiment of a T-type conversion circuit according to the present invention.
  • FIG. 7 is a circuit diagram of an embodiment of a three-phase conversion circuit according to the present invention.
  • Embodiment 8 is a schematic diagram of Embodiment 1 of a conversion device according to the present invention.
  • Embodiment 9 is a schematic diagram of Embodiment 2 of a transforming apparatus according to the present invention.
  • FIG. 10 is a schematic diagram of Embodiment 3 of a transforming apparatus according to the present invention.
  • FIG. 11 is a schematic diagram of the first embodiment of the T-type conversion circuit of the present invention performing DC/AC conversion, and the inverter output voltage is a positive half cycle before the vertical pipe is commutated to the horizontal pipe; [0040] FIG.
  • FIG. 12 is a first schematic diagram of the first stage of the DC-AC conversion of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle, and the vertical pipe is commutated to the horizontal pipe;
  • FIG. 13 is a second schematic diagram of the second stage of the DC-AC conversion of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle, and the vertical pipe is commutated to the horizontal pipe;
  • FIG. 14 is a schematic diagram of the first embodiment of the T-type conversion circuit of the present invention performing DC/AC conversion, and the inverter output voltage is a positive half cycle before the horizontal pipe is commutated to the vertical pipe;
  • FIG. 15 is a schematic diagram showing the operation of the first stage of the T-type conversion circuit of the present invention in which the DC/AC conversion is performed, and the inverter output voltage is a positive half cycle, and the horizontal pipe is commutated to the vertical pipe;
  • 16 is a schematic diagram showing the operation of the first stage of the T-type conversion circuit of the present invention in which the DC/AC conversion is performed, and the inverter output voltage is a positive half cycle, and the horizontal pipe is commutated to the vertical pipe;
  • 17 is a schematic diagram showing the operation of the first embodiment of the T-type conversion circuit of the present invention in which AC/DC conversion is performed, and the AC input voltage is a positive half cycle before the vertical pipe is commutated to the horizontal pipe;
  • FIG. 18 is a first schematic diagram showing the first stage of the AC-DC conversion of the T-type conversion circuit of the present invention, wherein the AC input voltage is a positive half cycle, and the vertical pipe is commutated to the horizontal pipe;
  • 19 is a second schematic diagram of the second stage of the AC-DC conversion of the T-type conversion circuit of the present invention, wherein the AC input voltage is a positive half cycle, and the vertical pipe is commutated to the horizontal pipe;
  • 20 is a schematic diagram showing the operation of the first embodiment of the T-type conversion circuit of the present invention for performing AC/DC conversion, wherein the AC input voltage is a positive half cycle and the horizontal pipe is commutated to the vertical pipe;
  • 21 is a schematic diagram of an operation of AC/DC conversion according to Embodiment 1 of the T-type conversion circuit of the present invention, wherein the AC input voltage is a positive half cycle, and the horizontal pipe is commutated to the vertical pipe;
  • FIG. 22 is a schematic diagram of the operation of the third embodiment of the T-type conversion circuit of the present invention, in which the DC/AC conversion is performed, and the inverter output voltage is a positive half cycle before the vertical pipe is commutated to the horizontal pipe;
  • FIG. 23 is a schematic diagram showing the first stage of the DC-AC conversion of the third embodiment of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle and the vertical pipe is commutated to the horizontal pipe;
  • 24 is a schematic diagram showing the second stage of the DC-AC conversion of the third embodiment of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle, and the vertical pipe is commutated to the horizontal pipe;
  • 25 is a schematic diagram of a DC/AC conversion of the third embodiment of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle before the cross tube is commutated to the vertical pipe;
  • 26 is a schematic diagram showing the operation of the third stage of the DC-AC conversion of the third embodiment of the T-type conversion circuit of the present invention, wherein the inverter output voltage is a positive half cycle and the horizontal pipe is commutated to the vertical pipe;
  • FIG. 27 is a schematic diagram showing the operation of the third stage of the DC-AC conversion of the third embodiment of the T-type conversion circuit of the present invention, in which the inverter output voltage is a positive half cycle and the horizontal pipe is commutated to the vertical pipe.
  • FIG. 28 is a schematic diagram showing the operation of the AC-DC conversion in the third embodiment of the T-type conversion circuit of the present invention, wherein the AC input voltage is a positive half cycle and a positive level is commutated to a zero level; [0057] FIG.
  • FIG. 29 is a first stage operation diagram of the third embodiment of the T-type conversion circuit of the present invention performing AC/DC conversion, wherein the AC input voltage is a positive half cycle and a positive level is commutated to a zero level; [0058] FIG.
  • FIG. 30 is a second stage operation diagram of the third embodiment of the T-type conversion circuit of the present invention performing AC/DC conversion, wherein the AC input voltage is a positive half cycle and a positive level is commutated to a zero level; [0059] FIG.
  • FIG. 31 is a schematic diagram showing an operation of AC/DC conversion in the third embodiment of the T-type conversion circuit of the present invention, wherein the AC input voltage is a positive half cycle and a zero level is commutated to a positive level; [0060] FIG.
  • FIG. 32 is a schematic diagram showing the operation of the AC-DC conversion in the third embodiment of the T-type conversion circuit of the present invention, in which the AC input voltage is a positive half cycle and a zero level is commutated to a positive level.
  • the first embodiment of the T-type conversion circuit includes two vertically arranged controllable switching devices, two laterally disposed controllable switching devices, an inductor L, a first diode D1, and a first Two diodes D2, a third diode D3, a fourth diode D4, a first capacitor C1, a second capacitor C2, a third polarity capacitor C3, and a fourth polarity capacitor C4.
  • the two vertically disposed controllable switching devices are respectively a first controllable switching device and a fourth controllable switching device, wherein the first controllable switching device adopts an IGBT unit, including the first IGBT tube Q1 And a first freewheeling diode Dql connected in anti-parallel thereto; the fourth controllable switching device adopts an IGBT unit, and includes a fourth IGBT tube Q4 and a fourth freewheeling diode Dq4 connected in anti-parallel thereto.
  • the first IGBT tube Q1 is connected in series with the fourth IGBT tube Q4, the collector of the first IGBT tube Q1 is connected to the positive bus, the emitter of the fourth IGBT tube Q4 is connected to the negative bus, the emitter of the first IGBT tube Q1 and the fourth IGBT The collector of the tube Q4 is connected, and the connection point serves as an input and output terminal.
  • the two laterally-controllable switching devices on the intermediate bridge arm are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit, including The second IGBT tube Q2 and the second freewheeling diode Dq2 connected in anti-parallel thereto; the third controllable switching device adopts an IGBT unit, and includes a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel thereto.
  • the second IGBT tube Q2 and the third IGBT tube Q3 are connected in reverse series to the intermediate bridge arm.
  • the emitter of the third IGBT tube Q3 is connected to the input and output terminals; the collector of the third IGBT tube Q3 is connected to the collector of the second IGBT tube Q2; the emitter of the second IGBT tube Q2 is connected to the inductor L; One end is connected to the center line.
  • the first diode D1 and the second diode D2 are connected in series, the cathode of the first diode D1 is connected to the positive bus, and the anode of the second diode D2 is connected to the collector of the third IGBT transistor Q3.
  • One end of the first capacitor C1 is connected to the connection point of the first diode D1 and the second diode D2, and the other end of the first capacitor C1 is connected to the emitter of the third IGBT tube Q3.
  • the third diode D3 and the fourth diode D4 are connected in series, the anode of the fourth diode D4 is connected to the negative bus, and the cathode of the third diode D3 is connected to the emitter of the second IGBT tube Q2.
  • the second capacitor C2 is terminated to the connection point of the third diode D3 and the fourth diode D4, and the other end of the second capacitor C2 is connected to the collector of the second IGBT tube.
  • the controllable switching device may also adopt a MOS unit.
  • the MOS unit may be a MOS transistor with a body diode or a MOS transistor including a body diode and an anti-parallel. diode.
  • the T-type conversion circuit of the embodiment can realize that in the inverter and rectification process, all controllable switching devices and diode devices can realize soft switching, that is, zero voltage switching (ZVS) and zero current. Off (ZCS) or zero voltage zero current (ZVZCS), or on/off switching with limited dv/dt and di/dt. Specifically:
  • the inverter output voltage is a positive half cycle and the inverter output voltage is a negative half cycle, and each half cycle is further divided into a vertical pipe.
  • the inverter output voltage is a positive half cycle ⁇ , and the process of commutating the vertical pipe to the horizontal pipe is as follows:
  • FIG. 11 shows a state before the standpipe is commutated to the cross tube.
  • the first IGBT pipe Q1 and the third IGBT pipe Q3 are in an on state, and the second IGBT pipe Q2 and the fourth IGBT pipe Q4 are in an off state.
  • the current flows to the load Z through the first IGBT tube Q1, and the third IGBT tube Q3 is turned on, but no current flows.
  • the first IGBT transistor Q1 is turned on, the second capacitor C2 is charged to the Vdc state. Thereafter, no current flows through the inductor L, and the voltage of the first capacitor C1 is zero.
  • FIG. 12 shows the operational state of the first stage in the process of commutating the riser to the cross tube.
  • the third IGBT tube Q3 is kept in an on state
  • the fourth IGBT tube Q4 is kept in an off state
  • the first IGBT tube Q1 is turned from the on state to the off state
  • the second IGBT tube Q2 is from the off state. Go to the on state.
  • the second capacitor C2 is discharged to the load Z through the fourth diode D4 and the third IGBT transistor Q3.
  • the second capacitor C2 is also charged to the inductor L through the second I GBT tube Q2 and the fourth diode D4. Since the voltage on the second capacitor C2 is gradually discharged to zero. Since the current of the load Z is supplied by the second capacitor C2 in this process, the first IGBT tube Q1 is turned off in a zero voltage manner, and the turn-off loss is very small, which is a typical soft-switching process. Due to the presence of the inductance L, the second IGBT tube Q2 is switched from the off state to the on state, and the current is also established in the manner of di /dt, which is also a soft-switching process.
  • FIG. 13 shows the operational state of the second stage during the commutation of the riser to the cross tube.
  • the fourth freewheeling diode Dq4 is continuously turned on.
  • the load Z output level is clamped at the -Vdc/2 level.
  • Inductance L passes The second freewheeling diode Dq2 and the third IGBT transistor Q3 start to store energy, and the current of the inductor L starts from zero to the linear boosting port, and at the same time, the current through the fourth freewheeling diode Dq4 decreases in proportion.
  • the current through the fourth freewheeling diode Dq4 is reduced to zero, the commutation process is completed.
  • the fourth freewheeling diode Dq4 is turned off, and the load current is carried by the second freewheeling diode Dq2 and the third IGBT transistor Q3.
  • current changes occurring through the second freewheeling diode Dq2, the second IGBT transistor Q2, the fourth freewheeling diode Dq4, and the third IGBT transistor Q3 are all finite current change rates. Di/dt. So in the process, they all achieved soft barriers.
  • the freewheeling process of the fourth diode D4 is also turned on and off with a limited current change rate di/dt, so that the conduction loss of the fourth diode D4 can be significantly reduced.
  • the inverter output voltage is a positive half cycle ⁇ , and the commutation process of the horizontal pipe to the vertical pipe is as follows:
  • FIG. 14 shows a state in which the inverter output voltage is a positive half cycle ⁇ , a state in which the vertical pipe is commutated to the horizontal pipe, or a state before the horizontal pipe is commutated to the vertical pipe.
  • the first IGBT pipe Q1 and the fourth IGBT pipe Q 4 are in an off state, and the second IGBT pipe Q2 and the third IGBT pipe Q3 are in an on state.
  • the first capacitor C1 and the second capacitor C2 are in a zero voltage discharge state, and the current through the inductor L is equal to the current through the load Z.
  • FIG. 15 shows the operational state of the third stage in the process of commutating the cross tube to the standpipe.
  • the third IGBT tube Q3 is kept in the on state
  • the fourth IGBT tube Q4 is kept in the off state
  • the first IGBT tube Q1 is turned from the off state to the on state
  • the second IGBT tube Q2 is turned on.
  • the status goes to the cutoff state.
  • the upper half bus voltage passes through the first IGBT transistor Q1, the second freewheeling diode Dq2, and the third IGBT transistor Q3 to the inductor.
  • FIG. 16 shows the operational state of the fourth stage in the process of commutating the cross tube to the standpipe.
  • the load Z output level is clamped at the Vdc/2 level due to the zero voltage of the second capacitor C2. Therefore, as shown in FIG. 16, the upper half bus voltage charges the second capacitor C2 through the first IGBT transistor Q1, the third freewheeling diode Dq3, the third diode D3, and the inductor L. Due to the presence of the inductance L, when the second capacitor C2 is charged to a voltage of Vdc, the third freewheeling diode Dq3 and the third diode D3 are reversely turned off, the charging and commutation processes are completed, and the current is returned to the first IGBT tube Q1. The state of flowing to the load Z, that is, the state of FIG.
  • the third freewheeling diode Dq3 and the third diode D3 are turned on and off with a finite current change rate di/dt, and therefore, the third freewheeling diode Dq3 and The turn-off and turn-off of the third diode D3 is very low, which is a soft-off mode.
  • each half cycle is further divided into a vertical tube to a horizontal tube commutation and a horizontal tube direction
  • the AC input voltage is positive half cycle ⁇ , and the process of commutating the vertical pipe to the horizontal pipe is as follows:
  • FIG. 17 shows a state before the riser is commutated to the cross tube.
  • the first IGBT tube Q1 and the third IGBT tube Q3 are in an on state, and the second IGBT tube Q2 and the fourth IGBT tube Q4 are in an off state.
  • the rectified current flows from the first freewheeling diode Dq1 to the bus.
  • the third IGBT tube Q3 is turned on but no current flows. Since the third IGBT transistor is turned on, the first capacitor C1 is in a zero voltage discharge state. Since the first IGBT transistor Q1 is turned on, the second capacitor C2 is charged to the Vdc state, and the current of the ⁇ inductor L is zero.
  • FIG. 18 shows the operational state of the first stage of the commutation process of the riser to the cross tube.
  • the third IGB T tube Q3 is kept in an on state
  • the fourth IGBT tube Q4 is kept in an off state.
  • the first IGBT transistor Q1 is switched from the on state to the off state
  • the second IGBT transistor Q2 is switched from the off state to the on state.
  • the third freewheeling diode Dq3, the second IGBT transistor Q2, and the inductor L establish a loop with the input source Z.
  • the current through the intermediate bridge arm increases linearly from zero; at the same time, the current through the first freewheeling diode Dql decreases linearly until the current through the inductor L increases to the rectified current. A freewheeling diode Dql is turned off.
  • the process of turning the first IGBT transistor Q1 from on to off belongs to zero voltage and zero current shutdown.
  • the current of the second IGBT transistor Q2 is linearly increased from the turn-off to the on-time, so the conduction process of the second IGBT transistor Q2 is zero-current conduction. Both are typical soft-critical processes.
  • FIG. 19 shows the operational state of the second stage of the commutation process of the riser to the cross tube.
  • the AC input voltage is a positive half cycle ⁇ , and the commutation process of the horizontal pipe to the vertical pipe is as follows:
  • FIG. 20 shows the state after the end of the commutation process of the riser to the cross tube, that is, the state before the cross tube is commutated to the riser.
  • the second capacitor C2 is discharged, and the rectified current is carried by the third freewheeling diode Dq3, the second IGBT transistor Q2, and the inductor L.
  • the first IGBT tube Q1 and the fourth IGBT tube Q4 are in an off state, and the second IGB T tube Q2 and the third IGBT tube Q3 are in an on state.
  • the third IGBT tube Q3 is in an on state but no current flows.
  • the first capacitor C1 and the second capacitor C2 are both in a zero voltage discharge state.
  • the current through the inductor L is the rectified current.
  • FIG. 21 shows the operational state of the process of commutating the cross tube to the standpipe.
  • the horizontal tube is commutated to the vertical tube, the third IGBT tube Q3 is kept in the on state, the fourth IGBT tube Q4 is kept in the off state, and the first IGBT tube Q1 is turned from the off state to the on state, and the second IGBT tube Q2 is Go from the on state to the off state.
  • the rectified current is transferred from passing through the second IGBT transistor Q2 to passing through the second capacitor C2 due to the presence of the second capacitor C2.
  • the voltage of the second IGBT tube Q2 increases linearly from zero ,, which is zero voltage and zero current turn-off.
  • FIG. 5 is a circuit diagram showing a second embodiment of a T-type conversion circuit in the present invention. As shown in FIG.
  • the second embodiment of the ⁇ -type conversion circuit includes two vertically-configurable controllable switching devices, two laterally-configurable control devices, an inductor L, a first diode D1, and a first Two diodes D2, a third diode D3, a fourth diode D4, a first capacitor C1, a second capacitor C2, a third polarity capacitor C3, and a fourth polarity capacitor C4.
  • Two vertically disposed controllable switching devices are respectively a first controllable switching device and a fourth controllable switching device, wherein the first controllable switching device adopts an IGBT unit, including the first IGBT tube Q1 And a first freewheeling diode Dql connected in anti-parallel thereto; the fourth controllable switching device adopts an IGBT unit, and includes a fourth IGBT tube Q4 and a fourth freewheeling diode Dq4 connected in anti-parallel thereto.
  • the first IGBT tube Q1 is connected in series with the fourth IGBT tube Q4, the collector of the first IGBT tube Q1 is connected to the positive bus, the emitter of the fourth IGBT tube Q4 is connected to the negative bus, the emitter of the first IGBT tube Q1 and the fourth IGBT The collector of the tube Q4 is connected, and the connection point serves as an input and output terminal.
  • the two laterally-controllable switching devices on the intermediate bridge arm are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit, including The second IGBT tube Q2 and the second freewheeling diode Dq2 connected in anti-parallel thereto; the third controllable switching device adopts an IGBT unit, and includes a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel thereto.
  • the second IGBT tube Q2 and the third IGBT tube Q3 are connected in reverse series to the intermediate bridge arm.
  • the collector of the second IGBT transistor Q2 is connected to the input and output terminals; the emitter of the second IGBT transistor Q2 is connected to the emitter of the third IGBT transistor Q3; the collector of the third IGBT transistor is connected to the inductor L; the other end of the inductor L Connect to the center line.
  • the first diode D1 and the second diode D2 are connected in series, the cathode of the first diode D1 is connected to the positive bus, and the anode of the second diode D2 is connected to the collector of the third IGBT transistor Q3.
  • One end of the first capacitor C1 is connected to the connection point of the first diode D1 and the second diode D2, and the other end of the first capacitor C1 is connected to the emitter of the third IGBT tube Q3.
  • the third diode D3 and the fourth diode D4 are connected in series, the anode of the fourth diode D4 is connected to the negative bus, and the cathode of the third diode D3 is connected to the emitter of the second IGBT tube Q2.
  • the second capacitor C2 is terminated to the connection point of the third diode D3 and the fourth diode D4, and the other end of the second capacitor C2 is connected to the collector of the second IGBT tube.
  • the positive pole of the third polarity capacitor C3 is connected to the positive bus, and the negative pole is connected to the neutral line; the positive pole of the fourth polarity capacitor C4 is connected to the neutral line, and the negative pole is connected to the negative bus.
  • controllable switching device may also adopt a MOS unit, and when the MOS unit is used, the The MOS unit may be a MOS transistor with a body diode or a MOS transistor without an body diode and an anti-parallel diode.
  • the third embodiment of the T-type conversion circuit includes two vertically disposed controllable switching devices, two laterally disposed controllable switching devices, an inductor L, a first diode D1, and a first Two diodes D2, third diode D3, fourth diode D4, fifth diode D5, sixth diode D6, first capacitor C1, second capacitor C2, third polarity capacitor C3 And a fourth polarity capacitor C4.
  • the two vertically disposed controllable switching devices are respectively a first controllable switching device and a fourth controllable switching device, wherein the first controllable switching device adopts an IGBT unit, including the first IGBT tube Q1 And a first freewheeling diode Dql connected in anti-parallel thereto; the fourth controllable switching device adopts an IGBT unit, and includes a fourth IGBT tube Q4 and a fourth freewheeling diode Dq4 connected in anti-parallel thereto.
  • the first IGBT tube Q1 is connected in series with the fourth IGBT tube Q4, the collector of the first IGBT tube Q1 is connected to the positive bus, the emitter of the fourth IGBT tube Q4 is connected to the negative bus, the emitter of the first IGBT tube Q1 and the fourth IGBT The collector of the tube Q4 is connected, and the connection point serves as an input and output terminal.
  • the intermediate bridge arm includes two laterally disposed controllable switching devices, a fifth diode and a sixth diode.
  • the two laterally set controllable switching devices are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit, including the second IGBT tube Q2 and is anti-parallel thereto The connected second freewheeling diode Dq2; the third controllable switching device uses an IGBT unit, including a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel thereto.
  • the collector of the second IGBT transistor Q2 and the emitter of the third IGBT transistor Q3 are connected to the input and output terminals; the emitter of the second IGBT transistor Q2 is connected to the anode of the fifth diode D5, and the collector of the third IGBT transistor Q3 Connected to the cathode of the sixth diode D6, the cathode of the fifth diode D5 and the anode of the sixth diode D6 are connected to one end of the inductor L; the other end of the inductor L is connected to the center line.
  • the first diode D1 and the second diode D2 are connected in series, the cathode of the first diode D1 is connected to the positive bus, and the anode of the second diode D2 is connected to the collector of the third IGBT transistor Q3.
  • One end of the first capacitor C1 is connected to the connection point of the first diode D1 and the second diode D2, and the other end of the first capacitor C1 is connected to the emitter of the third IGBT tube Q3.
  • the third diode D3 and the fourth diode D4 are connected in series, the anode of the fourth diode D4 is connected to the negative bus, and the cathode of the third diode D3 is connected to the emitter of the second IGBT tube Q2.
  • the second capacitor C2 is terminated to the connection point of the third diode D3 and the fourth diode D4, and the other end of the second capacitor C2 is connected to the collector of the second IGBT tube.
  • the positive pole of the third polarity capacitor C3 is connected to the positive bus, and the negative pole is connected to the neutral line; the positive pole of the fourth polarity capacitor C4 is connected to the neutral line, and the negative pole is connected to the negative bus.
  • the controllable switching device may also adopt a MOS unit.
  • the MOS unit may be a MOS transistor with a body diode or a MOS transistor including a body diode and an anti-parallel. diode.
  • the inverter output voltage is a positive half cycle and the inverter output voltage is bent in a half cycle, and each half cycle is further divided into a vertical pipe.
  • the inverter output voltage is positive half cycle ⁇ , and the process of commutating the vertical pipe to the horizontal pipe is as follows:
  • FIG. 22 shows a state before the standpipe is commutated to the cross tube.
  • the first IGBT pipe Q1 and the third IGBT pipe Q3 are in an on state, and the second IGBT pipe Q2 and the fourth IGBT pipe Q4 are in an off state.
  • the current flows to the load Z through the first IGBT tube Q1, and the third IGBT tube Q3 is turned on, but since the sixth diode D6 and the second freewheeling diode Dq2 are reverse biased, there is no current on the intermediate bridge arm. through.
  • the third I GBT tube Q3 Since the third I GBT tube Q3 is turned on, the first capacitor C1 voltage is clamped to zero, and the first capacitor C1 is in a zero voltage discharge state. Since the first IGBT transistor Q1 is turned on, the second capacitor C2 is charged to the Vdc state. At this point, the current through the inductor L is zero.
  • FIG. 23 shows the operational state of the first stage in the process of commutating the riser to the cross tube.
  • the third IGBT tube Q3 is kept in an on state
  • the fourth IGBT tube Q4 is kept in an off state
  • the first IGBT tube Q1 is turned from the on state to the off state
  • the second IGBT tube Q2 is from the off state. Go to the on state.
  • the second capacitor C2 is discharged to the load Z through the fourth diode D4.
  • the second capacitor C2 charges the inductor L through the second IGBT transistor Q2, the fifth diode D5, the inductor L and the fourth diode D4, and the fourth polarity capacitor C4. Since the voltage on the second capacitor C2 is gradually discharged to zero, the voltage of the first IGBT transistor Q1 during the turn-off process is established at a finite rate dV/dt, and the current of the load Z is supplied by the second capacitor C2. Therefore, the first IGBT transistor Q1 is turned off in a zero voltage mode, and the turn-off loss is very small, which is a typical soft-switching process.
  • the current passing through the second IGBT tube Q2 is also increased at a finite rate di/dt. Therefore, the second I GBT tube is turned on in a zero current mode, and the conduction loss is very small, which is also a typical soft-critical process. .
  • FIG. 24 shows the operational state of the second stage in the process of commutating the riser to the cross tube.
  • the fourth diode D4 and the fifth diode D5 are turned off, and the current through the inductor L is again turned to zero, and the fourth freewheeling diode Dq4 is continuously turned on.
  • the load Z output level is clamped to the -Vdc/2 level.
  • Inductor L begins to store energy through the sixth diode D6 and the third IGBT tube Q3.
  • the current of the inductor L increases linearly from zero ,, and at the same time, the current through the fourth freewheeling diode Dq4 decreases in proportion.
  • the fourth freewheeling diode Dq4 is turned off.
  • the inverter output voltage is positive half cycle ⁇ , and the horizontal pipe commutation process to the vertical pipe is as follows:
  • the 25 shows a state in which the inverter output voltage is a positive half cycle ⁇ , a state in which the vertical pipe is commutated to the horizontal pipe, or a state before the horizontal pipe is commutated to the vertical pipe.
  • the first IGBT pipe Q1 and the fourth IGBT pipe Q 4 are in an off state, and the second IGBT pipe Q2 and the third IGBT pipe Q3 are in an on state.
  • the current through inductor L is equal to the current through load Z.
  • FIG. 26 shows the operational state of the third stage in the process of commutating the cross tube to the standpipe.
  • the third IGBT tube Q3 is kept in the on state
  • the fourth IGBT tube Q4 is kept in the off state
  • the first IGBT tube Q1 is turned from the off state to the on state
  • the second IGBT tube Q2 is turned on.
  • the status goes to the cutoff state.
  • the upper half bus voltage is reversely pressurized by the sixth diode D6 and the third IGBT transistor Q3.
  • the current of the inductor L is forced to decrease linearly.
  • the upper half bus establishes a power supply loop to the load Z through the first IGBT tube Q1.
  • the above two circuits coexist and work together.
  • the load current transitions to the loop flowing through the first IGBT transistor Q1.
  • the sixth diode D6 is turned off in reverse, and since the second IGBT transistor is turned off, the intermediate bridge arm is no longer turned on.
  • the rate of change di/dt is established, so the conduction process of the first IGBT tube Q1 is a soft-switching process.
  • the second IGBT transistor Q2 does not have a current flowing during the transition from the on state to the off state, and is also in the soft-off mode.
  • FIG. 27 shows the operational state of the fourth stage in the process of commutating the cross tube to the standpipe.
  • the load Z output level is clamped at the Vdc/2 level. Therefore, as shown in Fig. 27, the upper half line charges the second capacitor C2 through the first IGBT tube Q1, the third diode D3, the fifth diode D5, and the inductor L. Due to the presence of the inductance L, when the second capacitor C2 is charged to a voltage of Vdc, the third diode D3 and the fifth diode D5 are reversely turned off, the charging and commutation processes are completed, and the current is returned to the first IGBT tube Q1. The state of flowing to the load Z, that is, the state shown in FIG.
  • the third diode D3 and the fifth diode D5 are turned on and off at a finite current change rate di/dt, and thus, the third diode D3 and The switching loss during the turn-on and turn-off of the fifth diode D5 is very low, and it belongs to the soft-off mode.
  • each half cycle is further divided into a vertical tube to a horizontal tube commutation and a transverse tube direction
  • FIG. 28 shows a state before the standpipe is commutated to the cross tube.
  • the first IGBT tube Q1 and the third IGBT tube Q3 are in an on state, and the second IGBT tube Q2 and the fourth IGBT tube Q4 are in an off state.
  • the rectified current flows from the first freewheeling diode Dq1 to the bus.
  • the third IGBT tube Q3 is turned on but no current flows.
  • the first capacitor C1 is in a zero voltage discharge state.
  • the second capacitor C2 is charged to the Vdc state, and the current of the inductor L is zero.
  • FIG. 29 shows the operational state of the first stage of the commutation process of the riser to the cross tube.
  • the third IGB T tube Q3 is kept in an on state
  • the fourth IGBT tube Q4 is kept in an off state.
  • the first IGBT tube Q1 is turned on.
  • the second IGBT transistor Q2 is turned from the off state to the on state.
  • the voltage across the third capacitor C3 is applied to both ends of the inductor L through the first freewheeling diode Dq1, the fifth diode D5, and the second IGBT transistor Q2.
  • the current through the intermediate bridge arm increases linearly from zero; at the same time, the current through the first freewheeling diode Dql decreases linearly until the current through the inductor L increases to the rectified current. A freewheeling diode Dql is turned off.
  • FIG. 30 shows the operational state of the second stage of the flow of the standpipe to the cross tube.
  • the first freewheeling diode Dql is turned off, and the second capacitor C2 is discharged through the second IGBT transistor Q2, the fourth diode D4, the fifth diode D5, and the inductor L. Discharge to zero.
  • the second phase is completed.
  • the AC input voltage is a positive half cycle ⁇ , and the commutation process of the horizontal pipe to the vertical pipe is as follows:
  • FIG. 31 shows the state after the end of the commutation process of the riser to the cross tube, that is, the state before the cross tube is commutated to the riser.
  • the second capacitor C2 is discharged, and the rectified current is carried by the fifth diode D5, the second IGBT tube Q2, and the inductor L.
  • the first IGBT tube Q1 and the fourth IGBT tube Q4 are in an off state, and the second IGBT tube Q2 and the third IGBT tube Q3 are in an on state.
  • the third IGBT tube Q3 is in an on state but no current flows.
  • the first capacitor C1 and the second capacitor C2 are both in a zero voltage discharge state.
  • the current through the inductor L is the rectified current.
  • FIG. 32 illustrates an operational state of a flow conversion process of a cross tube to a standpipe.
  • the horizontal tube is commutated to the vertical tube, the third IGBT tube Q3 is kept in the on state, the fourth IGBT tube Q4 is kept in the off state, and the first IGBT tube Q1 is turned from the off state to the on state, and the second IGBT tube Q2 is Go from the on state to the off state.
  • the rectified current is transferred from passing through the second IGBT transistor Q2 to passing through the second capacitor C2 due to the presence of the second capacitor C2.
  • the voltage of the second IGBT transistor Q2 increases linearly from zero ,, which is zero voltage and zero current shutdown.
  • the input source Z charges the second capacitor C2 through the third diode D3, the fifth diode D5, and the inductor L.
  • the second capacitor C2 completes the charging process, and the current of the rectified current flowing to the bus line through the first freewheeling diode Dql gradually increases, due to the presence of the first freewheeling diode Dql,
  • An IGBT tube Q1 has no current flowing, so the conduction process of the first IGBT tube Q1 belongs to zero current, Zero voltage is turned on. It can be seen from the above analysis that during the commutation of the horizontal tube to the vertical tube, the conduction and the closing processes of the first IGBT tube Q1 and the second IGBT tube Q2 are soft-switching processes.
  • all controllable switching devices and diode devices can achieve soft switching, that is, zero voltage switching (ZVS), zero current. Switch off (ZCS) or zero voltage zero current (ZVZCS), or switch on and off with limited dv/dt and di/dt. Therefore, the on-off loss of the controllable switching device is greatly reduced, and the working efficiency of the conversion circuit is improved; the power device is not easily broken by the second breakdown, and the dead zone is eliminated.
  • controllable switching device switches on and off with limited dv/dt and di/dt, so the system EMI electromagnetic interference is much more optimized than the unimplemented soft key.
  • the conversion device can be multiplied by the operating frequency of the conventional conversion device, so that the output filter parameter required by the conversion device is required to be low, and the size can also be The reduction is doubled, which is beneficial to further reduce material costs, reduce product size, and increase product power density.
  • FIG. 7 is a circuit diagram showing an embodiment of a three-phase conversion circuit in the present invention.
  • the three-phase conversion circuit in the embodiment includes a first conversion circuit, a second conversion circuit, and a third conversion circuit; the first conversion circuit, the second conversion circuit, and the third conversion circuit all adopt the T-type conversion described above.
  • the ⁇ -type conversion circuit described in Embodiment 1 of the circuit; the center line of the first conversion circuit, the center line of the second conversion circuit, and the center line of the third conversion circuit are connected to each other.
  • the first conversion circuit, the second conversion circuit, and the third conversion circuit can also adopt the T-type conversion circuit described in the second embodiment or the third embodiment of the above-described T-type conversion circuit, and the effect is the same.
  • FIG. 8 is a schematic diagram of Embodiment 1 of a conversion device.
  • the first embodiment of the transforming device employs the T-type converting circuit described in the first embodiment of the T-type converting circuit.
  • the third diode D3, the fourth diode D4, the second capacitor C2, the second IGBT tube Q2, and the second freewheeling diode Dq2 in the T-type conversion circuit are integrally disposed as the first circuit module U1.
  • the first diode D1, the second diode D2, the first capacitor C1, the third IGBT transistor Q3, and the third freewheeling diode Dq3 in the T-type conversion circuit are integrally disposed as the second circuit module U2.
  • the first end S1 of the first circuit module U1 is connected to the emitter of the second IGBT tube Q2 for connecting the inductor L.
  • the second end S2 of the first circuit module U 1 is connected to the collector of the second IGBT tube Q2 for connecting the fourth end S4 of the second circuit module U2.
  • the third end S3 of the first circuit lateral block U1 is connected to the anode of the fourth diode D4 for connecting the negative bus.
  • the fourth end S4 of the second circuit module U2 is connected to the collector of the third IGBT tube Q3 for connecting the second end S2 of the first circuit module U1.
  • the fifth end S5 of the second circuit module U2 is connected to the emitter of the third IGBT tube Q3 for connecting the input and output terminals.
  • the sixth end S6 of the second circuit module U2 is connected to the cathode of the first diode D1 for connecting the positive bus.
  • FIG. 9 is a schematic diagram of a second embodiment of a transforming device.
  • the second embodiment of the transforming device employs the T-type converting circuit described in the second embodiment of the T-type converting circuit.
  • the third diode D3, the fourth diode D4, the second capacitor C2, the second IGBT tube Q2, and the second freewheeling diode Dq2 in the T-type conversion circuit are integrally disposed as the first circuit module Ul.
  • the first diode D1, the second diode D2, the first capacitor Cl, the third IGBT transistor Q3, and the third freewheeling diode Dq3 in the T-type conversion circuit are integrally disposed as the second circuit module U2.
  • the first terminal S1 of the first circuit module U1 is connected to the emitter of the second IGBT transistor Q2 for connecting the fifth terminal S5 of the second circuit module U2.
  • the second end S2 of the first circuit module U1 is connected to the collector of the second IGBT tube Q2 for connecting the input and output terminals.
  • the third terminal S3 of the first circuit lateral block U1 is connected to the anode of the fourth diode D4 for connecting the negative bus.
  • the fourth terminal S4 of the second circuit module U2 is connected to the collector of the third IGBT transistor Q3 for connecting the inductor L.
  • the fifth end S5 of the second circuit module U2 is connected to the emitter of the third IGBT tube Q3 for connecting the first end Sl of the first circuit module U1.
  • the sixth end S6 of the second circuit module U2 is connected to the cathode of the first diode D1 for connecting the positive bus.
  • FIG. 10 is a schematic diagram of Embodiment 3 of a conversion device.
  • the third embodiment of the transforming device employs the T-type converting circuit described in the third embodiment of the T-type converting circuit.
  • the third diode D 3 , the fourth diode D4 , the second capacitor C2 , the second IGBT tube Q2 , and the second freewheeling diode Dq2 in the T-type conversion circuit are integrally disposed as the first circuit module U1.
  • the first diode D1 and the second diode D2 in the T-type conversion circuit The first capacitor CI, the third IGBT transistor Q3, and the third freewheeling diode Dq3 are integrally disposed as the second circuit module U2.
  • the first terminal SI of the first circuit module U1 is connected to the emitter of the second IGBT transistor Q2 for connecting the anode of the fifth diode D5.
  • the second end S2 of the first circuit module U1 is connected to the collector of the second IGBT tube Q2 for connecting the input and output terminals.
  • the third end S3 of the first circuit lateral block U1 is connected to the anode of the fourth diode D4 for connecting the negative bus.
  • the fourth terminal S4 of the second circuit module U2 is connected to the collector of the third IGBT transistor Q3 for connecting the cathode of the sixth diode D6.
  • the fifth end S5 of the second circuit module U2 is connected to the emitter of the third IGBT tube Q3 for connecting the input and output ends.
  • the sixth end S6 of the second circuit module U2 is connected to the cathode of the first diode D1 for connecting the positive bus.
  • first circuit module U1 or the second circuit module U2 may exist separately.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
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  • Rectifiers (AREA)

Abstract

L'invention concerne un circuit de conversion de type T et un circuit de conversion triphasé correspondant et un dispositif de conversion. Selon l'invention, en ajoutant une bobine d'induction, quatre diodes et deux condensateurs dans le circuit de conversion de type T selon l'état de la technique, un dispositif de commutation commandable et un dispositif à diode dans le circuit de conversion de type T peuvent réaliser une commutation en douceur afin de réduire la consommation d'énergie du dispositif d'alimentation et du dispositif à diode. Avec le dispositif de conversion qui utilise le circuit de conversion de type T selon l'invention, par la réalisation d'un premier module de circuit et d'un deuxième module de circuit, des composants de l'état de la technique sont combinés avec de nouveaux composants dans la solution technique selon l'invention, ce qui permet de réduire considérablement le coût de transformation en principe sans modifier l'implantation de circuit interne du dispositif onduleur/redresseur existant. La structure topologique est compacte et la conception de la barre-bus est simple, bénéficiant fortement de l'implantation électrique et de la conception structurelle.
PCT/CN2017/103300 2017-05-19 2017-09-26 Circuit de conversion de type t et circuit de conversion triphasé correspondant et dispositif de conversion Ceased WO2018209866A1 (fr)

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DE112017007565.3T DE112017007565T5 (de) 2017-05-19 2017-09-26 T-wandlerschaltung, entsprechende dreiphasige wandlerschaltung und wandlervorrichtung

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CN201710357985.7A CN108964505B (zh) 2017-05-19 2017-05-19 一种t型变换电路及相应的三相变换电路和变换装置
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CN117434358A (zh) * 2022-07-15 2024-01-23 华润微电子（重庆）有限公司 T型三电平换流单元的动态特性测试电路及方法
WO2025013700A1 (fr) * 2023-07-07 2025-01-16 株式会社Ｇｓユアサ Onduleur à résonance

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