WO2020172688A2 - Détecteur d'intensité de signaux - Google Patents

Détecteur d'intensité de signaux Download PDF

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Publication number
WO2020172688A2
WO2020172688A2 PCT/US2020/026147 US2020026147W WO2020172688A2 WO 2020172688 A2 WO2020172688 A2 WO 2020172688A2 US 2020026147 W US2020026147 W US 2020026147W WO 2020172688 A2 WO2020172688 A2 WO 2020172688A2
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WIPO (PCT)
Prior art keywords
capacitor
signal
stage
differential
loading block
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PCT/US2020/026147
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English (en)
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WO2020172688A3 (fr
Inventor
Jie Xu
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FutureWei Technologies Inc
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FutureWei Technologies Inc
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Priority to CN202080097753.2A priority Critical patent/CN115211032A/zh
Publication of WO2020172688A2 publication Critical patent/WO2020172688A2/fr
Publication of WO2020172688A3 publication Critical patent/WO2020172688A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00—Arrangements for measuring electric power or power factor
    • G01R21/01—Arrangements for measuring electric power or power factor in circuits having distributed constants
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/50—Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
    • H03F3/505—Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/447—Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/453—Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45542—Indexing scheme relating to differential amplifiers the IC comprising bias stabilisation means, e.g. DC level stabilisation, and temperature coefficient dependent control, e.g. by DC level shifting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45628—Indexing scheme relating to differential amplifiers the LC comprising bias stabilisation means, e.g. DC level stabilisation means, and temperature coefficient dependent control, e.g. DC level shifting means

Definitions

  • the disclosure generally relates to detecting a strength of a signal, such as a Radio Frequency (RF) signal.
  • RF Radio Frequency
  • Signal power detectors are widely used to detect the power level of signal.
  • signal power detectors may be used in communication systems, radar systems, and measurement instruments.
  • a signal power detector may produce a voltage signal indicative of a power of an input signal.
  • an RF power detector may produce a voltage signal indicative of a power of an RF signal.
  • RF power detectors may be used in wireless RF communication systems to monitor the power of an RF signal transmitted by an RF transmitter and/or the power of an RF signal received by an RF receiver.
  • a process variation refers to the process used to fabricate the signal power detector. For example, there could be mismatches be transistors, capacitors, resistors or other electrical components that may result in inaccurate determination of the signal power level.
  • Changes in operating temperature may also impact the accuracy of the signal power detector.
  • the output voltage for a given signal power level may be temperature dependent for some conventional signal power detectors.
  • some conventional signal power detectors may not produce an accurate result across a range of operating temperatures.
  • a signal power detector is used in an environment in which there could be a wide range in operating temperature.
  • the signal power detector could be located near electrical components that generate substantial heat.
  • an apparatus for detecting signal strength comprises a differential sensor stage having an input and an output, a differential reference stage having an input and an output, a capacitor stage configured to couple an input signal to the input of the differential sensor stage, a biasing circuit configured to bias the differential sensor stage and the differential reference stage, a differential output between the output of the differential sensor stage and the output of the differential reference stage.
  • the differential output is configured to provide a signal indicative of strength of the input signal.
  • the biasing circuit is configured to bias the differential sensor stage and the differential reference stage in a weak inversion region.
  • the biasing circuit is configured to apply substantially the same bias conditions to the differential sensor stage and to the differential reference stage.
  • the capacitor stage is configured to keep the differential sensor stage operating in the weak inversion region.
  • the capacitor stage is configured to keep the input signal at the input of the differential sensor stage within a target range to keep the differential sensor stage operating in the weak inversion region.
  • the capacitor stage comprises an H-type capacitor bridge.
  • the H-type capacitor bridge comprises: a first capacitor having a first terminal and a second terminal; a second capacitor having a first terminal and a second terminal, the first terminals of the first capacitor and the second capacitor configured to receive the input signal; a third capacitor having a first terminal connected to the second terminal of the first capacitor, the third capacitor having a second terminal connected to a first terminal of the input of the differential sensor stage; a fourth capacitor having a first terminal connected to the second terminal of the second capacitor, the fourth capacitor having a second terminal connected to a second terminal of the input of the differential sensor stage; and a fifth capacitor having a first terminal connected to the second terminal of the first capacitor and to the first terminal of the third capacitor, the fifth capacitor having a second terminal connected to the second terminal of the second capacitor and to the first terminal of the fourth capacitor.
  • the first capacitor and the second capacitor have substantially the same capacitance.
  • the third capacitor and the fourth capacitor have substantially the same capacitance.
  • the differential sensor stage comprises a first transistor and a second transistor having a source follower configuration.
  • the differential reference stage comprises a third transistor and a fourth transistor having a source follower configuration.
  • the differential sensor stage comprises a first MOSFET transistor and a second MOSFET transistor having a source follower configuration.
  • the differential reference stage comprises a third MOSFET transistor and a fourth MOSFET transistor having a source follower configuration.
  • the differential sensor stage comprises a first loading block coupled to the output of the differential sensor stage.
  • the differential reference stage comprises a second loading block coupled to the output of the differential reference stage.
  • the first loading block comprises a first resistor.
  • the second loading block comprises a second resistor. The first resistor and the second resistor have substantially the same resistance.
  • the second loading block is configured to provide temperature compensation for the circuit.
  • the second loading block is configured to keep the signal at the differential output within a target range independent of temperature.
  • the second loading block further comprises a proportional to absolute temperature (PTAT) current source in parallel with the second resistor.
  • PTAT proportional to absolute temperature
  • the first loading block further comprises a capacitor in parallel with the first resistor.
  • the first loading block comprises a passive loading block.
  • the second loading block comprises an active loading block.
  • the first loading block is configured to provide temperature compensation.
  • the first loading block is configured to keep the signal at the differential output within a target range independent of temperature.
  • the first loading block further comprises a complimentary to absolute temperature (CTAT) current source in parallel with the first resistor.
  • CTAT complimentary to absolute temperature
  • the first loading block comprises an active loading block.
  • the second loading block comprises a passive loading block.
  • the input signal is based on a radio frequency (RF) signal.
  • RF radio frequency
  • the apparatus further comprises an RF transmitter configured to generate the RF signal.
  • the apparatus still further comprises an antenna coupled to the RF transmitter and configured to transmit the RF signal.
  • the strength of the input signal is proportional to power of the transmitted RF signal.
  • the apparatus further comprises an RF receiver configured to generate the RF signal.
  • the apparatus still further comprises an antenna coupled to the RF receiver and configured to receive the RF signal. The strength of the input signal is proportional to power of the received RF signal.
  • the strength comprises a peak voltage of the input signal.
  • the strength corresponds to a peak power of the input signal.
  • a further aspect comprises a method for detecting signal strength.
  • the method comprises biasing a differential sensor stage having an input and an output.
  • the method comprises biasing a differential reference stage having an input and an output.
  • the method comprises coupling an input signal to the input of the differential sensor stage using a capacitor stage.
  • the method comprises providing a signal indicative of strength of the input signal at a differential output between the output of the differential sensor stage and the output of the differential reference stage.
  • a further aspect comprises a wireless communication device.
  • the wireless communication device comprises a transceiver configured to receive and to transmit radio frequency (RF) signals, a differential sensor stage having an input and an output, a differential reference stage having an input and an output, a capacitor stage coupled to the transceiver and configured to couple a voltage signal based on an RF signal to the input of the differential sensor stage, a biasing circuit configured to bias the differential sensor stage and the differential reference stage, and a differential output between the output of the differential sensor stage and the output of the differential reference stage.
  • the differential output is configured to provide a signal indicative of power of the RF signal.
  • FIG. 1 illustrates a wireless network for communicating data.
  • FIG. 2 illustrates example details of user equipment (UE) that may implement the methods and teachings according to this disclosure.
  • UE user equipment
  • FIG. 3 illustrates an example base station (BS) that may implement the methods and teachings according to this disclosure.
  • BS base station
  • FIG. 4 depicts an apparatus that is configured to detect the strength of an input signal.
  • FIG. 5 depicts one embodiment of an apparatus that is configured to detect a strength of an input signal.
  • FIG. 6 is a circuit schematic of one embodiment of a signal power detector.
  • FIG. 7 is a circuit schematic of one embodiment of a signal power detector.
  • FIG. 8 depicts a flowchart of one embodiment of a process of detecting a power of an input signal.
  • FIG. 9 depicts a flowchart of one embodiment of a process of operating differential stages of a signal power detector in a weak inversion region.
  • FIG. 10 depicts a flowchart of one embodiment of a process of providing temperature compensation in a signal power detector.
  • FIG. 1 1 depicts relationships between signal power and voltages of a MOSFETs in an embodiment of a signal power detector.
  • FIG. 12 depicts a flowchart of one embodiment of a process of adjusting the sensitivity of an RF receiver based on a detected power level of an RF signal received by the RF receiver.
  • FIG. 13 depicts a flowchart of one embodiment of a process of adjusting the gain of an RF transmitter based on a detected power level of an RF signal transmitted by the RF transmitter.
  • the present disclosure will now be described with reference to the figures, which in general relate to an apparatus and method for detecting a strength of a signal.
  • the signal strength could be a power level, a voltage level, but is not limited thereto.
  • the apparatus is able to detect the signal strength with high accuracy.
  • the apparatus compensates for process variations. For example, there may be some structural differences between transistors.
  • the apparatus compensates for operating temperature variations.
  • FIG. 1 illustrates a wireless network for communicating data.
  • the communication system 100 includes, for example, user equipment 1 10A, 1 10B, and 1 10C, radio access networks (RANs) 120A and 120B, a core network 130, a public switched telephone network (PSTN) 140, the Internet 150, and other networks 160. Additional or alternative networks include private and public data-packet networks including corporate intranets. While certain numbers of these components or elements are shown in the figure, any number of these components or elements may be included in the system 100.
  • Some embodiments of signal power detectors are implemented in UE 1 10.
  • Some embodiments of signal power detectors are implemented in RAN 120. Signal power detectors may be used elsewhere in the communication system 100.
  • the wireless network may be a fifth generation (5G) network including at least one 5G base station which employs orthogonal frequency- division multiplexing (OFDM) and/or non-OFDM and a transmission time interval (TTI) shorter than 1 ms (e.g., 100 or 200 microseconds), to communicate with the communication devices.
  • 5G fifth generation
  • a base station may also be used to refer any of the eNB and the 5G BS (gNB).
  • the network may further include a network server for processing information received from the communication devices via the at least one eNB or gNB.
  • System 100 enables multiple wireless users to transmit and receive data and other content.
  • the system 100 may implement one or more channel access methods, such as but not limited to code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), or single-carrier FDMA (SC-FDMA).
  • CDMA code division multiple access
  • TDMA time division multiple access
  • FDMA frequency division multiple access
  • OFDMA orthogonal FDMA
  • SC-FDMA single-carrier FDMA
  • the user equipment (UE) 1 10A, 1 10B, and 1 10C which can be referred to individually as a UE 1 10, or collectively as the UEs 1 10, are configured to operate and/or communicate in the system 100.
  • a UE 1 10 can be configured to transmit and/or receive wireless signals or wired signals.
  • Each UE 1 10 represents any suitable end user device and may include such devices (or may be referred to) as a user equipment/device, wireless transmit/receive unit (UE), mobile station, fixed or mobile subscriber unit, pager, cellular telephone, personal digital assistant (PDA), smartphone, laptop, computer, touchpad, wireless sensor, wearable devices or consumer electronics device.
  • UE wireless transmit/receive unit
  • PDA personal digital assistant
  • the RANs 120A, 120B include one or more base stations (BSs) 170A, 170B, respectively.
  • the RANs 120A and 120B can be referred to individually as a RAN 120, or collectively as the RANs 120.
  • the base stations (BSs) 170A and 170B can be referred individually as a base station (BS) 170, or collectively as the base stations (BSs) 170.
  • Each of the BSs 170 is configured to wirelessly interface with one or more of the UEs 1 10 to enable access to the core network 130, the PSTN 140, the Internet 150, and/or the other networks 160.
  • the base stations (BSs) 170 may include one or more of several well-known devices, such as a base transceiver station (BTS), a Node-B (NodeB), an evolved NodeB (eNB), a next (fifth) generation (5G) NodeB (gNB), a Flome NodeB, a Flome eNodeB, a site controller, an access point (AP), or a wireless router, or a server, router, switch, or other processing entity with a wired or wireless network.
  • BTS base transceiver station
  • NodeB Node-B
  • eNB evolved NodeB
  • gNB next (fifth) generation
  • Flome NodeB Flome NodeB
  • Flome eNodeB Flome eNodeB
  • site controller a station
  • AP access point
  • AP access point
  • wireless router or a server, router, switch, or other processing entity with a wired or wireless network.
  • the BS 170A forms part of the RAN 120A, which may include one or more other BSs 170, elements, and/or devices.
  • the BS 170B forms part of the RAN 120B, which may include one or more other BSs 170, elements, and/or devices.
  • Each of the BSs 170 operates to transmit and/or receive wireless signals within a particular geographic region or area, sometimes referred to as a“cell.”
  • multiple-input multiple-output (MIMO) technology may be employed having multiple transceivers for each cell.
  • the BSs 170 communicate with one or more of the UEs 1 10 over one or more air interfaces (not shown) using wireless communication links.
  • the air interfaces may utilize any suitable radio access technology.
  • the system 100 may use multiple channel access functionality, including for example schemes in which the BSs 170 and UEs 1 10 are configured to implement the Long Term Evolution wireless communication standard (LTE), LTE Advanced (LTE-A), and/or LTE Multimedia Broadcast Multicast Service (MBMS).
  • LTE Long Term Evolution wireless communication standard
  • LTE-A LTE Advanced
  • MBMS LTE Multimedia Broadcast Multicast Service
  • the base stations 170 and user equipment 1 10A- 1 10C are configured to implement UMTS, HSPA, or HSPA+ standards and protocols.
  • other multiple access schemes and wireless protocols may be utilized.
  • the RANs 120 are in communication with the core network 130 to provide the UEs 1 10 with voice, data, application, Voice over Internet Protocol (VoIP), or other services.
  • VoIP Voice over Internet Protocol
  • the RANs 120 and/or the core network 130 may be in direct or indirect communication with one or more other RANs (not shown).
  • the core network 130 may also serve as a gateway access for other networks (such as PSTN 140, Internet 150, and other networks 160).
  • some or all of the UEs 1 10 may include functionality for communicating with different wireless networks over different wireless links using different wireless technologies and/or protocols.
  • the RANs 120 may also include millimeter and/or microwave access points (APs).
  • the APs may be part of the BSs 170 or may be located remote from the BSs 170.
  • the APs may include, but are not limited to, a connection point (an mmW CP) or a BS 170 capable of mmW communication (e.g., a mmW base station).
  • the mmW APs may transmit and receive signals in a frequency range, for example, from 24 GHz to 100 GHz, but are not required to operate throughout this range.
  • the term base station is used to refer to a base station and/or a wireless access point.
  • FIG. 1 illustrates one example of a communication system
  • the communication system 100 could include any number of user equipment, base stations, networks, or other components in any suitable configuration.
  • user equipment may refer to any type of wireless device communicating with a radio network node in a cellular or mobile communication system.
  • Non-limiting examples of user equipment are a target device, device-to-device (D2D) user equipment, machine type user equipment or user equipment capable of machine-to-machine (M2M) communication, laptops, PDA, iPad, Tablet, mobile terminals, smart phones, laptop embedded equipped (LEE), laptop mounted equipment (LME) and USB dongles.
  • D2D device-to-device
  • M2M machine type user equipment or user equipment capable of machine-to-machine
  • laptops PDA, iPad, Tablet
  • smart phones laptop embedded equipped (LEE), laptop mounted equipment (LME) and USB dongles.
  • LEE laptop embedded equipped
  • LME laptop mounted equipment
  • FIG. 2 illustrates example details of a UE 110 that may implement the methods and teachings according to this disclosure.
  • the UE 110 may for example be a mobile telephone, but may be other devices in further examples such as a desktop computer, laptop computer, tablet, hand-held computing device, automobile computing device and/or other computing devices.
  • the exemplary UE 110 is shown as including at least one transmitter 202, at least one receiver 204, memory 206, at least one processor 208, and at least one input/output device 212.
  • the processor 208 can implement various processing operations of the UE 110.
  • the processor 208 can perform signal coding, data processing, power control, input/output processing, or any other functionality enabling the UE 110 to operate in the system 100 (FIG.
  • the processor 208 may include any suitable processing or computing device configured to perform one or more operations.
  • the processor 208 may include a microprocessor, microcontroller, digital signal processor, field programmable gate array, or application specific integrated circuit.
  • the memory 206 is non-transitory memory storage, in one embodiment.
  • the transmitter 202 can be configured to modulate data or other content for transmission by at least one antenna 210.
  • the transmitter 202 can also be configured to amplify, filter and a frequency convert RF signals before such signals are provided to the antenna 210 for transmission.
  • the transmitter 202 can include any suitable structure for generating signals for wireless transmission.
  • a signal power detector is used to detect a power level of a signal generated by transmitter 202.
  • the signal power detector output includes a DC voltage that is indicative of the power of the signal (e.g., RF signal). The DC voltage could be indicative of the power of the signal at the output of the transmitter 202, or the power of a wireless RF signal transmitted by the antenna 210.
  • the receiver 204 can be configured to demodulate data or other content received by the at least one antenna 210.
  • the receiver 204 can also be configured to amplify, filter and frequency convert RF signals received via the antenna 210.
  • the receiver 204 is an RF signal receiver, in some embodiments.
  • the receiver 204 can include any suitable structure for processing signals received wirelessly.
  • the antenna 210 can include any suitable structure for transmitting and/or receiving wireless signals. The same antenna 210 can be used for both transmitting and receiving RF signals, or alternatively, different antennas 210 can be used for transmitting signals and receiving signals.
  • a signal power detector is used to detect a power level of a signal received by antenna.
  • the signal power detector output includes a DC voltage that is indicative of the power of the signal (e.g., RF signal) received by antenna.
  • one or multiple transmitters 202 could be used in the UE 1 10
  • one or multiple receivers 204 could be used in the UE 1 10
  • one or multiple antennas 210 could be used in the UE 1 10.
  • at least one transmitter 202 and at least one receiver 204 could be combined into a transceiver. Accordingly, rather than showing a separate block for the transmitter 202 and a separate block for the receiver 204 in FIG. 2, a single block for a transceiver could have been shown.
  • the UE 1 10 further includes one or more input/output devices 212.
  • the input/output devices 212 facilitate interaction with a user.
  • Each input/output device 212 includes any suitable structure for providing information to or receiving information from a user, such as a speaker, microphone, keypad, keyboard, display, or touch screen.
  • the UE 1 10 includes at least one memory 206.
  • the memory 206 stores instructions and data used, generated, or collected by the UE 1 10.
  • the memory 206 could store software or firmware instructions executed by the processor(s) 208 and data used to reduce or eliminate interference in incoming signals.
  • Each memory 206 includes any suitable volatile and/or non-volatile storage and retrieval device(s). Any suitable type of memory may be used, such as random access memory (RAM), read only memory (ROM), hard disk, optical disc, subscriber identity module (SIM) card, memory stick, secure digital (SD) memory card, and the like.
  • FIG. 3 illustrates an example BS 170 that may implement the methods and teachings according to this disclosure.
  • the BS 170 includes at least one processor 308, at least one transmitter 302, at least one receiver 304, one or more antennas 310, and at least one memory 306.
  • the processor 308 implements various processing operations of the BS 170, such as signal coding, data processing, power control, input/output processing, or any other functionality.
  • Each processor 308 includes any suitable processing or computing device configured to perform one or more operations.
  • Each processor 308 could, for example, include a microprocessor, microcontroller, digital signal processor, field programmable gate array, or application specific integrated circuit.
  • the memory 306 is non-transitory memory storage, in one embodiment.
  • Each transmitter 302 includes any suitable structure for generating signals for wireless transmission to one or more UEs 1 10 or other devices.
  • Each receiver 304 includes any suitable structure for processing signals received wirelessly from one or more UEs 1 10 or other devices. Although shown as separate blocks or components, at least one transmitter 302 and at least one receiver 304 could be combined into a transceiver.
  • Each antenna 310 includes any suitable structure for transmitting and/or receiving wireless signals. While a common antenna 310 is shown here as being coupled to both the transmitter 302 and the receiver 304, one or more antennas 310 could be coupled to the transmitter(s) 302, and one or more separate antennas 310 could be coupled to the receiver(s) 304.
  • Each memory 306 includes any suitable volatile and/or non-volatile storage and retrieval device(s).
  • the base station 170 includes a signal power detector that is configured to detect a power level of a signal transmitted by transmitter 302. In some embodiments, the base station 170 includes a signal power detector that is configured to detect a power level of a signal received by receiver 304. In some embodiments, the signal power detector outputs a DC voltage that is indicative of the power level of an RF signal (which may be received or transmitted by base station 170).
  • FIG. 4 depicts an apparatus 400 that is configured to detect the strength of an input signal.
  • the apparatus 400 could detect a power level or a voltage level of the input signal to the capacitor stage 402.
  • it is desirable to determine a power level of a RF signal such as a wireless RF signal.
  • the input signal in FIG. 4 is not necessarily the wireless RF signal. Rather, the input signal may be a voltage signal that has a magnitude that is proportional to the power of the wireless RF signal.
  • the voltage signal may associated with a resistance.
  • the relationship between the input signal and the power of an RF signal is given by:
  • P is the power of the RF signal
  • V is the voltage of the input signal
  • R is a resistance associated with the input signal
  • A is a proportionality factor, which may be determined empirically. Thus, based on the strength of the input signal, the power of the wireless RF signal may be determined.
  • the input signal in FIG. 4 is an RF signal (but not required to be a wireless RF signal).
  • the apparatus 400 may be used in system 100, but is not limited to a communication system. In one embodiment, the apparatus 400 is used in UE 1 10 (such as a wireless communication device). The apparatus 400 may be used in other devices such as RANs 120. In one embodiment, the apparatus 400 is used to detect a power level of a RF signal that is received by a wireless communication device. In one embodiment, the apparatus 400 is used to detect a power level of a RF signal that is transmitted by a wireless communication device. The term“input signal” is used because the signal is input into the apparatus 400.
  • the apparatus includes a capacitor stage 402, a differential sensor stage 404, a differential reference stage 406, and a biasing circuit 408.
  • the differential sensor stage 404 and the differential reference stage 406 are operated in a weak inversion region.
  • a weak inversion system is one in which transistors are operated in the weak inversion region (e.g., gate-to-source voltages are below required threshold voltages). Operating the transistors in the weak inversion region may make the apparatus 400 less sensitive to structural differences between the transistors. Such structural differences may occur due to limitations in the process of fabricating the transistors. Hence, operating the transistors in the weak inversion region may reduce inaccuracies due to such structural differences.
  • Equation 2 One possible equation to describe the weak inversion region is given by Equation 2.
  • Equation 2 Ids is the drain to source current, Is is a characteristic current that defines the current that leaks through the transistor, Vgs is the gate to source voltage, Vth is the threshold voltage of the transistor, n is the subthreshold slope factor, and Vt is the thermal voltage (kT/q). Equation 1 applies for when Vgs is less than or equal to Vth. Note that while Equation 1 represents one possible way to describe the weak inversion region, other equations may be used. For example, other equations could add additional factors.
  • the biasing circuit 408 is configured to bias the differential sensor stage 404 and the differential reference stage 406. In one embodiment, the biasing circuit 408 is configured to bias the differential sensor stage 404 and the differential reference stage 406 in the weak inversion region. The biasing circuit 408 provides voltages to bias input 416 of the differential sensor stage 404 and a bias input 418 of the differential reference stage 406.
  • the capacitor stage 402 is configured to couple the input signal to the differential sensor stage 404.
  • the capacitor stage 402 has an input 410 that is configured to receive the input signal.
  • the input signal could be provided by, for example, transmitter 202 or receiver 204 (see FIG. 2).
  • Such signals are not necessarily wireless signals (such as the RF signal received by or transmitted from antenna 210).
  • the apparatus 400 detects the power level of the input signal, which may be correlated to the power level of, for example, an RF signal received by or transmitted from antenna 210.
  • the capacitor stage 402 has an output 412 that is connected to a signal input 414 of the differential sensor stage 404.
  • the signal input 414 may overlap in whole or in part with the bias input 416.
  • both the signal input 414 and the bias input 416 may include gate terminals of MOS transistors.
  • the capacitor stage 402 is configured to keep the strength of the input signal at the input of the differential sensor stage 404 within a target range, which in turn keeps the transistors (in the differential sensor stage 404) in the weak inversion region.
  • the target range is a target voltage range. Therefore, in some embodiments, the capacitor stage 402 helps to overcome structural differences in the transistors due to, for example, process variations. Therefore, the capacitor stage 402 may improve accuracy of the apparatus 400 in signal strength detection.
  • the differential sensor stage 404 has an output 420.
  • the differential reference stage 406 has an output 422.
  • a voltage between these two outputs 420, 422 serves as a differential output for the apparatus 400.
  • the DC voltage between these two outputs 420, 422 serves as the differential output for the apparatus 400.
  • the voltage (e.g., DC voltage) between outputs 420, 422 is indicative of the strength of the input signal.
  • the strength of the input signal may be proportional to the power another signal, such as a wireless RF signal, as described in Equation 1.
  • the apparatus 400 is configured as a peak power detector. For example, the apparatus 400 could detect the peak power of an RF signal.
  • FIG. 5 depicts one embodiment of an apparatus 500 that is configured to detect a strength (e.g., voltage level, power level) of an input signal.
  • the input signal may be based on an RF signal.
  • the apparatus 500 may be used to, for example, detect a power of a wireless RF signal without directly measuring the power of the RF signal.
  • the strength of the input signal may be proportional to the power in a wireless RF signal.
  • the apparatus 500 has other uses than detecting the power of a wireless RF signal.
  • the apparatus 500 may be used in system 100, but is not limited to a communication system.
  • the apparatus 400 is used in UE 1 10 (such as a wireless communication device).
  • the apparatus 500 may be used on other devices such as RANs 120.
  • the apparatus 500 depicts further details of one embodiment of apparatus 400.
  • further details of one embodiment of the differential sensor stage 404 and the differential reference stage 406 are depicted.
  • the differential sensor stage 404 includes sensor transistors 502 and a sensor loading block 506.
  • the differential reference stage 406 includes reference transistors 504 and a reference loading block 508.
  • the sensor transistors 502 and the reference transistors 504 include MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) transistors.
  • MOSFET Metal-Oxide-Semiconductor Field Effect Transistor
  • the sensor transistors 502 and the reference transistors 504 may be of the same type.
  • the sensor transistors 502 and the reference transistors 504 include MOSFET transistors.
  • the sensor transistors 502 and the reference transistors 504 may have the same configuration.
  • the sensor transistors 502 and the reference transistors 504 include MOSFET transistors having a source follower configuration.
  • the various transistors could have some structural differences due to variations in the fabrication process. There could be structural differences between the sensor transistors 502 and the reference transistors 504. There could be structural differences between transistors in the sensor transistors 502. There could be structural differences between transistors in the reference transistors 504. Such structural difference could result in different properties, such as different capacitance. In some cases, there could be up to a 20 percent difference in the capacitance of two transistors. In some cases, there could be greater than a 20 percent difference in the capacitance of two transistors.
  • the apparatus 500 operates the transistors in the weak inversion region. Operating the transistors in the weak inversion region may make the transistors less sensitive to such structural and property variations, such that accuracy of the apparatus 500 is improved.
  • the sensor loading block 506 and the reference loading block 508 each include a resistor. These resistors may be substantially matched in resistance. However, the resistors are not required to have exactly the same resistance. For example, due to limitations of the fabrication process, the resistances could differ somewhat from each other. In one embodiment, the resistance values are within two percent of each other. In one embodiment, the resistance values are within five percent of each other. In one embodiment, the resistance values are within 10 percent of each other.
  • the signal at the differential sensor stage output 420 has both a DC component and an AC component.
  • the DC component may arise at least in part from the biasing circuit 408.
  • the AC component may arise due to the input signal.
  • the sensor loading block 506 has a capacitor in parallel with the aforementioned resistor.
  • the capacitor and resistor may form a filter.
  • the filter smooths the AC component, which may serve to stabilize the voltage at the differential sensor stage output 420.
  • the apparatus 500 provides temperature compensation.
  • the temperature compensation is provided in the reference loading block 508.
  • the temperature compensation is provided by a proportional to absolute temperature (PTAT) current source in the reference loading block 508.
  • PTAT proportional to absolute temperature
  • CTAT complimentary to absolute temperature
  • the PTAT or CTAT current source may help to keep the output signal at the differential output (between the outputs 420, 422) within a target range.
  • the current source can be tuned in the factory to target an output signal range of between 10 dB to 20 dB.
  • the current source can be tuned in the factory to target an output signal range of between 0 dB to 10 dB.
  • the PTAT current source in the reference loading block 508 helps to keep the output signal in the target range independent of operating temperature.
  • the CTAT current source in the sensor loading block 506 helps to keep the output signal in the target range independent of operating temperature.
  • each output 420, 422 is at the source terminal of a MOSFET transistor. By regulating the source terminal voltage, the gate to source voltage of the MOSFETs may be regulated. Thus, either technique helps to keep the transistors operating in the weak inversion region where they are less sensitive to process variation. Therefore, the accuracy of the apparatus 500 is improved.
  • FIG. 6 is a circuit schematic of one embodiment of a signal power detector.
  • the signal power detector 600 may be used to detect the power of an RF signal, but is not limited to RF signals.
  • the signal power detector 600 may be used in system 100, but is not limited to a communication system.
  • the signal power detector 600 is used in UE 1 10 (such as a wireless communication device).
  • the signal power detector 600 may be used on other devices such as RANs 120.
  • the signal power detector 600 includes a capacitor stage 402, a biasing circuit 408, sensor transistors 502, reference transistors 504, sensor loading block 506, and reference loading block 508. Together the sensor transistors 502 and the sensor loading block 506 are one embodiment of a differential sensor stage 404. Together the reference transistors 504 and the reference loading block 508 are one embodiment of a differential reference stage 406.
  • the capacitor stage 402 includes an FI-type capacitor bridge.
  • the capacitor stage 402 receives an input signal (V_sig+, V_sig-).
  • the input signal (V_sig+, V_sig- ) may be based on or otherwise derived from an RF signal.
  • an RF signal is converted to the input signal.
  • the input signal may be referred to herein as a voltage signal.
  • the input signal is derived from an RF signal generated by transmitter 202.
  • the input signal is derived from an RF signal received from antenna 210.
  • the signal power detector 600 detects a peak power level of an RF wireless signal based on detecting a peak voltage of V_sig+, V_sig-
  • the H-type capacitor bridge includes five capacitors in the described embodiment.
  • an ⁇ -type capacitor bridge is defined to include at least five capacitors in the configuration depicted in the capacitor stage 402 in FIG. 6.
  • the capacitors in an H-type capacitor bridge may be referred to as first input capacitor 602, second input capacitor 604, first output capacitor 606, second output capacitor 608, and H-capacitor 610.
  • the first input capacitor 602 has a first terminal configured to receive V_sig+.
  • the first input capacitor 602 has a second terminal connected to a first terminal of the first output capacitor 606 and to a first terminal of the H-capacitor 610.
  • the second input capacitor 604 has a first terminal configured to receive V_sig- .
  • the second input capacitor 604 has a second terminal connected to a first terminal of the second output capacitor 608 and to a second terminal of the H-capacitor 610.
  • the first output capacitor 606 has its first terminal connected to the first terminal of the H-capacitor 610.
  • the first output capacitor 606 has its second terminal connected to a gate terminal of transistor 612.
  • the second output capacitor 608 has its first terminal connected to the second terminal of the H-capacitor 610.
  • the second output capacitor 608 has its second terminal connected to a gate terminal of transistor 614. Therefore, the H-type capacitor bridge is configured to couple the input signal to the gates of transistors 612, 614. Note that the gates of transistors 612, 614 may serve as a signal input of the differential sensor stage 404. Thus, the H-type capacitor bridge is configured to couple the input signal to the signal input of the differential sensor stage 404.
  • the first input capacitor 602 and the second input capacitor 604 have substantially the same capacitance.
  • the first output capacitor 606 and the second output capacitor 608 have substantially the same capacitance.
  • two capacitors have substantially the same capacitance of their capacitances are withing two percent of each other. In one embodiment, two capacitors have substantially the same capacitance of their capacitances are withing five percent of each other. In one embodiment, two capacitors have substantially the same capacitance of their capacitances are withing ten percent of each other.
  • the ratio of the capacitance of the input capacitors 602, 604 to the capacitance of the output capacitors 606, 608 is selected in order to control how much of the input signal is coupled to the gates of the sensor transistors 502.
  • the capacitance of the H-capacitor 610 may range from about ten percent the capacitance as the input capacitors 602, 604 to being about the capacitance as the input capacitors 602, 604.
  • the capacitance of the H-capacitor 610 may range from about ten percent the capacitance as the output capacitors 606, 608 to being about the capacitance as the output capacitors 606, 608.
  • the H-capacitor 610 could have a larger or smaller amounts of capacitance than these examples.
  • the sensor transistors 502 include first sensor NMOS transistor 612 and second sensor NMOS transistor 614.
  • the sensor transistors 502 have a source follower configuration.
  • the reference transistors 504 include first reference NMOS transistor 616 and second reference NMOS transistor 618.
  • the reference transistors 504 have a source follower configuration. Note that the gates of the first sensor NMOS transistor 612 and the second sensor NMOS transistor 612 are one embodiment of the bias input 416 of the differential sensor stage 404. Similarly, the gates of the first reference NMOS transistor 616 and the second reference NMOS transistor 618 are one embodiment of the bias input 418 of the differential reference stage 406.
  • the bias circuit 408 has four bias resistors 622, 624, 626, 628.
  • Bias resistor 622 is connected to the gate of first sensor NMOS transistor 612 in order to provide a bias voltage (V_bias).
  • Bias resistor 624 is connected to the gate of second sensor NMOS transistor 614 in order to provide the bias voltage (V_ bias).
  • Bias resistor 626 is connected to the gate of first reference NMOS transistor 616 in order to provide the bias voltage (V_bias).
  • Bias resistor 628 is connected to the gate of second reference NMOS transistor 618 in order to provide the bias voltage (V_ bias).
  • the bias circuit 408 is configured to bias each of the transistors 612, 614, 616, and 618 in the weak inversion region.
  • the sensor loading block 506 includes a sensor load resistor 632 and a load capacitor 634.
  • the sensor load resistor 632 and the load capacitor 634 serve as a filter.
  • the filter may be used to smooth an AC signal component at output 420.
  • output 422 of does not have an AC signal component.
  • the voltage between output 420 and output 422 is indicative of the peak power of the input signal.
  • the sensor loading block 506 may be referred to as a passive loading block.
  • the reference loading block 508 includes a reference load resistor 636 and a PTAT current source 638.
  • the sensor load resistor 632 and the reference load resistor 636 are matched in resistance. There may be some difference in the resistances due to limitations of the process of fabricating the resistors.
  • the reference loading block 508 is configured to provide temperature compensation for the signal power detector 600.
  • the PTAT current source 638 may be configured to provide the temperature compensation.
  • the PTAT current source 638 is tuned such that the output signal at the differential output (between output 420 and output 422) is within a target range.
  • the PTAT current source helps to keep the output signal in the target range independent of operating temperature. Because the outputs are at the source terminals of the MOSFET transistors, the PTAT current source helps to keep the source voltage within a target range, even if the temperature varies. Therefore, the gate to source voltage of the MOSFET transistors may be regulated.
  • the PTAT current source may help to keep the MOS transistors operating in weak inversion where they are less sensitive to process variation. Therefore, the accuracy of the detector 600 is improved.
  • the reference loading block 508 may be referred to as an active loading block.
  • FIG. 7 is a circuit schematic of one embodiment of a signal power detector.
  • the signal power detector 700 may be used to detect the power of an RF signal, but is not limited to RF signals.
  • the signal power detector 700 may be used in system 100, but is not limited to a communication system.
  • the signal power detector 600 is used in UE 1 10 (such as a wireless communication device).
  • the signal power detector 600 may be used on other devices such as RANs 120.
  • the signal power detector 700 in FIG. 7 is similar to the signal power detector 700, but the sensor loading block 506 and reference loading block 508 are configured differently. Whereas temperature compensation is provided by the reference loading block 508 in the circuit of FIG. 6, temperature compensation is provided by the sensor loading block 506 in the circuit of FIG. 7.
  • the capacitor stage 402, biasing circuit 408, sensor transistors 502, and reference transistors 504 in signal power detector 700 are similar to those in signal power detector 600, as thus will not be described in detail.
  • the sensor loading block 506 includes a sensor load resistor 732, load capacitor 734, and CTAT current source 736.
  • the sensor load resistor 732 and the load capacitor 734 serve as a filter.
  • the filter may be used to smooth an AC signal component at output 420.
  • output 422 of does not have an AC signal component.
  • the voltage between output 420 and output 422 is indicative of the peak power of the input signal.
  • the sensor loading block 506 is configured to provide temperature compensation for the signal power detector 700.
  • the CTAT current source 736 may be configured to provide the temperature compensation.
  • the CTAT current source 736 is tuned such that the output signal at the differential output (between output 420 and output 422) is within a target range.
  • the CTAT current source helps to keep the output signal in the target range independent of operating temperature. Because the outputs are at the source terminals of the MOSFET transistors, the CTAT current source helps to keep the source voltage within a target range, even if the temperature varies. Therefore, the gate to source voltage of the MOSFET transistors may be regulated. Flence, the CTAT current source may help to keep the MOSFET transistors operating in weak inversion where they are less sensitive to process variation. Therefore, the accuracy of the signal power detector 700 is improved.
  • the passive loading block 508 may be referred to as an active loading block.
  • the reference loading block 508 includes a reference load resistor 738.
  • the sensor load resistor 732 and the reference load resistor 738 are matched in resistance. There may be some difference in the resistances due to limitations of the process of fabricating the resistors.
  • the reference loading block 508 may be referred to as a passive loading block.
  • FIG. 8 depicts a flowchart of one embodiment of a process 800 of detecting a strength of an input signal.
  • the input signal is an RF signal, or is a least based on an RF signal.
  • the process 800 may be practiced in apparatus 400, apparatus 500, signal power detector 600, signal power detector 700, but is not limited thereto.
  • the steps are described in a certain order as a matter of convenience of explanation. Some, or all, steps may occur at the same time.
  • Step 802 includes biasing a differential sensor stage 404.
  • Step 802 may include the biasing circuit 408 applying V_bias to the gates of MOSFET transistor 612 and MOSFET transistor 614.
  • Step 802 may also include applying Vdd to the drain terminals of MOSFET transistor 612 and MOSFET transistor 614.
  • Step 802 may also include grounding the sensor loading block 506.
  • Step 804 includes biasing a differential reference stage 406. In some embodiments, substantially the same bias conditions are applied to the differential sensor stage 404 and to the differential reference stage 406. In one embodiment, step 804 includes the biasing circuit 408 applying V_bias to the gates of MOSFET transistor 616 and MOSFET transistor 618. Step 804 may also include applying Vdd to the drain terminals of MOSFET transistor 616 and MOSFET transistor 618. Step 804 may also include grounding the reference loading block 508.
  • Step 806 includes coupling an input signal to the differential sensor using a capacitor stage 402.
  • the capacitor stage 402 includes an H-type capacitor bridge. The input signal could be generated by converting an RF signal to a voltage signal, where the voltage signal is proportional to the power of the RF signal as indicated in Equation 1 .
  • Step 808 includes accessing, at a differential output, a signal that is indicative of the strength of the input signal.
  • the differential output is formed by the output 420 of the differential sensor stage 404 and the output 422 of the differential reference stage 406.
  • the signal is indicative of the peak voltage level of the input signal.
  • the signal is indicative of the peak power level of the input signal. Note that given Equation 1 , the strength of the input signal may be correlated to another signal, such as the power of a wireless RF signal.
  • FIG. 9 depicts a flowchart of one embodiment of a process 900 of operating differential stages of a signal power detector in a weak inversion region.
  • Process 900 describes one embodiment for operating differential sensor stage 404 and differential reference stage 406 in a weak inversion region.
  • Process 900 describes further details for one embodiment of steps 802, 804, and 806 in process 800.
  • the input signal is an RF signal.
  • the process 900 may be practiced in apparatus 400, apparatus 500, signal power detector 600, signal power detector 700, but is not limited thereto.
  • the steps are described in a certain order as a matter of convenience of explanation. Some, or all, steps may occur at the same time.
  • Step 902 includes biasing a source follower configuration in a differential sensor stage 404 in a weak inversion region.
  • Step 904 includes biasing a source follower configuration in a differential reference stage 406 in a weak inversion region.
  • Steps 902 and 904 include applying a suitable bias voltage (V_bias) to the gates of the MOSFETs 612, 614, 616, and 618.
  • V_bias bias voltage
  • the magnitude of the bias voltage will depend on the threshold voltage of the MOSFETs.
  • the magnitude of the bias voltage may also depend on other factors such as the resistance of bias resistors 622, 624, 626, and 628, as well as load resistors 632, 636, 732, and/or 738.
  • Step 906 incudes coupling a voltage signal (e.g., V_sig+, V_sig-) to an input of a differential sensor stage 404 while keeping the differential sensor stage 404 in the weak inversion region.
  • a voltage signal e.g., V_sig+, V_sig-
  • the capacitor stage 402 is configured to keep the magnitude of the input signal that is coupled to the gates of the MOSFETs in the differential sensor stage 404 within a target range such that the MOSFETs in the differential sensor stage 404 are kept in the weak inversion region with the combination of the bias voltage and the coupled input voltage.
  • FIG. 10 depicts a flowchart of one embodiment of a process 1000 of providing temperature compensation in a signal power detector.
  • Process 1000 describes further details of one embodiment of process 800.
  • the input signal is an RF signal.
  • the process 1000 may be practiced in apparatus 400, apparatus 500, signal power detector 600, signal power detector 700, but is not limited thereto.
  • the steps are described in a certain order as a matter of convenience of explanation. Some, or all, steps may occur at the same time.
  • Step 1002 includes biasing a differential sensor stage 404 having sensor transistors 612, 614 and a sensor loading block 506.
  • Step 1004 includes biasing a differential reference stage 406 having reference transistors 616, 618 and a reference loading block 508.
  • Step 1006 includes coupling an input signal to the differential sensor using a capacitor stage 402.
  • the capacitor stage 402 includes an FI- type capacitor bridge.
  • Step 1008 includes providing temperature compensation using one of the loading blocks.
  • reference loading block 508 is used to provide the temperature compensation.
  • providing temperature compensation includes using a proportional to absolute temperature (PTAT) current source in the reference loading block 508.
  • PTAT proportional to absolute temperature
  • Providing temperature compensation using the reference loading block 508 may result in keeping the output signal at the differential output within a target range independent of temperature. This may help to keep the MOSFETs operating in the weak inversion region, which can improve accuracy of the signal detector.
  • sensor loading block 506 is used to provide the temperature compensation.
  • providing temperature compensation includes using a complimentary to absolute temperature (CTAT) current source in the sensor loading block 506.
  • CTAT complimentary to absolute temperature
  • Providing temperature compensation using the sensor loading block 506 may result in keeping the output signal at the differential output within a target range independent of temperature. This may help to keep the MOSFETs operating in the weak inversion region, which can improve accuracy of the signal detector.
  • Step 1010 includes accessing, at a differential output, a signal that is indicative of the strength of the input signal.
  • FIG. 1 1 depicts relationships between signal power and voltages of a MOSFETs in an embodiment of a signal power detector.
  • FIG. 1 1 pertains to one embodiment of the sensor MOSETs 612, 614.
  • Line 1 102 represents the DC gate voltage (Vg) of the MOSFET. This is the voltage that may arise due to biasing the MOSFET.
  • Line 1 106 represents the threshold voltage (Vth) of the MOSFET. Neither the DC gate voltage 1 102 nor the threshold voltage 1 106 depend on the signal power.
  • Curve 1 104 represents the source terminal voltage (Vs) of the MOSFET. Note that Vs increases as the signal power increases.
  • Curve 1 108 represents Vgs, which is given by the difference between line 1 102 and curve 1 104.
  • Vgs decreases. Note that for any power, Vgs is below Vth, which indicates that the MOSFET is in the weak inversion region. Also note that as the power increases, Vgs decreases, which provides some room for an AC signal at the gate of the MOSFET due to the input signal being coupled to the gate. However, even with the input signal being coupled to the gate of the MOSFET, the MOSFET can still be operated in the weak inversion region.
  • FIG. 12 depicts a flowchart of one embodiment of a process 1200 of adjusting the sensitivity of an RF receiver based on a detected power level of an RF signal received by the RF receiver.
  • the process 1200 may be implemented in a UE 1 10, but is not limited thereto.
  • Step 1202 includes receiving an RF signal at a wireless communication device (e.g., UE 1 10).
  • the received RF signal may be a wireless RF signal.
  • antenna 210 may be used to access a wireless RF signal, which is processed by receiver 204.
  • Step 1204 includes sampling the RF signal and converting the RF signal to a voltage signal.
  • the strength of the voltage signal has a magnitude that is proportional to the power of the wireless RF signal.
  • a directional coupler is used to sample the RF signal. The directional coupler may also convert the RF signal to a voltage signal.
  • process 1200 describes a technique in which the power of the wireless RF signal is not measured directly. Instead, the strength of the voltage signal is measured, wherein the power of the wireless RF signal may be determined from the strength of the voltage signal.
  • Step 1206 includes providing the voltage signal to an input of an RF power detector.
  • the voltage signal may be the input signal to apparatus 400 or apparatus 500.
  • the voltage signal (V_sig+, V_sig-) may be input to signal power detector 600 or signal strength detector 700.
  • Step 1208 includes detecting the strength of the voltage signal. Because the voltage signal is proportional to the power of the wireless RF signal, step 1208 indirectly determines the power of the wireless RF signal. As has been discussed above, the voltage at the differential output (420, 422) may be indicative of the strength of the input signal. Step 1208 may be based on the voltage at the differential output (420, 422). This voltage (e.g., DC voltage) may be used to determine a strength (e.g., voltage or power) of the input signal (e.g., V_sig+, V_sig-). In some embodiments, the strength of V_sig+, V_sig- is used to determine a power level of a wireless RF signal received by the wireless communication device.
  • a strength e.g., voltage or power
  • the strength of V_sig+, V_sig- is used to determine a power level of a wireless RF signal received by the wireless communication device.
  • Step 1210 includes determining whether to adjust a sensitivity of the RF receiver 204. This is based on the detected strength of the voltage signal. Step 1210 may include a determination of whether the strength is outside of a window. The window may correspond to a range of power levels for the wireless RF signal that are acceptable. If the sensitivity is to adjusted, then control passes to step 1212. Step 1212 includes a adjusting a sensitivity of an RF receiver 204. After adjusting the sensitivity, the process 1200 may repeat such that adjustments may be made on an on-going basis. In the event that it is determined in step 1210 to not make any adjustments, the process 1200 may repeat such that adjustments may be made in the event that the RF signal strength changes.
  • One embodiment includes an apparatus that adjusts the gain of an RF transmitter based on a detected power level of an RF signal transmitted by the apparatus.
  • the apparatus could be a wireless communication device, such as a cellular telephone, but is not limited thereto.
  • FIG. 13 depicts a flowchart of one embodiment of a process 1300 of adjusting the gain of an RF transmitter based on a detected power level of an RF signal transmitted by the RF transmitter.
  • the process 1300 may be implemented in a UE 1 10, but is not limited thereto.
  • Step 1302 includes accessing an RF signal that is transmitted by a wireless communication device (e.g., UE 1 10).
  • a wireless communication device e.g., UE 1 10
  • transmitter 202 may be used to generate an RF signal, which is then transmitted by the antenna 210.
  • the RF signal may be accessed prior to wireless transmission.
  • a directional coupler may be used to sample the RF signal prior to wireless transmission by antenna 210.
  • Step 1304 includes converting the accessed RF signal to a voltage signal.
  • the voltage signal has a magnitude that is proportional to the power of the transmitted wireless RF signal.
  • process 1300 describes a technique in which the power of the wireless RF signal is not measured directly. Instead, the strength of the voltage signal is measured.
  • Step 1306 includes providing the voltage signal to an input of an RF power detector.
  • the voltage signal may be input signal to apparatus 400, apparatus 500, signal power detector 600, or signal strength detector 700.
  • Step 1308 includes detecting the strength of the voltage signal. Step 1308 may indirectly determine the power of the transmitted wireless RF signal. As has been discussed above, the voltage at the differential output (420, 422) may be indicative of the strength of the input signal.
  • Step 1310 includes determining whether to adjust a gain of the RF transmitter 202. This is based on the detected strength of the voltage signal.
  • Step 1308 may include a determination of whether the detected strength of the voltage signal is outside of a window that corresponds to an acceptable range of power for the transmitted RF signal.
  • the window refers to a range of power levels for the transmitted RF signal that are acceptable. For example, there may be regulations that limit the power level of a transmitted RF signal.
  • the transmitted RF signal should be strong enough to be adequately received by the target of the RF transmission. In effect, the gain of the RF transmitter may thus be adjusted based on the power of the transmitted RF signal.
  • Step 1312 includes adjusting a gain of an RF transmitter 202.
  • the process 1300 may repeat, such that adjustments may be made on an on-going basis.
  • the process 1300 may repeat such that adjustments may be made in the event that the transmitted RF signal strength changes. For example, operating conditions such as temperature may impact the gain of the RF transmitter.
  • the window in step 1310 could change. For example, it may be desirable to increase the gain to transmit a stronger RF signal in the event that the target is having trouble receiving the RF signal.
  • the technology described herein can be implemented using hardware, software, or a combination of both hardware and software.
  • the software used is stored on one or more of the processor readable storage devices described above to program one or more of the processors to perform the functions described herein.
  • the processor readable storage devices can include computer readable media such as volatile and non-volatile media, removable and non-removable media.
  • computer readable media may comprise computer readable storage media and communication media.
  • Computer readable storage media may be implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data.
  • Examples of computer readable storage media include RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer.
  • a computer readable medium or media does (do) not include propagated, modulated or transitory signals.
  • Communication media typically embodies computer readable instructions, data structures, program modules or other data in a propagated, modulated or transitory data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
  • modulated data signal means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal.
  • communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as RF and other wireless media. Combinations of any of the above are also included within the scope of computer readable media.
  • some or all of the software can be replaced by dedicated hardware logic components.
  • illustrative types of hardware logic components include Field-programmable Gate Arrays (FPGAs), Application-specific Integrated Circuits (ASICs), Application-specific Standard Products (ASSPs), System-on-a-chip systems (SOCs), Complex Programmable Logic Devices (CPLDs), special purpose computers, etc.
  • FPGAs Field-programmable Gate Arrays
  • ASICs Application-specific Integrated Circuits
  • ASSPs Application-specific Standard Products
  • SOCs System-on-a-chip systems
  • CPLDs Complex Programmable Logic Devices
  • special purpose computers etc.
  • software stored on a storage device
  • the one or more processors can be in communication with one or more computer readable media/ storage devices, peripherals and/or communication interfaces.
  • each process associated with the disclosed technology may be performed continuously and by one or more computing devices.
  • Each step in a process may be performed by the same or different computing devices as those used in other steps, and each step need not necessarily be performed by a single computing device.

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Abstract

L'invention concerne une technologie pour détecter l'intensité de signaux. L'invention concerne un appareil de détection de l'intensité de signaux. L'appareil comprend un étage de capteur différentiel ayant une entrée et une sortie, un étage de référence différentiel ayant une entrée et une sortie, un étage de condensateur configuré pour coupler un signal d'entrée à l'entrée de l'étage de capteur différentiel, un circuit de polarisation configuré pour polariser l'étage de capteur différentiel et l'étage de référence différentiel. L'appareil a une sortie différentielle entre la sortie de l'étage de capteur différentiel et la sortie de l'étage de référence différentiel. La sortie différentielle est configurée pour fournir un signal indicatif de l'intensité du signal d'entrée.
PCT/US2020/026147 2020-03-04 2020-04-01 Détecteur d'intensité de signaux Ceased WO2020172688A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202080097753.2A CN115211032A (zh) 2020-03-04 2020-04-01 信号强度检测器

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202062985197P 2020-03-04 2020-03-04
US62/985,197 2020-03-04

Publications (2)

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WO2020172688A2 true WO2020172688A2 (fr) 2020-08-27
WO2020172688A3 WO2020172688A3 (fr) 2020-12-17

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WO2004040795A2 (fr) * 2002-10-30 2004-05-13 Advanced Micro Devices, Inc. Detecteur de niveau de signal rf integre applicable a la commande de niveau de puissance automatique
CN101666833B (zh) * 2009-09-28 2012-08-15 王树甫 Cmos差分射频信号幅度检测电路
US20120083205A1 (en) * 2010-10-04 2012-04-05 Qualcomm Incorporated Nfc device having a differential input envelope detector
US10627430B2 (en) * 2016-05-24 2020-04-21 Texas Instruments Incorporated Fast current-based envelope detector
US10230336B2 (en) * 2016-11-22 2019-03-12 Infineon Technologies Ag RF power detector circuits

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