WO2020200458A1 - Dispositif d'antenne et son procédé de fabrication - Google Patents

Dispositif d'antenne et son procédé de fabrication Download PDF

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Publication number
WO2020200458A1
WO2020200458A1 PCT/EP2019/058528 EP2019058528W WO2020200458A1 WO 2020200458 A1 WO2020200458 A1 WO 2020200458A1 EP 2019058528 W EP2019058528 W EP 2019058528W WO 2020200458 A1 WO2020200458 A1 WO 2020200458A1
Authority
WO
WIPO (PCT)
Prior art keywords
rfic
aob
layer
antenna
pcb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2019/058528
Other languages
English (en)
Inventor
Ezio Perrone
Stefan Martens
Chih I LIN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to PCT/EP2019/058528 priority Critical patent/WO2020200458A1/fr
Publication of WO2020200458A1 publication Critical patent/WO2020200458A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/0006—Particular feeding systems
    • H01Q21/0025—Modular arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
    • H01Q21/061—Two dimensional planar arrays

Definitions

  • the present invention relates to the field of antennas, in particular to Antenna-on-Board (AoB) technology.
  • the invention proposes a radio frequency integrated circuit (RFIC) device for an AoB device.
  • the invention also proposes the AoB device including an antenna layer and a RFIC layer with at least one RFIC device arranged below the antenna layer.
  • RFIC radio frequency integrated circuit
  • the AoB technology also called Antenna-in-Package (AiP) technology, combines antennas with radio dies into a surface mounted device. It represents an innovative and important development in the miniaturization of wireless communications systems in the recent years. Radio dies are particularly RFIC dies, including transceiver and receiver chips.
  • the AoB technology has been proposed for different radio communication bands, e.g. the Ka- Band (28 GHz to 40 GHz) or the V-Band (60 GHz), as well as for gesture radars. It can provide effective antenna solutions to 5G and beyond, operating in the millimeter-wave bands and above.
  • the AoB technology adoption in 5G requires scalability to a high number of radio dies and antennas, a high level of integration between radio die and antennas in the AoB, as well as between the AoB and a system Printed Circuit Board (PCB). Further, high reliability and low cost are needed.
  • embodiments of the present invention aim to provide an improved RFIC device and AoB device.
  • an objective is to provide a simpler and better integration of the RFIC device with high performance electrical and thermal connections.
  • the RFIC device and AoB device should also allow better scalability, and better thermal and electrical performance.
  • a first aspect of the invention provides a RFIC device, comprising: a RFIC die, one or more connection elements provided on each of a top side and a bottom side of the RFIC die, and at least one vertical connection element through the RFIC die connecting the bottom side and the top side.
  • the top side is defined by a two dimensional plane in x-direction and y-direction.
  • the bottom side is opposite to the top side.
  • the RFIC die has the vertical connections, particularly, in order to be able to route signals from a system PCB to an AoB antenna of an AoB device.
  • the connections elements e.g. thermal connections and/or electrical connections, are beneficially arranged on the top and bottom sides of the vertical RFIC device.
  • one or more top side connection elements are attachable and electrically connectable to an antenna layer of the AoB device.
  • connection elements on the top side may be physically attached to, and electrically connected to the antenna layer.
  • one or more bottom side connection elements are attachable and electrically connectable to a system PCB of the AoB device, particularly with high frequency interconnects and thermal heat dissipation paths.
  • the thermal connections on the bottom side can be soldered, or in some other way attached, to a system PCB. These thermal connections allow a good heat dissipation performance of the RFIC device.
  • a second aspect of the invention provides an AoB device, comprising: an antenna layer comprising at least one antenna element, and a RFIC layer arranged below the antenna layer and comprising at least one RFIC device attached to and electrically connected to the antenna layer.
  • the AoB device is accordingly proposed with vertical partitioning into different functionalities, i.e. RFIC layer and antenna layer. This allows for a simpler better integration of the RFIC device(s) and the system board and antenna board. Also, the scalability is facilitated, while providing improved thermal and electrical performance.
  • the RFIC device is an RFIC device according to the first aspect or any implementation form of the first aspect.
  • the RFIC device with the vertical connections may be attached to the antenna layer of the AoB device. This allows high frequency interconnects and thermal connections to the system PCB, thus improving electrical and thermal performance.
  • a RFIC die of the RFIC device is configured to route signals from a system PCB of the AoB device, which is arranged below the RFIC device, to the antenna layer of the AoB device.
  • the AoB device further comprises at least one vertical connection element from the system PCB to the antenna layer of the AoB device.
  • the RFIC die is a bare-die with bonding wires, solder bumps or flip-chip interconnections connected to the antenna layer, and with through vias or hot vias connected to the system PCB.
  • the RFIC die can be mounted to the antenna layer in different ways.
  • the hot vias allow wave propagation from the system PCB to the RFIC die, and vice versa.
  • the through vias allow a better thermal performance.
  • the RFIC die is a lead frame or a laminate PCB based land grid array (LGA) package.
  • the RFIC die itself may be a molded plastic package with though mold vias for the vertical connections.
  • the RFIC layer further comprises a PCB layer comprising one or more RFIC PCBs.
  • An additional RFIC PCB may exist in the AoB device.
  • the PCB layer further comprises at least one molded cavity
  • the RFIC device is arranged inside of the cavity and is connected to the PCB layer with solder bumps or flip-chip interconnections.
  • the PCB layer may comprise a number of molded cavities. Inside each cavity, one or more RFIC devices may be embedded. It should be noted that a RFIC device is electrically connected to the PCB layer.
  • the PCB layer further comprises a through- mold- via or a via in the PCB layer, for connecting the system PCB and the antenna layer.
  • Additional vertical connections may be further provided, either by through-mold- via or via in the cavity PCB.
  • the cavity is molded from a laser activatable material.
  • the mold cavity itself can be made from a laser activatable material, for example a commercial laser activatable material.
  • the RFIC device is embedded into the RFIC layer.
  • the RFIC device can be embedded into the RFIC layer by an embedding technology.
  • the RFIC layer is electrically connected to the antenna layer through soldering, conductive glue or a special spacer glue.
  • soldering conductive glue
  • a special spacer glue There are different kinds of electrical interconnects between the RFIC device and the antenna layer.
  • FIG. 1 shows a RFIC device according to an embodiment of the invention.
  • FIG. 2 shows an antenna device (AoB device) according to an embodiment of the invention.
  • FIG. 3 shows an antenna device according to an embodiment of the invention.
  • FIG. 4 shows an antenna device according to an embodiment of the invention.
  • FIG. 5 shows an antenna device according to an embodiment of the invention.
  • FIG. 6 shows an antenna device according to an embodiment of the invention.
  • FIG. 7 shows an antenna device according to an embodiment of the invention. DETAILED DESCRIPTION OF EMBODIMENTS
  • FIG. 1 shows a RFIC device 100 according to an embodiment of the invention.
  • the RFIC device 100 comprises a RFIC die 101, e.g. a transceiver/receiver chip. Further, the RFIC device 100 comprises one or more connection elements 102 provided on each of a top side and a bottom side of the RFIC die. In addition, the RFIC device 100 comprises at least one vertical connection element 103 through the RFIC die 101 connecting the bottom side and the top side.
  • the RFIC device 100 may be connected to an antenna element, e.g. an antenna layer
  • top side connection elements 102 are attachable and electrically connectable to the antenna layer 201 of the AoB device 200.
  • the RFIC device 100 may also be connected to a system board, e.g. a system PCB
  • one or more bottom side connection elements 102 are attachable and electrically connectable to the system PCB 202 of the AoB device 200, particularly with high frequency interconnects and thermal heat dissipation paths.
  • Signals may be routed from the system PCB 202 of the AoB device 200, to the antenna layer 201, particularly through the vertical connection element 103 in the RFIC device 100.
  • FIG. 2 - FIG. 7 show antenna devices, i.e. AoB devices 200, according to embodiments of the invention.
  • AoB devices 200 include each a RFIC device 100 according to an embodiment of the invention, as shown e.g. in FIG. 1. Same elements in the figures are labelled with the same reference signs and function likewise.
  • FIG. 2 shows an AoB device 200 comprising an antenna layer 201 comprising at least one antenna element.
  • the AoB device 200 further comprises a RFIC layer 203 arranged below the antenna layer 201, and comprises at least one RFIC device 100 attached to and electrically connected to the antenna layer 201.
  • the at least one RFIC device 100 is the RFIC device shown in FIG. 1.
  • FIG. 3 shows an AoB device 200 based on FIG. 2, further comprising a system PCB 202 arranged below the RFIC layer 203.
  • the RFIC die 101 of the RFIC device 100 is configured to route signals from the system PCB 202 of the AoB device 200, which is arranged below the RFIC device 100, to the antenna layer 201 of the AoB device 200.
  • FIG. 4 shows an AoB device 200 according to an embodiment of the invention.
  • the AoB device 200 may comprise a RFIC layer 203 including more than one RFIC device 100, e.g. 4 RFIC devices 100.
  • the number of the RFIC devices 100 that may be included in the RFIC layer 203 may be up to 1024 or even 2048.
  • Each RFIC device 100 may thereby be a RFIC device 100 as shown in FIG. 1. Possibly, at least one of the more than one RFIC device 100 may, however, not be the exact the same RFIC device 100.
  • the RFIC device 100 in the RFIC layer 203 may have different designs to fulfill the different functionality requirements.
  • the antenna layer 201 of the AoB device 200 may also comprise a plurality of antenna elements/radiating elements.
  • a size of a single antenna element may depend on an applied frequency and a chosen antenna configuration.
  • a dimension of the AoB device 200 can vary significantly, depending on amounts of antenna elements and/or on a number of RFIC devices 100. Therefore, a size of an overall AoB device 200 is scalable very well.
  • FIG. 5 shows an AoB device 200 according to an embodiment of the invention.
  • the AoB device 200 comprises a RFIC layer 203 including one RFIC device 100.
  • the RFIC device 100 is arranged below an antenna layer 201 of the AoB device 200, and above a system PCB 202 of the AoB device 200.
  • RF signal inputs and control signals to the RFIC die 101 can be arranged on the bottom side of the RFIC device 100 together with the thermal connections, for instance, the connection elements 102 on the bottom side of the RFIC device 100. These inputs connect the system PCB 202 and the RFIC device 100.
  • FIG. 5 can be complemented with at least one vertical connection 204 through the RFIC die 101, as shown in FIG. 6.
  • FIG. 6 shows an AoB device 200 according to an embodiment of the invention.
  • the AoB device 200 as shown in FIG. 6, is similar to the AoB device 200, as shown in FIG. 5, with additional at least one vertical connection 204.
  • the at least one vertical connection 204 will provide additional connections from the system PCB 202 to the antenna layer 201 of the AoB device 200.
  • the RFIC die 101 in all embodiments of the RFID device 100 and AoB device 200 may be a so-called bare-die with bonding wires, solder bumps or flip-chip interconnections (e.g. Cu Pillar flip-chip interconnections) connected to the antenna layer 201. That means, the RFIC die 101 can be mounted to the antennal layer 201 in many different ways. Though vias or hot vias may be used for the connections from the RFIC die 101 to the system PCB 202. The hot vias allow wave propagation from the system PCB 202 to the RFIC die 101 and vice versa. The through vias result in a better thermal performance.
  • the RFIC die 101 can also be a lead frame or laminate PCB based LGA package, which means that the RFIC die 101 itself may be a molded plastic package with, for instance, through mold vias for the vertical connections.
  • the RFIC die 101 may be located in a PCB cavity 2032 as shown in FIG. 7.
  • FIG. 7 shows another AoB device 200 according to an embodiment of the invention.
  • the RFIC layer 203 may further comprise a PCB layer 2031 comprising one or more RFIC PCBs.
  • the PCB layer 2031 may comprise at least one cavity 2032 and the cavity 2032 may be overmolded or filled with a suitable material, e.g. a resin material.
  • the RFIC device 100 may be arranged inside of the cavity, as shown in FIG. 7.
  • the RFIC device 100 may be connected to the PCB layer 2031 with solder bumps or flip-chip interconnections, for example, the connections may be arranged on the top side of the RFIC device 100. For instance, in each cavity 2032, there may be only one RFIC device 100 arranged. Alternatively, multiple RFIC devices 100 may also be arranged in the same cavity 2032.
  • the PCB layer 2031 may further comprise a through-mold- via or a via 2033 in the PCB layer 2031, for connecting the system PCB 202 and the antenna layer 201.
  • the cavity 2032 may be molded from a laser- activatable material. This also allows forming a laser direct structuring (LDS) heat spreader arranged beneath the RFID die 101, by which the RFID device 100 can be soldered to the system PCB 202.
  • LDS laser direct structuring
  • SMT surface-mount technology
  • the LDS heat spreader can be soldered to the system PCB 202 in the same SMT process which is used to connect the RFIC device 100 to the system PCB 202. This efficiently simplifies a manufacturing process of the AoB device 200.
  • the RFIC die 101 can be embedded into the RFIC device 100, e.g. by an embedding technology. Further, the RFIC device 100 may contain more than 1 RFIC die 101. That means that the RFIC device 100 may be larger and may be able to provide signals to more antenna elements.
  • the RFIC layer 203 may be electrically connected to the antenna layer 201 through different kind of electrical interconnects. For instance, soldering, conductive glue or a special spacer glue to reduce the tolerances in z-direction to a minimum value may be used.
  • the embodiments of the present invention provide a simple integration solution of radio dies.
  • a solution of vertical partitioning in z direction in combination with vertical RFIC dies is proposed.
  • the RFIC die has vertical connections to route the signals from the system PCB to the antenna layer.
  • the thermal connections on the bottom side of the vertical RFIC can be soldered or in other way attached to the system PCB. Therefore, it allows AoB devices with vertical partitioning into different functionalities.
  • RFIC devices with high- frequency interconnects and thermal connections to the system PCB are designed.
  • the RFIC device itself comprises vertical connections as well. In this way, the RFIC is accessible from bottom and top side.

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  • Details Of Aerials (AREA)

Abstract

La présente invention concerne un dispositif RFIC et un dispositif d'antenne. Le dispositif RFIC comprend une puce RFIC, un ou plusieurs éléments de connexion (102) disposés sur chacun d'un côté supérieur et d'un côté inférieur de la puce RFIC, et comprend au moins un élément de connexion vertical à travers la puce RFIC reliant le côté inférieur et le côté supérieur. Le dispositif d'antenne peut comprendre une couche d'antenne, une couche RFIC disposée sous la couche d'antenne (201), la couche RFIC comprenant au moins un dispositif RFIC fixé à la couche d'antenne et électriquement connecté à celle-ci.
PCT/EP2019/058528 2019-04-04 2019-04-04 Dispositif d'antenne et son procédé de fabrication Ceased WO2020200458A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/EP2019/058528 WO2020200458A1 (fr) 2019-04-04 2019-04-04 Dispositif d'antenne et son procédé de fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2019/058528 WO2020200458A1 (fr) 2019-04-04 2019-04-04 Dispositif d'antenne et son procédé de fabrication

Publications (1)

Publication Number Publication Date
WO2020200458A1 true WO2020200458A1 (fr) 2020-10-08

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Country Status (1)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025115920A1 (fr) * 2023-11-27 2025-06-05 株式会社村田製作所 Module d'antenne, et procédé de fabrication de celui-ci

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160043471A1 (en) * 2012-12-20 2016-02-11 Intel Corporation Package structures including discrete antennas assembled on a device
WO2017222471A1 (fr) * 2016-06-24 2017-12-28 Agency For Science, Technology And Research Boîtier de semi-conducteur et son procédé de formation
US20180358685A1 (en) * 2017-06-07 2018-12-13 Mediatek Inc. Semiconductor package having discrete antenna device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160043471A1 (en) * 2012-12-20 2016-02-11 Intel Corporation Package structures including discrete antennas assembled on a device
WO2017222471A1 (fr) * 2016-06-24 2017-12-28 Agency For Science, Technology And Research Boîtier de semi-conducteur et son procédé de formation
US20180358685A1 (en) * 2017-06-07 2018-12-13 Mediatek Inc. Semiconductor package having discrete antenna device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025115920A1 (fr) * 2023-11-27 2025-06-05 株式会社村田製作所 Module d'antenne, et procédé de fabrication de celui-ci

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