WO2021025086A1 - SiC基板の製造方法 - Google Patents
SiC基板の製造方法 Download PDFInfo
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- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
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Definitions
- the present invention relates to a method for manufacturing a SiC substrate.
- SiC silicon carbide
- GaAs gallium arsenide
- a SiC substrate (SiC wafer) is manufactured by forming a SiC ingot in which single crystal SiC is crystal-grown on a seed crystal substrate by a sublimation method or the like and slicing it.
- Patent Document 1 describes a technique for manufacturing SiC wafers one by one by growing an epitaxial layer and a SiC substrate on a seed crystal substrate and removing them from the seed crystal substrate.
- Patent Document 1 it is necessary to perform CMP polishing on the growth surface of the seed crystal substrate every time one SiC substrate is manufactured. Therefore, there is a problem that the cost (cost) of CMP polishing increases.
- the SiC substrate described in Patent Document 1 is grown by using a solution method, a high temperature CVD method, or a sublimation method.
- a solution method a high temperature CVD method
- a sublimation method a problem that it is difficult to increase the diameter and the defect density is high.
- An object of the present invention is to provide a method for manufacturing a novel SiC substrate. Another object of the present invention is to provide a method for manufacturing a SiC substrate capable of manufacturing a large-diameter SiC substrate.
- the present invention that solves the above problems includes an etching process for etching a SiC original substrate and A crystal growth step of growing a SiC substrate layer on the SiC original substrate to obtain a SiC substrate, A peeling step of peeling a part of the SiC substrate body to obtain a SiC substrate is included.
- the etching step and the crystal growth step are steps in which the SiC raw substrate and the SiC material are arranged so as to face each other and heated so that a temperature gradient is formed between the SiC raw substrate and the SiC material. This is a method for manufacturing a SiC substrate.
- the SiC substrate can be manufactured without performing CMP polishing. Further, in the etching step and the crystal growth step, the SiC raw substrate can be heat-treated in the same environment (equipment system). Therefore, the processing alteration layer can be removed and the SiC substrate layer can be crystal-grown with one device system, and it is not necessary to introduce a plurality of devices, so that the cost can be significantly reduced. Furthermore, the life of the SiC material of the present invention can be extended by including the etching step and the crystal growth step.
- the etching step and the crystal growth step are steps of heating the SiC raw substrate and the SiC material in an atmosphere containing Si element and C element. As described above, since the etching step and the crystal growth step are steps of heating in an atmosphere containing Si element and C element, a higher quality SiC substrate can be produced.
- the etching step and the crystal growth step are steps of heating the SiC raw substrate and the SiC material in a semi-closed space. As described above, since the etching step and the crystal growth step are steps of heating in the semi-closed space, a higher quality SiC substrate can be manufactured.
- the etching step and the crystal growth step are steps of arranging and heating the SiC raw substrate in a main body container containing the SiC material.
- the etching step and the crystal growth step can easily form a semi-closed space having an atmosphere containing Si element and C element by using the main body container containing the SiC material.
- the etching step is a step of arranging the SiC original substrate and the SiC material so as to face each other and heating the SiC original substrate so as to be on the high temperature side and the SiC material on the low temperature side. .. Further, in a preferred embodiment of the present invention, in the etching step, the SiC original substrate and the SiC material are arranged relative to each other in a semi-closed space having an atomic number ratio Si / C of more than 1, and the SiC original substrate is formed. The step of heating so that the SiC material is on the high temperature side and the low temperature side is included.
- the SiC original substrate By etching the SiC original substrate using the temperature gradient as a driving force in this way, it is possible to remove or reduce the work-altered layer and macrostep bunching, and to manufacture a higher quality SiC substrate. Further, since the surface of the SiC original substrate is etched by providing the temperature gradient between the SiC original substrate and the SiC material in this way, the in-plane temperature distribution of the SiC original substrate differs greatly depending on the position. Can be suppressed. Therefore, it is possible to manufacture a high-quality and large-diameter (6 inches or more, further 8 inches or more) substrate.
- the crystal growth step is a step of arranging the SiC raw substrate and the SiC material so as to face each other and heating the SiC raw substrate so as to be on the low temperature side and the SiC material on the high temperature side. is there.
- the SiC original substrate and the SiC material are arranged relative to each other in a semi-closed space having an atomic number ratio of Si / C of more than 1, and the SiC original substrate is arranged. Includes a step of heating so that the temperature is on the low temperature side and the SiC material is on the high temperature side.
- the SiC original substrate and the SiC material are arranged relative to each other in a semi-closed space having an atomic number ratio of Si / C of 1 or less, and the SiC original substrate is arranged.
- the SiC substrate layer is grown by providing the temperature gradient between the SiC original substrate and the SiC material in this way, the in-plane temperature distribution of the SiC original substrate differs greatly depending on the position. It can be suppressed. Therefore, it is possible to manufacture a high-quality and large-diameter (6 inches or more, further 8 inches or more) substrate.
- the peeling step includes a laser irradiation step of introducing a damage layer into the SiC substrate body and a separation step of separating the damage layer as a starting point.
- the material loss can be reduced by including the laser irradiation step and the separation step. Therefore, there is no limitation on the thickness of the SiC substrate, and it is not necessary to form the SiC substrate thick.
- a peeling step of peeling the portion is further included.
- etching step of etching the peeled SiC substrate layer there are an etching step of etching the peeled SiC substrate layer, a crystal growth step of growing another SiC substrate layer on the SiC substrate layer to obtain a SiC substrate, and the SiC substrate. Further includes a peeling step of peeling a part of the above.
- the present invention it is possible to provide a new method for manufacturing a SiC substrate. Further, according to the present invention, it is possible to provide a method for manufacturing a SiC substrate capable of manufacturing a large-diameter SiC substrate.
- the present invention is a method of manufacturing a new SiC substrate 30 from the SiC original substrate 10, as shown in FIGS. 1 and 2, and includes an etching step S10 for removing the work-altered layer 12 of the SiC original substrate 10 by etching. , A crystal growth step S20 in which the SiC substrate layer 13 is grown on the SiC original substrate 10 to obtain the SiC substrate body 20, and a peeling step S30 in which a part of the SiC substrate body 20 is peeled off to obtain the SiC substrate 30. Including.
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other, and a temperature gradient is formed between the SiC raw substrate 10 and the SiC material 40. It is a process of heating. By heating in this way, the processing alteration layer 12 can be removed in the etching step S10, and the SiC substrate layer 13 can be grown in the crystal growth step S20.
- each step of the present invention will be described in detail.
- the SiC raw substrate 10 and the SiC material 40 are arranged and heated so as to face each other, so that the raw materials (Si element, C element and dopant) are transferred from the SiC raw substrate 10 to the SiC material 40. ) Is transported and the surface of the SiC original substrate 10 is etched.
- the SiC original substrate 10 and the SiC material 40 are arranged in a semi-closed space and heated.
- This semi-closed space can be formed, for example, by accommodating it in the main body container 50 described later.
- the term "quasi-closed space” as used herein refers to a space in which the inside of the container can be evacuated, but at least a part of the vapor generated in the container can be confined.
- SiC original substrate As the SiC original substrate 10, a plate-shaped single crystal SiC can be exemplified. Specifically, a SiC wafer or the like sliced into a disk shape from a SiC ingot produced by a sublimation method or the like can be exemplified. As the crystal polymorphism of single crystal SiC, any polymorphism can be adopted. It is also possible to use the SiC substrate 30 manufactured by the method for manufacturing a SiC substrate according to the present invention as a SiC original substrate.
- the SiC original substrate 10 that has undergone mechanical processing (for example, slicing, grinding / polishing) or laser processing has a processing alteration layer 12 in which processing damage such as scratches, latent scratches, and distortions has been introduced, and such processing. It has a bulk layer 11 to which no damage has been introduced (see FIG. 2).
- the presence or absence and depth of the processed altered layer 12 can be confirmed by the SEM-EBSD method, TEM, ⁇ XRD, Raman spectroscopy, or the like.
- This step-terrace structure is confirmed on the surfaces of the SiC original substrate 10 and the SiC substrate 30 flattened at the atomic level.
- This step-terrace structure is a staircase structure in which steps, which are stepped portions of one or more molecular layers, and terraces, which are flat portions with exposed ⁇ 0001 ⁇ surfaces, are alternately arranged.
- one molecular layer (0.25 nm) is the minimum height (minimum unit), and various step heights are formed by overlapping a plurality of the single molecular layers.
- a step that is bundled (bunching) and becomes huge and has a height exceeding one unit cell of each polytype is called a macro step bunching (MSB).
- the MSB refers to a step of bunching beyond 4 molecular layers (5 or more molecular layers). Further, in the case of 6H-SiC, it refers to a step of bunching beyond 6 molecular layers (7 or more molecular layers).
- this MSB is not formed on the surface of the SiC original substrate 10 because defects caused by the MSB may occur when the crystal is grown.
- the dopant may be any element that is generally doped into the SiC substrate. Specifically, nitrogen (N), phosphorus (P), aluminum (Al), boron (B) and the like are preferable.
- the doping concentration of the SiC raw substrate 10 is preferably higher than 1 ⁇ 10 17 cm -3 , more preferably 1 ⁇ 10 18 cm -3 or more, and further preferably 1 ⁇ 10 19 cm -3 or more. is there.
- the SiC material 40 is composed of SiC capable of supplying the SiC element, the C element, and the dopant to the SiC original substrate 10 by heating it relative to the SiC original substrate 10.
- a container made of SiC (main body container 50) and a substrate made of SiC are included.
- the SiC material 40 is formed of the SiC material 40, or the SiC substrate to be the SiC material 40 is formed.
- the SiC material 40 is preferably single crystal SiC or polycrystalline SiC.
- any polymorphic type can be adopted.
- the same elements as the SiC original substrate 10 can be adopted. Specifically, nitrogen (N), phosphorus (P), aluminum (Al), boron (B) and the like are preferable.
- the doping concentration of the SiC material 40 may be set to the doping concentration of the SiC substrate 30 to be manufactured.
- the doping concentration of the SiC material 40 is preferably higher than 1 ⁇ 10 17 cm -3 , and more preferably 1 ⁇ 10 18 cm -3. The above can be adopted, and more preferably 1 ⁇ 10 19 cm -3 or more can be adopted.
- 1 ⁇ 10 17 cm -3 or less is preferably adopted, more preferably 1 ⁇ 10 16 cm -3 or less is adopted, and even more preferably. 1 ⁇ 10 15 cm -3 or less can be adopted.
- the semi-closed space may be configured so that the atomic number ratio Si / C is 1 or less.
- the SiC original substrate 10 satisfying the stoichiometric ratio 1: 1 is arranged in the main body container 50 made of SiC satisfying the stoichiometric ratio 1: 1, the atomic number ratio Si / in the main body container 50. C is 1 (see FIG. 7).
- a C steam supply source (C pellet or the like) may be arranged to set the atomic number ratio Si / C to 1 or less.
- the semi-closed space may be configured so that the atomic number ratio Si / C exceeds 1.
- a SiC original substrate 10 satisfying a stoichiometric ratio 1: 1 and a Si steam supply source 55 (Si pellets or the like) are arranged in a main body container 50 made of SiC satisfying a stoichiometric ratio 1: 1.
- the atomic number ratio Si / C in the main body container 50 exceeds 1 (see FIG. 6).
- FIG. 3 is an explanatory diagram showing an outline of the etching step S10.
- the SiC original substrate 10 is placed in a semi-closed space where the SiC material 40 is exposed and heated in a temperature range of 1400 ° C. or higher and 2300 ° C. or lower, whereby the reactions 1) to 5) below are sustained. It is considered that the etching proceeds as a result.
- the Si atom sublimation step of thermally sublimating the Si atom from the surface of the SiC original substrate 10 and the C atom remaining on the surface of the SiC original substrate 10 react with the Si vapor in the semi-closed space.
- the etching step S10 is a step of arranging the SiC raw substrate 10 and the SiC material 40 so as to face each other and heating the SiC raw substrate 10 so as to be on the high temperature side and the SiC material 40 on the low temperature side.
- an etching space X is formed between the SiC original substrate 10 and the SiC material 40, and the surface of the SiC original substrate 10 can be etched by using the temperature gradient as a driving force.
- the SiC original substrate 10 and the SiC material 40 are arranged so as to face each other in a semi-closed space in which the atomic number ratio Si / C exceeds 1, the SiC original substrate 10 is on the high temperature side, and the SiC material 40 is placed. Includes a step of heating to the low temperature side. In this way, by etching the surface of the SiC original substrate 10 in the semi-closed space where the atomic number ratio Si / C exceeds 1, the work-altered layer 12 can be removed and the MSB can be removed.
- the SiC raw substrate 10 and the SiC material 40 are arranged and heated so as to face each other, so that the raw materials (Si element, C element, etc.) are transferred from the SiC material 40 to the SiC raw substrate 10. This is a step of transporting the dopant) to grow the SiC substrate layer 13.
- the SiC substrate body 20 in which the SiC substrate layer 13 is grown on the SiC original substrate 10 is obtained.
- this crystal growth step S20 it is preferable that the SiC raw substrate 10 and the SiC material 40 are arranged in a semi-closed space and heated in the same manner as in the etching step S10.
- This semi-closed space is formed, for example, by accommodating it in the main body container 50.
- FIG. 4 is an explanatory diagram showing an outline of the crystal growth step S20.
- the SiC raw substrate 10 is placed in the semi-closed space where the SiC material 40 is exposed and heated in a temperature range of 1400 ° C. or higher and 2300 ° C. or lower, whereby the reactions 1) to 5) below are carried out. It is considered that it is carried out continuously, and as a result, crystal growth progresses.
- the Si atom sublimation step of thermally sublimating the Si atom from the surface of the SiC material 40 and the C atom remaining on the surface of the SiC material 40 by reacting with the Si vapor in the semi-closed space As described above, in the crystal growth step S20, the Si atom sublimation step of thermally sublimating the Si atom from the surface of the SiC material 40 and the C atom remaining on the surface of the SiC material 40 by reacting with the Si vapor in the semi-closed space.
- a C atom sublimation process that sublimates the carbide a raw material transport process that transports the raw material to the surface of the SiC raw substrate 10 using a temperature gradient or a chemical potential difference as a driving force, and a step flow in which the raw material reaches the step of the SiC raw substrate 10 and grows. Including the growth process.
- the raw material referred to here includes a Si element, a C element, and a dopant. Therefore, the dopant of the SiC material 40 is transported together with the Si element and the C element. As a result, the SiC substrate layer 13 grows by attracting the doping concentration of the SiC material 40. Therefore, when it is desired to obtain the SiC substrate 30 having a specific doping concentration, the SiC substrate 30 having the desired doping concentration can be produced by adopting the SiC material 40 having a desired doping concentration.
- the crystal growth step S20 is a step of arranging the SiC raw substrate 10 and the SiC material 40 so as to face each other and heating the SiC raw substrate 10 so as to be on the low temperature side and the SiC material 40 on the high temperature side. As a result, a crystal growth space Y is formed between the SiC original substrate 10 and the SiC material 40, and the SiC original substrate 10 can be crystal-grown by using the temperature gradient as a driving force.
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other in a semi-closed space having an atomic number ratio Si / C of more than 1, and the SiC raw substrate 10 is on the low temperature side and the SiC material 40. Includes a step of heating so that is on the high temperature side. As described above, by growing the crystal in the semi-closed space having the atomic number ratio Si / C exceeding 1, it is possible to suppress the formation of MSB on the surface of the SiC substrate layer 13.
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other in a semi-closed space having an atomic number ratio of Si / C of 1 or less, and the SiC raw substrate 10 is on the low temperature side and the SiC material 40. Includes a step of heating so that is on the high temperature side.
- basal plane dislocations (BPDs) in the SiC substrate layer 13 can be removed or reduced.
- the partial pressure difference (chemical potential difference) generated on the surfaces of the polycrystalline SiC and the single crystal SiC is transported as a raw material. Crystals can be grown as a driving force for.
- the peeling step S30 is a step of peeling a part of the SiC substrate body 20 obtained in the crystal growth step S20 to obtain the SiC substrate 30.
- a multi-wire saw cutting method in which a plurality of wires are reciprocated to cut, an electric discharge machining method in which plasma discharge is intermittently generated and cut, and a laser is irradiated in the crystal. Examples thereof include a method of cutting using a laser that collects light to form a layer that serves as a base point for cutting.
- the peeling step S30 includes a laser irradiation step S31 for introducing the damage layer 14 into the SiC substrate body 20 and a separation step S32 for separating the damage layer 14 from the starting point.
- the laser irradiation step S31 is a step of positioning a focusing point of a laser beam having a wavelength that is transparent to single crystal SiC inside the SiC substrate body 20 and irradiating the SiC substrate body 20 with the laser beam to form a damage layer 14. (See FIG. 2).
- the laser irradiation means L used in the laser irradiation step S31 includes, for example, a laser light source L1 that pulse-oscillates the laser light and a condensing lens L2 for condensing the laser light. By scanning this laser beam, the damage layer 14 is introduced into the SiC substrate body 20.
- the separation step S32 is a step of peeling the SiC substrate 30 from the SiC substrate body 20 along the damage layer 14 by the wafer peeling means P.
- the wafer peeling means P as shown in FIG. 2, a method of adsorbing the front surface and the back surface of the SiC substrate 20 to a pedestal or the like to separate them can be exemplified. Further, it may be peeled off by reciprocating a thin wire along the damage layer 14, or it may be peeled off from the damage layer 14 by applying ultrasonic vibration.
- Known techniques can be adopted for the laser irradiation step S31 and the separation step S32, and for example, Japanese Patent Application Laid-Open No. 2013-49161, Japanese Patent Application Laid-Open No. 2018-207834, Japanese Patent Application Laid-Open No. 2017-500725, The technique described in Kai 2017-526161A and the like can be adopted.
- the SiC substrate 30 can be manufactured from the SiC original substrate 10 by going through the etching step S10, the crystal growth step S20, and the peeling step S30 described above. Further, in FIG. 2, one SiC substrate 30 is peeled off from one SiC original substrate 10, but a plurality of SiC substrates 30 may be peeled off by forming the SiC substrate layer 13 thickly.
- the SiC substrate 30 can be repeatedly manufactured by performing the etching step S10 or the peeling step S30 on the SiC original substrate 10 from which the SiC substrate 30 has been peeled off.
- a new SiC substrate 30 by using the SiC substrate 30 (SiC substrate layer 13) peeled off from the SiC substrate body 20. That is, in the method for manufacturing a SiC substrate according to another embodiment, the etching step S10 for removing the processed alteration layer of the peeled SiC substrate layer 13 and the other SiC substrate layer 13 are grown on the SiC substrate layer 13. A crystal growth step S20 for obtaining the SiC substrate body 20 and a peeling step S30 for peeling a part of the SiC substrate body 20 are further included.
- the manufactured SiC substrate 30 As the SiC original substrate 10 in this way, it is possible to further manufacture the SiC substrate 30.
- the damage layer 14 remains on the SiC original substrate 10 and the SiC substrate 30 after peeling. Therefore, as shown in FIG. 2, the damaged layer 14 (processed alteration layer) may be removed by performing an etching step S10 on the peeled SiC original substrate 10 and the SiC substrate 30.
- the waviness when waviness is formed on the surfaces of the SiC original substrate 10 and the SiC substrate 30 after peeling, the waviness may be removed by performing a mechanical polishing step such as a wrapping step.
- the etching step S10 and the crystal growth step S20 heat-treat the SiC raw substrate 10 in the same environment (equipment system).
- equipment system Conventionally, it has been necessary to separately introduce or outsource an apparatus for performing CMP polishing for removing the work-altered layer 12 and an apparatus for performing crystal growth.
- the cost can be significantly reduced.
- the etching step S10 and the crystal growth step S20 are performed using the same SiC material 40, the raw materials consumed in the crystal growth step S20 are filled in the etching step S10. Therefore, the life of the SiC material 40 can be extended.
- the SiC substrates 30 having desired specifications can be manufactured one by one (or a small number of each). Therefore, a small number of SiC substrates 30 having a desired doping concentration can be produced. Furthermore, by selecting the SiC material 40, it is also possible to control the doping concentration one by one for production.
- the crystal growth step S20 it is sufficient to grow the thickness of the SiC substrate layer 13, so that it is easy to maintain an environment for forming the high-quality SiC substrate 30. That is, as compared with the case of forming an ingot whose growth point changes each time the growth progresses (sublimation method), material loss can be reduced and a high-quality SiC substrate 30 can be manufactured. Further, since the temperature gradient is provided along the direction in which the SiC original substrate 10 and the SiC material 40 face each other, it is possible to easily control the temperature distribution in the plane of the SiC original substrate 10 to be substantially uniform. it can. Therefore, it is possible to manufacture a SiC substrate having a large diameter of 6 inches or more or 8 inches or more.
- the SiC substrate manufacturing apparatus can accommodate the SiC original substrate 10 and is between the main body container 50 containing the SiC material 40 and the SiC original substrate 10 and the SiC material 40.
- a heating furnace 60 capable of heating so as to form a temperature gradient is provided.
- the main body container 50 is a fitting container including an upper container 51 and a lower container 52 that can be fitted to each other.
- a minute gap 53 is formed in the fitting portion between the upper container 51 and the lower container 52, and the inside of the main container 50 can be exhausted (evacuated) from the gap 53.
- the main body container 50 has a SiC material 40 arranged so as to face the SiC original substrate 10, and a raw material transportation space S1 for transporting a raw material between the SiC material 40 and the SiC original substrate 10.
- the doping concentration of the SiC material 40 is preferably set to a doping concentration corresponding to the desired SiC substrate 30.
- the upper container 51 and the lower container 52 according to the present embodiment are made of polycrystalline SiC. Therefore, the main body container 50 itself becomes the SiC material 40. It should be noted that only the portion of the main body container 50 facing the SiC original substrate 10 may be made of the SiC material 40. In that case, a refractory material (similar to the refractory container 70 described later) can be used for the portion other than the SiC material 40.
- a high melting point material may be used for the entire main body container 50, and a substrate-shaped SiC material 40 may be separately housed.
- a spacer (such as a substrate holder 54 described later) may be arranged between the substrate-like SiC material 40 and the SiC original substrate 10 to form an etching space X or a crystal growth space Y.
- the main body container 50 is configured to generate an atmosphere containing Si element and C element in the internal space when the heat treatment is performed while the SiC original substrate 10 is housed.
- the main body container 50 made of polycrystalline SiC is heated to form an atmosphere containing Si element and C element in the internal space.
- the space inside the heat-treated main body container 50 be a vapor pressure environment of a mixed system of a gas phase species containing a Si element and a gas phase species containing a C element.
- the gas phase species containing the Si element include Si, Si 2 , Si 3 , Si 2 C, SiC 2 , and SiC.
- the gas phase species containing the C element include Si 2 C, SiC 2 , SiC and C. That is, it is preferable that the SiC gas is present in the semi-closed space.
- the raw material transport space S1 is a space for transporting raw materials from the SiC raw substrate 10 to the SiC material 40 by using a temperature gradient provided between the SiC raw substrate 10 and the SiC material 40 as a driving force, and from the SiC material 40. This is a space for transporting raw materials to the SiC original substrate 10.
- the temperature of the SiC raw substrate 10 side is high and the temperature of the upper container 51 is low so that the SiC raw substrate 51 is low.
- the substrate 10 is arranged (see FIG. 6).
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other and heated so that the SiC raw substrate 10 is on the high temperature side and the SiC material 40 is on the low temperature side, the SiC raw substrate 10 to the SiC material
- the raw material is transported to 40, and the SiC original substrate 10 is etched. That is, by setting such a temperature gradient and heating, an etching space X is formed in the raw material transport space S1.
- the main body container 50 may have a substrate holder 54 for arranging the SiC original substrate 10 on the high temperature side of the temperature gradient.
- the SiC original substrate 10 can be arranged on the high temperature side of the temperature gradient formed by the heating furnace 60 to form the etching space X of the SiC original substrate 10. It is desirable that the substrate holder 54 is made of the same high melting point material as the high melting point container 70.
- the temperature of the SiC original substrate 10 and the temperature of the SiC material 40 facing the surface are compared, the temperature of the SiC original substrate 10 side is low and the temperature of the upper container 51 is high.
- the original substrate 10 is arranged (see FIG. 7).
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other and heated so that the SiC raw substrate 10 is on the low temperature side and the SiC material 40 is on the high temperature side, the SiC raw substrate 40 to the SiC raw substrate are heated.
- the raw material is transported to 10, and the SiC substrate layer 13 grows on the SiC original substrate 10. That is, by setting such a temperature gradient and heating, a crystal growth space Y is formed in the raw material transport space S1.
- the configuration shown in FIG. 6 is the etching step S10 of the method for manufacturing the SiC substrate of the present invention
- the configuration shown in FIG. 7 is the crystal growth step S20.
- the SiC material 40 is crystal-grown in the etching step S10, and the SiC material 40 is etched in the crystal growth step S20. Therefore, in the etching step S10 and the crystal growth step S20, it is preferable that the SiC material 40 facing the SiC original substrate 10 is a portion.
- the lower container 52 crystal grows. Therefore, in the crystal growth step S20 of FIG. 7, the lower container 52 is arranged on the high temperature side of the temperature gradient, and the SiC original substrate is used. It is preferable to supply the material to 10. As described above, the life of the SiC material 40 can be extended by etching the grown portion of the SiC material 40 in the etching step S10 in the crystal growth step S20. Although the example of reversing the main body container 50 is shown in FIGS. 6 and 7, the same portion of the SiC material 40 can be used by reversing the temperature gradient of the heating furnace 60.
- the main body container 50 may be provided with a Si steam supply source 55 capable of supplying Si steam in the container.
- a Si steam supply source 55 capable of supplying Si steam in the container.
- the Si vapor supply source 55 include solid Si (Si pellets such as single crystal Si pieces and Si powder) and Si compounds.
- the atomic number ratio Si / C in the main body container 50 can be set to 1 by arranging the Si vapor supply source 55. Exceed. Specifically, a SiC raw substrate 10 satisfying a stoichiometric ratio of 1: 1 and a Si steam supply source 55 (Si pellets or the like) are placed in a main body container 50 of a polycrystalline SiC having a stoichiometric ratio of 1: 1. When, is arranged, the atomic number ratio Si / C in the main body container 50 exceeds 1.
- the atomic number ratio Si / C in the main body container 50 is 1 or 1 or less.
- the SiC original substrate 10 satisfying the stoichiometric ratio 1: 1 is arranged in the main body container 50 of polycrystalline SiC satisfying the stoichiometric ratio 1: 1, the inside of the main body container 50.
- the atomic number ratio Si / C of is 1.
- the SiC-Si equilibrium vapor pressure environment and the SiC-C equilibrium vapor pressure environment in the present specification include a near thermal equilibrium vapor pressure environment that satisfies the relationship between the growth rate and the growth temperature derived from the theoretical thermal equilibrium environment.
- the heating furnace 60 includes a main heating chamber 61 capable of heating an object to be processed (SiC original substrate 10 or the like) to a temperature of 1000 ° C. or higher and 2300 ° C. or lower, and a heating object at 500 ° C.
- a preheating chamber 62 capable of preheating to the above temperature
- a melting point container 70 capable of accommodating the main body container 50
- a moving means 63 capable of moving the melting point container 70 from the preheating chamber 62 to the main heating chamber 61. It is equipped with a moving table).
- the heating chamber 61 is formed in a regular hexagon in a plan sectional view, and the melting point container 70 is arranged inside the heating chamber 61.
- a heater 64 (mesh heater) is provided inside the main heating chamber 61.
- a multilayer heat-reflecting metal plate is fixed to the side wall or ceiling of the heating chamber 61 (not shown). The multilayer heat-reflecting metal plate is configured to reflect the heat of the heating heater 64 toward the substantially central portion of the main heating chamber 61.
- the heating heater 64 is arranged so as to surround the melting point container 70 in which the object to be processed is housed, and further, the multilayer heat-reflecting metal plate is arranged outside the heating heater 64, whereby 1000 ° C.
- the temperature can be raised to 2300 ° C. or lower.
- a resistance heating type heater or a high frequency induction heating type heater can be used as the heating heater 64.
- the heating heater 64 may adopt a configuration capable of forming a temperature gradient in the melting point container 70.
- the heating heater 64 may be configured so that many heaters are arranged on the upper side. Further, the heating heater 64 may be configured so that the width increases toward the upper side. Alternatively, the heater 64 may be configured so that the electric power supplied can be increased toward the upper side.
- a vacuum forming valve 65 for exhausting the inside of the main heating chamber 61
- an inert gas injection valve 66 for introducing an inert gas into the main heating chamber 61
- a vacuum gauge 67 for measuring the degree of vacuum inside is connected.
- the vacuum forming valve 65 is connected to a vacuum drawing pump that exhausts the inside of the main heating chamber 61 to create a vacuum (not shown). With the vacuum forming valve 65 and the vacuum pulling pump, the degree of vacuum in the main heating chamber 61 can be adjusted to, for example, 10 Pa or less, more preferably 1 Pa or less, still more preferably 10 -3 Pa or less. As this evacuation pump, a turbo molecular pump can be exemplified.
- the Inert gas injection valve 66 is connected to the Inactive gas supply source (not shown). With the inert gas injection valve 66 and the inert gas supply source, the inert gas can be introduced into the heating chamber 61 in the range of 10-5 to 10000 Pa. As the inert gas, Ar, He, N 2, or the like can be selected.
- the inert gas injection valve 66 is a dopant gas supply means capable of supplying the dopant gas into the main body container 50. That is, the doping concentration of the SiC substrate layer 13 can be adjusted by selecting a dopant gas (for example, N 2 or the like) as the inert gas.
- a dopant gas for example, N 2 or the like
- the preheating chamber 62 is connected to the main heating chamber 61, and the melting point container 70 can be moved by the moving means 63.
- the preheating chamber 62 of the present embodiment is configured so that the temperature can be raised by the residual heat of the heating heater 64 of the main heating chamber 61.
- the temperature of the preheating chamber 62 is raised to about 1000 ° C., and the object to be treated (SiC original substrate 10, main body container 50, refractory container 70, etc.) Degassing treatment can be performed.
- the moving means 63 is configured to be movable between the main heating chamber 61 and the preheating chamber 62 on which the melting point container 70 is placed. Since the transfer between the main heating chamber 61 and the preheating chamber 62 by the moving means 63 is completed in about 1 minute at the shortest, the temperature can be raised or lowered at 1 to 1000 ° C./min. Since the rapid temperature rise and the rapid temperature decrease can be performed in this way, it is possible to observe a surface shape having no history of low temperature growth during temperature rise and temperature reduction, which was difficult with conventional devices. Further, in FIG. 3, the preheating chamber 62 is arranged below the main heating chamber 61, but the present invention is not limited to this, and the preheating chamber 62 may be arranged in any direction.
- the moving means 63 is a moving table on which the melting point container 70 is placed. A small amount of heat is released from the contact portion between the moving table and the melting point container 70. As a result, a temperature gradient can be formed in the high melting point container 70 (and in the main body container 50). That is, in the heating furnace 60 of the present embodiment, since the bottom of the melting point container 70 is in contact with the moving table, the temperature gradient is such that the temperature decreases from the upper container 71 to the lower container 72 of the melting point container 70. Provided. It is desirable that this temperature gradient is formed along the front and back directions of the SiC original substrate 10. Further, as described above, a temperature gradient may be formed by the configuration of the heater 64. Further, the heating heater 64 may be configured so that the temperature gradient can be reversed.
- the heating furnace 60 forms an atmosphere containing a Si element, and the main body container 50 can be heated in this atmosphere.
- the atmosphere containing the Si element in the heating furnace 60 according to the present embodiment is formed by using the high melting point container 70 and the Si steam supply source 74. It should be noted that any method that can form an atmosphere containing a Si element around the main body container 50 can be naturally adopted.
- the high melting point container 70 is configured to contain a high melting point material.
- a general purpose heat-resistant member C, W is a refractory metal, Re, Os, Ta, Mo , Ta 9 C 8 is a carbide, HfC, TaC, NbC, ZrC , Ta 2 C, TiC, WC, MoC, a nitride HfN, TaN, BN, Ta 2 N, ZrN, TiN, HfB 2, TaB 2, ZrB 2, NB 2, TiB 2 is a boride, it can be exemplified polycrystalline SiC.
- the high melting point container 70 is a fitting container including an upper container 71 and a lower container 72 that can be fitted to each other, and is configured to be able to accommodate the main body container 50.
- a minute gap 73 is formed in the fitting portion between the upper container 71 and the lower container 72, and the inside of the high melting point container 70 can be exhausted (evacuated) from the gap 73.
- the high melting point container 70 preferably has a Si steam supply source 55 capable of supplying the vapor pressure of a vapor phase species containing a Si element in the high melting point container 70.
- the Si vapor supply source 55 may have a configuration in which Si vapor is generated in the melting point container 70 during heat treatment, and examples thereof include solid Si (Si pellets such as single crystal Si pieces and Si powder) and Si compounds. can do.
- the SiC substrate manufacturing apparatus employs TaC as the material of the melting point container 70 and tantalum Silicide as the Si vapor supply source 55. That is, as shown in FIG. 4, a tantalum Silicide layer is formed inside the melting point container 70, and Si vapor is supplied from the tantalum Silicide layer into the container during the heat treatment to form a Si vapor pressure environment. It is configured to be. In addition to this, any configuration can be adopted as long as the vapor pressure of the vapor phase species containing Si element is formed in the melting point container 70 during the heat treatment.
- Example 1 is an example specifically explaining the removal or reduction of the work-altered layer 12 in the etching step S10.
- the second embodiment is an embodiment that specifically describes the removal or reduction of the MSB in the etching step S10.
- Example 3 is an example specifically illustrating the removal or reduction of MSB in the crystal growth step S20.
- Example 4 is an example specifically illustrating the removal or reduction of BPD in the crystal growth step S20.
- Examples 5 and 6 are examples for explaining the control of the doping concentration in the crystal growth step S20.
- Example 1 Removal or reduction of processing alteration layer in etching process>
- the SiC original substrate 10 was housed in the main body container 50 and the melting point container 70, and heat-treated under the following heat treatment conditions.
- the lattice strain of the SiC original substrate 10 can be obtained by comparing with a reference crystal lattice as a reference.
- the SEM-EBSD method can be used as a means for measuring this lattice strain.
- the SEM-EBSD method is a method (Electron Backscattering Diffraction) that enables strain measurement of a minute region based on the Kikuchi line diffraction pattern obtained by electron backscattering in a scanning electron microscope (SEM). : EBSD).
- SEM-EBSD method is a method (Electron Backscattering Diffraction) that enables strain measurement of a minute region based on the Kikuchi line diffraction pattern obtained by electron backscattering in a scanning electron microscope (SEM). : EBSD).
- the amount of lattice strain can be obtained by comparing the diffraction pattern of the reference crystal lattice as a reference with the diffraction pattern of the measured crystal lattice.
- a reference point is set in a region where lattice distortion is not considered to occur. That is, it is desirable to arrange the reference point in the region of the bulk layer 11. Normally, it is a well-established theory that the depth of the processed alteration layer 12 is about 10 ⁇ m. Therefore, the reference point may be set at a position having a depth of about 20 to 35 ⁇ m, which is considered to be sufficiently deeper than the processed alteration layer 12.
- the diffraction pattern of the crystal lattice at this reference point is compared with the diffraction pattern of the crystal lattice in each measurement region measured at a pitch on the order of nanometers. As a result, the amount of lattice strain in each measurement region with respect to the reference point can be calculated.
- the cross section of the SiC raw substrate 10 before and after the etching step S10 of Example 1 was measured using a scanning electron microscope under the following conditions.
- FIG. 8A is a cross-sectional SEM-EBSD imaging image of the SiC original substrate 10 before the etching step S10 of Example 1. As shown in FIG. 8A, before the etching step S10, a lattice strain having a depth of 5 ⁇ m was observed in the SiC original substrate 10. This is a lattice strain introduced during machining, and it can be seen that it has a machining alteration layer 12. In FIG. 8A, compressive stress is observed.
- FIG. 8B is a cross-sectional SEM-EBSD imaging image of the SiC original substrate 10 after the etching step S10 of Example 1. As shown in FIG. 8B, no lattice strain was observed in the SiC original substrate 10 after the etching step S10. That is, it can be seen that the processing alteration layer 12 was removed by the etching step S10. The MSB was formed on the surface of the SiC original substrate 10 after etching.
- the SiC raw substrate 10 and the SiC material 40 are arranged so as to face each other, and the SiC raw substrate 10 is heated and etched so as to be on the high temperature side and the SiC material 40 on the low temperature side. Therefore, the processed alteration layer 12 can be removed or reduced. As a result, the SiC substrate layer 13 can be formed on the bulk layer 11 from which the processed alteration layer 12 has been reduced or removed, so that a high-quality SiC substrate 30 can be manufactured.
- Example 2 Removal or reduction of MSB in the etching process>
- the SiC original substrate 10 was housed in the main body container 50 and the melting point container 70, and heat-treated under the following heat treatment conditions.
- the step height, terrace width, and presence / absence of MSB can be confirmed by an atomic force microscope (AFM) or a scanning electron microscope (SEM) image contrast evaluation method described in JP-A-2015-179802. ..
- the atomic number ratio Si / C in the container exceeds 1.
- Heating treatment conditions The SiC original substrate 10 arranged under the above conditions was heat-treated under the following conditions. Heating temperature: 1900 ° C Heating time: 60 min Temperature gradient: 1 ° C / mm Etching rate: 300 nm / min This heating chamber vacuum degree: 10-5 Pa
- the steps on the surface of the SiC original substrate 10 of Example 2 before and after the etching step S10 were observed by SEM.
- the results are shown in FIGS. 9 (a) and 9 (b).
- the step height was measured by an atomic force microscope (AFM).
- FIG. 9A is an SEM image of the surface of the SiC original substrate 10 before the etching step S10 of Example 2.
- An MSB having a height of 3 nm or more is formed on the surface of the SiC original substrate 10 before the etching step S10. The step height was measured by AFM.
- FIG. 9B is an SEM image of the surface of the SiC original substrate 10 after the etching step S10 of Example 2. It can be seen that no MSB is formed on the surface of the SiC original substrate 10 after the etching step S10 of Example 2, and the steps of 1.0 nm (full unit cell) are regularly arranged.
- the MSB can be reduced or removed by etching the SiC original substrate 10 in the semi-closed space where the atomic number ratio Si / C exceeds 1.
- the SiC substrate layer 13 can be formed on the bulk layer 11 in which the MSB is reduced / removed, and a high-quality SiC substrate 30 can be manufactured.
- the processed alteration layer 12 was also removed from the SiC original substrate 10 after the etching step S10 of Example 2.
- the atomic number ratio Si / C in the container exceeds 1.
- Heating treatment conditions The SiC original substrate 10 arranged under the above conditions was heat-treated under the following conditions. Heating temperature: 1800 ° C Heating time: 60 min Temperature gradient: 1 ° C / mm Growth rate: 68 nm / min Main heating chamber 61 Vacuum degree: 10-5 Pa
- the steps on the surface of the SiC original substrate 10 of Example 3 after the crystal growth step S20 were observed by SEM. The result is shown in FIG.
- the step height was measured by an atomic force microscope (AFM), and the terrace width was measured by a scanning electron microscope (AFM).
- FIG. 10 is an SEM image of the surface of the SiC original substrate 10 after the crystal growth step S20 of Example 3. Similar to FIG. 9A, MSB having a height of 3 nm or more was formed on the surface of the SiC original substrate 10 before the crystal growth step S20. As shown in FIG. 10, no MSB is formed on the surface of the SiC original substrate 10 after the crystal growth step S20 of Example 3, and steps of 1.0 nm (full unit cell) are regularly arranged. I understand.
- the SiC substrate layer 13 in which the MSB is not formed is formed by crystal-growing the SiC original substrate 10 in a semi-closed space having an atomic number ratio Si / C of more than 1. can do.
- the SiC substrate 30 in which the MSB is reduced / removed can be manufactured.
- Heating treatment conditions The SiC original substrate 10 arranged under the above conditions was heat-treated under the following conditions. Heating temperature: 1700 ° C Heating time: 300 min Temperature gradient: 1 ° C / mm Growth rate: 5 nm / min Main heating chamber 61 Vacuum degree: 10-5 Pa
- FIG. 11 is an explanatory diagram of a method for obtaining a conversion rate obtained by converting BPD into other defects / dislocations (TED or the like) in the SiC substrate layer 13.
- FIG. 11A shows a state in which the SiC substrate layer 13 is grown by the crystal growth step S20. In this heating step, the BPD existing in the SiC original substrate 10 is converted into TED with a certain probability. Therefore, TED and BPD are mixed on the surface of the SiC substrate layer 13 unless 100% conversion is performed.
- FIG. 11B shows how defects in the SiC substrate layer 13 were confirmed by using the KOH dissolution etching method.
- a SiC substrate is immersed in a molten salt (KOH, etc.) heated to about 500 ° C. to form etch pits in dislocations and defective parts, and the type of dislocation is determined by the size and shape of the etch pits. It is a method to do. By this method, the number of BPDs existing on the surface of the SiC substrate layer 13 is obtained.
- FIG. 11C shows how the SiC substrate layer 13 is removed after KOH dissolution etching. In this method, after flattening to the depth of the etch pit by mechanical polishing, CMP, or the like, the SiC substrate layer 13 is removed by thermal etching to expose the surface of the SiC original substrate 10.
- 11D shows a state in which defects in the SiC original substrate 10 are confirmed by using the KOH dissolution etching method on the SiC original substrate 10 from which the SiC substrate layer 13 has been removed. By this method, the number of BPDs existing on the surface of the SiC original substrate 10 is obtained.
- the number of BPDs present on the surface of the SiC substrate layer 13 (see FIG. 11B) and the number of BPDs present on the surface of the SiC original substrate 10 (FIG. 11D).
- the BPD conversion rate converted from BPD to other defects / dislocations during the crystal growth step S20 can be obtained.
- the number of BPDs present on the surface of the SiC substrate layer 13 of Example 4 was 0 cm- 2 , and the number of BPDs present in the bulk layer 11 was about 1000 cm- 2 . That is, it can be understood that BPD is reduced / removed by arranging the SiC original substrate 10 having no MSB on the surface in a semi-closed space having an atomic number ratio of Si / C of 1 or less and growing crystals.
- the SiC substrate layer on the surface on which the BPD is reduced / removed by crystal growing the SiC original substrate 10 in the semi-closed space having an atomic number ratio Si / C of 1 or less. 13 can be formed. Thereby, the SiC substrate 30 having the SiC substrate layer 13 in which the BPD is reduced / removed can be manufactured.
- Example 5 Control of doping concentration in crystal growth step>
- the SiC original substrate 10 was housed in the main body container 50 and the melting point container 70, and heat-treated under the following heat treatment conditions.
- the dopant and doping concentration of the SiC original substrate 10 were confirmed by Raman spectroscopy.
- Heating treatment conditions The SiC original substrate 10 arranged under the above conditions was heat-treated under the following conditions. Heating temperature: 1700 ° C Heating time: 300 min Temperature gradient: 1 ° C / mm Growth rate: 5 nm / min Main heating chamber 61 Vacuum degree: 10-5 Pa
- FIG. 12 is an SEM image obtained by observing the SiC substrate of Example 5 grown under the above conditions from a cross section at a magnification of 10000.
- the thickness of the SiC substrate layer 13 of Example 5 was 1.5 ⁇ m.
- the doping concentration of the SiC substrate layer 13 of Example 5 was 1 ⁇ 10 17 cm -3 or less, and the doping concentration of the SiC original substrate 10 was 3 ⁇ 10 18 cm -3 . From this, it can be seen that the SiC substrate layer 13 inherits the doping concentration of the SiC material 40. Further, as shown in FIG. 12, since the SiC substrate layer 13 has a brighter SEM image contrast than the SiC original substrate 10, it can be understood that the doping concentration of the SiC substrate layer 13 is lower than that of the SiC original substrate 10. ..
- SiC original substrate 10 The same SiC original substrate 10 as in Example 5 was used.
- High melting point container 70 The same high melting point container 70 as in Example 5 was used.
- FIG. 13 is an SEM image of the SiC substrate 30 of Example 6 grown under the above conditions, observed from a cross section at a magnification of ⁇ 10000.
- the thickness of the SiC substrate layer 13 of Example 6 was 3 ⁇ m.
- the doping concentration of the SiC substrate layer 13 of Example 6 was 2 ⁇ 10 19 cm -3 , and the doping concentration of the bulk layer 11 was 3 ⁇ 10 18 cm -3 . That is, the doping concentration of the SiC substrate layer 13 is higher than the doping concentration of the SiC original substrate 10. This can be confirmed from the fact that the SiC substrate layer 13 has a darker SEM image contrast than the bulk layer 11 as shown in FIG.
- the manufacturing method of the SiC substrate according to the present invention and selecting the doping concentration of the SiC material 40, the N 2 gas introduction o'clock crystal growth process S20, it is possible to control the doping concentration of the SiC substrate layer 13 .. As a result, the SiC substrate 30 having a desired doping concentration can be produced.
- FIG. 14A is a graph showing the relationship between the heating temperature and the etching rate in the etching process of the present invention.
- the horizontal axis of this graph is the reciprocal of temperature, and the vertical axis of this graph shows the etching rate logarithmically.
- FIG. 14B is a graph showing the relationship between the heating temperature and the growth rate in the crystal growth step of the present invention.
- the horizontal axis of this graph is the reciprocal of temperature
- the vertical axis of this graph is the logarithmic growth rate.
- thermodynamic calculation in the SiC-Si equilibrium vapor pressure environment is shown by a broken line (Arrhenius plot), and the result of the thermodynamic calculation in the SiC-C equilibrium vapor pressure environment is shown by the alternate long and short dash line (Arrhenius plot). It is shown in.
- the thermodynamic calculation of the etching process and the thermodynamic calculation of the crystal growth process will be described in detail separately.
- thermodynamic calculation of etching process the amount of vapor (gas phase species containing Si element and vapor phase species containing C element) generated from the SiC original substrate 10 when the main body container 50 is heated can be converted into the etching amount. .. In that case, the etching rate of the SiC original substrate 10 is obtained by the following equation 1.
- T is the temperature of the SiC raw substrate 10
- k is Boltzmann's constant.
- P i is that value obtained by adding the vapor pressure generated in the main vessel 50 by SiC raw substrate 10 is heated.
- vapor-phase species of P i SiC, Si 2 C , SiC 2 and the like is contemplated.
- the broken line in FIG. 14A shows the heat generated when single crystal SiC is etched in a vapor pressure environment when SiC (solid) and Si (liquid phase) are in phase equilibrium via a gas phase. It is the result of mechanical calculation. Specifically, the thermodynamic calculation was performed under the following conditions (i) to (iv) using Equation 1.
- (ii) the etching driving force is a temperature gradient in the main body container 50, and
- the raw material gas is SiC, Si 2 C, SiC. 2.
- the desorption coefficient at which the raw material sublimates from the step is 0.001.
- the two-point chain line in FIG. 14A is a single crystal SiC etched in a vapor pressure environment when SiC (solid phase) and C (solid phase) are in a phase equilibrium state via a gas phase.
- This is the result of the thermodynamic calculation.
- the thermodynamic calculation was performed under the following conditions (i) to (iv) using Equation 1.
- (I) it is a constant volume of SiC-C equilibrium vapor pressure environment, (ii) etching the driving force, it is the temperature gradient in the main container 50, (iii) a raw material gas, SiC, Si 2 C, SiC 2.
- the desorption coefficient at which the raw material sublimates from the step is 0.001.
- the values in the JANAF thermochemical table were used for the data of each chemical species used in the thermodynamic calculation.
- the SiC raw substrate 10 is arranged in a space (inside the main body container 50) in which the atomic number ratio Si / C exceeds 1, and the SiC raw substrate 10 is etched (marked with ⁇ ). ) Shows that the tendency is in agreement with the result of thermodynamic calculation of single crystal SiC etching in the SiC-Si equilibrium vapor pressure environment. Further, the result of etching the SiC original substrate 10 by arranging the SiC original substrate 10 in a space (inside the main body container 50) in which the atomic number ratio Si / C is 1 or less (x mark) is the SiC-C equilibrium vapor pressure. It can be seen that the tendency is in agreement with the result of thermodynamic calculation of single crystal SiC etching in the environment.
- thermodynamic calculation of crystal growth process the partial pressure difference between the SiC raw material and the steam generated from the SiC substrate when the inside of the main body container 50 is heated can be converted into the growth amount.
- a chemical potential difference and a temperature gradient can be assumed.
- this chemical potential difference can be assumed to be the partial pressure difference of gas phase species generated on the surfaces of polycrystalline SiC (SiC material 40) and single crystal SiC (SiC original substrate 10).
- the growth rate of SiC is obtained by the following equation 2.
- T is the temperature of the SiC raw material side
- k is Boltzmann's constant.
- P feedstock -P substrate, source gas becomes supersaturated state, a growth amount deposited as SiC, as a raw material gas SiC, Si 2 C, SiC 2 is assumed.
- the broken line in FIG. 14B shows a single crystal using polycrystalline SiC as a raw material in a vapor pressure environment when SiC (solid) and Si (liquid phase) are in a phase equilibrium state via a gas phase.
- This is the result of thermodynamic calculation when SiC is grown.
- the thermodynamic calculation was performed under the following conditions (i) to (iv) using Equation 2.
- (I) It is a SiC-Si equilibrium vapor pressure environment with a constant volume, and (ii) the growth driving force is the temperature gradient in the main body container 50 and the vapor pressure difference (chemical potential difference) between the polycrystalline SiC and the single crystal SiC. That is, (iii) the raw material gas is SiC, SiC 2 C, SiC 2 , and (iv) the adsorption coefficient that the raw material adsorbs to the step of the SiC raw substrate 10 is 0.001.
- the two-point chain line in FIG. 14B uses polycrystalline SiC as a raw material in a vapor pressure environment when SiC (solid phase) and C (solid phase) are in a phase equilibrium state via a gas phase.
- This is the result of thermodynamic calculation when the single crystal SiC is grown. Specifically, the thermodynamic calculation was performed under the following conditions (i) to (iv) using Equation 2.
- the raw material gas is SiC, SiC 2 C, SiC 2
- the adsorption coefficient that the raw material adsorbs to the step of the SiC raw substrate 10 is 0.001.
- the values in the JANAF thermochemical table were used for the data of each chemical species used in the thermodynamic calculation.
- the SiC original substrate 10 is arranged in a space (inside the main body container 50) in which the atomic number ratio Si / C exceeds 1, and the SiC substrate layer 13 is grown on the SiC original substrate 10. It can be seen that the results (marked with ⁇ ) are in agreement with the results of the thermodynamic calculation of SiC growth in the SiC-Si equilibrium vapor pressure environment. Further, the result (x mark) of arranging the SiC original substrate 10 in a space (inside the main body container 50) in which the atomic number ratio Si / C is 1 or less and growing the SiC substrate layer 13 on the SiC original substrate 10 is shown. It can be seen that the tendency is in agreement with the result of thermodynamic calculation of SiC growth in the SiC-C equilibrium vapor pressure environment.
- SiC original substrate 11
- Bulk layer 12
- Processed alteration layer 13
- SiC substrate layer 20
- SiC substrate body 30
- SiC substrate 40
- SiC material 50
- Main body container 51
- Upper container 52
- Lower container 53
- Gap 54
- Substrate holder 55
- Si steam supply source 60
- Heating furnace 61
- Heating chamber 62
- Pre-heating chamber 63
- Transportation means 64
- Heating heater Vacuum forming valve
- Inactive gas injection valve 67
- Vacuum meter 70
- High melting point container 71
- Upper container 72
- Lower container 73
- Gap 74
- Si Steam supply source S1
- Raw material transportation space X Etching Space Y Crystal growth space
- S10 Etching process
- S20 Crystal growth process
- S30 Peeling process S31
- Laser irradiation process S32 Separation process
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Abstract
Description
また、高温CVD法は、大口径化が難しいことに加えて、生産性が低いという問題があった。また、昇華法は、大口径化が難しいことに加えて、欠陥密度が高いという問題があった。
また、本発明は、大口径なSiC基板を製造可能なSiC基板の製造方法を提供することを課題とする。
前記SiC原基板上にSiC基板層を成長させてSiC基板体を得る結晶成長工程と、
前記SiC基板体の一部を剥離してSiC基板を得る剥離工程と、を含み、
前記エッチング工程及び前記結晶成長工程は、前記SiC原基板とSiC材料とを相対させて配置し、前記SiC原基板と前記SiC材料との間に温度勾配が形成されるよう加熱する工程である、SiC基板の製造方法である。
また、エッチング工程と結晶成長工程は、同様の環境(装置系)でSiC原基板を熱処理することができる。そのため、1つの装置系で加工変質層の除去とSiC基板層の結晶成長とを行うことができ、複数の装置を導入する必要がないため費用を大幅に削減することができる。
さらには、エッチング工程と結晶成長工程を含むことにより、本発明のSiC材料の寿命を延命することができる。
このように、エッチング工程及び前記結晶成長工程が、Si元素及びC元素を含む雰囲気下で加熱する工程であることにより、より高品質なSiC基板を製造することができる。
このように、エッチング工程及び前記結晶成長工程が、準閉鎖空間内で加熱する工程であることにより、より高品質なSiC基板を製造することができる。
このように、エッチング工程及び前記結晶成長工程が、SiC材料を含む本体容器を用いることにより、容易にSi元素及びC元素を含む雰囲気の準閉鎖空間を形成することができる。
また、本発明の好ましい形態では、前記エッチング工程は、原子数比Si/Cが1を超える準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が高温側、前記SiC材料が低温側となるよう加熱する工程を含む。
このように、温度勾配を駆動力としてSiC原基板をエッチングすることにより、加工変質層やマクロステップバンチングを除去ないし低減し、より高品質なSiC基板を製造することができる。
また、このように、SiC原基板とSiC材料との間に温度勾配を設けることで、SiC原基板表面をエッチングする態様であるため、SiC原基板の面内の温度分布が位置によって大きく異なることを抑制することができる。そのため、高品質かつ大口径(6インチ以上、さらには8インチ以上)な基板を製造することが可能である。
また、本発明の好ましい形態では、前記結晶成長工程は、原子数比Si/Cが1を超える準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が低温側、前記SiC材料が高温側となるよう加熱する工程を含む。
また、本発明の好ましい形態では、前記結晶成長工程は、原子数比Si/Cが1以下の準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が低温側、前記SiC材料が高温側となるよう加熱する工程を含む。
このように、温度勾配を駆動力としてSiC基板層を成長させることにより、基底面転位やマクロステップバンチングを除去ないし低減し、より高品質なSiC基板を製造することができる。
また、このように、SiC原基板とSiC材料との間に温度勾配を設けることで、SiC基板層を成長させる態様であるため、SiC原基板の面内の温度分布が位置によって大きく異なることを抑制することができる。そのため、高品質かつ大口径(6インチ以上、さらには8インチ以上)な基板を製造することが可能である。
このように、レーザー照射工程及び分離工程を含むことにより、素材ロスを低減することができる。そのため、SiC基板体の厚みに制限がなく、SiC基板体を厚く形成する必要がない。
また、本発明によれば、大口径なSiC基板を製造可能なSiC基板の製造方法を提供することができる。
本発明は、図1及び図2に示すように、SiC原基板10から新たなSiC基板30を製造する方法であって、SiC原基板10の加工変質層12をエッチングにより除去するエッチング工程S10と、SiC原基板10の上にSiC基板層13を成長させてSiC基板体20を得る結晶成長工程S20と、SiC基板体20の一部を剥離してSiC基板30を得る剥離工程S30と、を含む。
以下、本発明の各工程について詳細に説明する。
エッチング工程S10は、図3に示すように、SiC原基板10とSiC材料40とを相対させて配置し加熱することで、SiC原基板10からSiC材料40へ原料(Si元素、C元素及びドーパント)を輸送し、SiC原基板10の表面をエッチングする工程である。
なお、本明細書における「準閉鎖空間」とは、容器内の真空引きは可能であるが、容器内に発生した蒸気の少なくとも一部を閉じ込め可能な空間のことをいう。
SiC原基板10としては、単結晶SiCを板状に加工したものを例示することができる。具体的には、昇華法等で作製したSiCインゴットから円盤状にスライスしたSiCウエハ等を例示できる。なお、単結晶SiCの結晶多型としては、何れのポリタイプのものも採用することができる。
また、本発明に係るSiC基板の製造方法により製造したSiC基板30を、SiC原基板として用いることも可能である。
SiC材料40は、SiC原基板10と相対させて加熱することで、SiC原基板10にSi元素と、C元素と、ドーパントと、を供給可能なSiCで構成される。例えば、SiC製の容器(本体容器50)やSiC製の基板を含む。具体的には、SiC原基板10を収容する容器の少なくとも一部(特に、SiC原基板10と相対する部分)をSiC材料40で形成することや、SiC材料40となるSiC製の基板を、容器内においてSiC原基板10と相対させるように配置することを例示できる。
すなわち、SiC材料40は、単結晶SiC又は多結晶SiCであることが好ましい。なお、SiC材料40の結晶多形としては、何れのポリタイプのものも採用することができる。
一方で、ドーピング濃度の高いSiC基板30を製造したい場合には、好ましくは、1×1017cm-3以下を採用し、より好ましくは1×1016cm-3以下を採用し、更に好ましくは1×1015cm-3以下を採用することができる。
準閉鎖空間は、原子数比Si/Cが1以下となるよう構成しても良い。例えば、化学量論比1:1を満たすSiC製の本体容器50内に、化学量論比1:1を満たすSiC原基板10を配置した場合には、本体容器50内の原子数比Si/Cは1となる(図7参照)。また、C蒸気供給源(Cペレット等)を配置して原子数比Si/Cを1以下としても良い。
図3は、エッチング工程S10の概要を示す説明図である。このエッチング工程S10においては、SiC材料40が露出した準閉鎖空間にSiC原基板10を配置し、1400℃以上2300℃以下の温度範囲で加熱することで、以下1)~5)の反応が持続的に行われ、結果としてエッチングが進行すると考えられる。
2) 2C(s)+Si(v)→SiC2(v)
3) C(s)+2Si(v)→Si2C(v)
4) Si(v)+SiC2(v)→2SiC(s)
5) Si2C(v)→Si(v)+SiC(s)
2)及び3)の説明:Si原子(Si(v))が脱離することで、SiC原基板10表面に残存したC(C(s))は、準閉鎖空間内のSi蒸気(Si(v))と反応する。その結果、C(C(s))は、Si2C又はSiC2等となってSiC原基板10表面から昇華する(C原子昇華工程)。
4)及び5)の説明:昇華したSi2C又はSiC2等が、温度勾配によって準閉鎖空間内のSiC材料40に到達し、結晶成長する。
このように、原子数比Si/Cが1を超える準閉鎖空間内で、SiC原基板10表面をエッチングすることにより、加工変質層12を除去すると共に、MSBを除去することができる。
結晶成長工程S20は、図4に示すように、SiC原基板10とSiC材料40とを相対させて配置し加熱することで、SiC材料40からSiC原基板10へ原料(Si元素、C元素、ドーパント)を輸送し、SiC基板層13を成長させる工程である。この結晶成長工程S20により、SiC原基板10の上にSiC基板層13を成長させたSiC基板体20を得る。
図4は、結晶成長工程S20の概要を示す説明図である。この結晶成長工程S20においては、SiC材料40が露出した準閉鎖空間にSiC原基板10を配置し、1400℃以上2300℃以下の温度範囲で加熱することで、以下1)~5)の反応が持続的に行われ、結果として結晶成長が進行すると考えられる。
2) 2C(s)+Si(v)→SiC2(v)
3) C(s)+2Si(v)→Si2C(v)
4) Si(v)+SiC2(v)→2SiC(s)
5) Si2C(v)→Si(v)+SiC(s)
2)及び3)の説明:Si原子(Si(v))が脱離することで残存したC(C(s))は、準閉鎖空間内のSi蒸気(Si(v))と反応する。その結果、C(C(s))は、Si2C又はSiC2等となって準閉鎖空間内に昇華する。
4)及び5)の説明:昇華したSi2C又はSiC2等が、温度勾配(又は化学ポテンシャル差)によってSiC原基板10のテラスに到達・拡散しステップに到達することで、下地のSiC原基板10の多型を引き継いで成長する(ステップフロー成長)。
そのため、特定のドーピング濃度のSiC基板30を得たい場合には、所望のドーピング濃度のSiC材料40を採用することで、得たいドーピング濃度のSiC基板30を製造することができる。
このように、原子数比Si/Cが1を超える準閉鎖空間内で結晶成長させることにより、SiC基板層13の表面にMSBが形成されることを抑制することができる。
このように、原子数比Si/Cが1以下の準閉鎖空間内で結晶成長させることにより、SiC基板層13中の基底面転位(Basal Plane Dislocation:BPD)を除去ないしは低減することができる。
剥離工程S30は、結晶成長工程S20で得られたSiC基板体20の一部を剥離し、SiC基板30を得る工程である。SiC基板30を剥離する手段としては、複数本のワイヤーを往復運動させることで切断するマルチワイヤーソー切断や、プラズマ放電を断続的に発生させて切断する放電加工法、結晶中にレーザーを照射・集光させて切断の基点となる層を形成するレーザーを用いて切断する手法、等を例示できる。
すなわち、他の実施形態に係るSiC基板の製造方法は、剥離されたSiC基板層13の加工変質層を除去するエッチング工程S10と、SiC基板層13上に他のSiC基板層13を成長させてSiC基板体20を得る結晶成長工程S20と、このSiC基板体20の一部を剥離する剥離工程S30と、をさらに含む。
また、SiC原基板10とSiC材料40とが相対する方向に沿って温度勾配が設けられていることにより、SiC原基板10の面内の温度分布が略均一となるよう容易に制御することができる。そのため、6インチ以上や8インチ以上といった大口径なSiC基板を製造することができる。
以下、本発明に係るSiC基板の製造方法を実現する製造装置について詳細に説明する。なお、この実施形態において、先の製造方法に示した構成と基本的に同一の構成要素については、同一の符号を付してその説明を簡略化する。
本体容器50は、互いに嵌合可能な上容器51及び下容器52と、を備える嵌合容器である。上容器51と下容器52の嵌合部には、微小な間隙53が形成されており、この間隙53から本体容器50内の排気(真空引き)が可能なよう構成されている。
図6及び図7においては、本体容器50を逆転させる例を示したが、加熱炉60の温度勾配を逆転させることで、同じSiC材料40の部分を用いることも可能である。
具体的には、化学量論比1:1を満たす多結晶SiCの本体容器50内に、化学量論比1:1を満たすSiC原基板10と、Si蒸気供給源55(Siペレット等)と、を配置した場合には、本体容器50内の原子数比Si/Cは1を超えることとなる。
具体的には、化学量論比1:1を満たす多結晶SiCの本体容器50内に、化学量論比1:1を満たすSiC原基板10と、を配置した場合には、本体容器50内の原子数比Si/Cは1となる。
加熱炉60は、図5に示すように、被処理物(SiC原基板10等)を1000℃以上2300℃以下の温度に加熱することが可能な本加熱室61と、被処理物を500℃以上の温度に予備加熱可能な予備加熱室62と、本体容器50を収容可能な高融点容器70と、この高融点容器70を予備加熱室62から本加熱室61へ移動可能な移動手段63(移動台)と、を備えている。
本加熱室61の内部には、加熱ヒータ64(メッシュヒーター)が備えられている。また、本加熱室61の側壁や天井には多層熱反射金属板が固定されている(図示せず。)。この多層熱反射金属板は、加熱ヒータ64の熱を本加熱室61の略中央部に向けて反射させるように構成されている。
なお、加熱ヒータ64としては、例えば、抵抗加熱式のヒータや高周波誘導加熱式のヒータを用いることができる。
このように急速昇温及び急速降温が行えるため、従来の装置では困難であった、昇温中及び降温中の低温成長履歴を持たない表面形状を観察することが可能である。
また、図3においては、本加熱室61の下方に予備加熱室62を配置しているが、これに限られず、何れの方向に配置しても良い。
すなわち、本実施形態の加熱炉60は、高融点容器70の底部が移動台と接触しているため、高融点容器70の上容器71から下容器72に向かって温度が下がるように温度勾配が設けられる。この温度勾配は、SiC原基板10の表裏方向に沿って形成されていることが望ましい。
また、上述したように、加熱ヒータ64の構成により、温度勾配を形成してもよい。また、この加熱ヒータ64により、温度勾配を逆転可能に構成しても良い。
加熱炉60は、Si元素を含む雰囲気を形成し、この雰囲気内で本体容器50を加熱可能であることが好ましい。本実施形態に係る加熱炉60内のSi元素を含む雰囲気は、高融点容器70及びSi蒸気供給源74を用いて形成している。
なお、本体容器50の周囲にSi元素を含む雰囲気を形成可能な方法であれば、当然に採用することができる。
この他にも、加熱処理時に高融点容器70内にSi元素を含む気相種の蒸気圧が形成される構成であれば採用することができる。
実施例1は、エッチング工程S10における加工変質層12の除去ないし低減を具体的に説明する実施例である。実施例2は、エッチング工程S10におけるMSBの除去ないし低減を具体的に説明する実施例である。実施例3は、結晶成長工程S20におけるMSBの除去ないし低減を具体的に説明する実施例である。実施例4は、結晶成長工程S20におけるBPDの除去ないし低減を具体的に説明する実施例である。実施例5及び実施例6は、結晶成長工程S20におけるドーピング濃度の制御について説明する実施例である。
SiC原基板10を本体容器50及び高融点容器70に収容し、以下の熱処理条件で熱処理した。
多型:4H-SiC
基板サイズ:横幅10mm×縦幅10mm×厚み0.45mm
オフ方向及びオフ角:<11-20>方向4°オフ
エッチング面:(0001)面
加工変質層12深さ:5μm
なお、加工変質層12の深さはSEM-EBSD法にて確認した。また、この加工変質層12は、TEMやμXRD、ラマン分光法で確認することもできる。
材料:多結晶SiC
容器サイズ:直径60mm×高さ4mm
基板保持具54の材料:単結晶SiC
SiC原基板10と本体容器50の底面の距離:2mm
容器内の原子数比Si/C:1以下
材料:TaC
容器サイズ:直径160mm×高さ60mm
Si蒸気供給源74(Si化合物):TaSi2
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1800℃
加熱時間:20min
エッチング量:5μm
温度勾配:1℃/mm
エッチング速度:0.25μm/min
本加熱室真空度:10-5Pa
SiC原基板10の格子歪みは、基準となる基準結晶格子と比較することにより求めることができる。この格子歪みを測定する手段としては、例えば、SEM-EBSD法を用いることができる。SEM-EBSD法は、走査電子顕微鏡(Scanning Electron Microscope:SEM)の中で、電子線後方散乱により得られる菊池線回折図形をもとに、微小領域の歪み測定が可能な手法(Electron Back Scattering Diffraction:EBSD)である。この手法では、基準となる基準結晶格子の回折図形と測定した結晶格子の回折図形を比較することで、格子歪み量を求めることができる。
SEM装置:Zeiss製Merline
EBSD解析:TSLソリューションズ製OIM結晶方位解析装置
加速電圧:15kV
プローブ電流:15nA
ステップサイズ:200nm
基準点R深さ:20μm
この図8(a)に示すように、エッチング工程S10の前においては、SiC原基板10内に深さ5μmの格子歪みが観察された。これは、機械加工時により導入された格子歪みであり、加工変質層12を有していることがわかる。なお、この図8(a)では圧縮応力が観測されている。
この図8(b)に示すように、エッチング工程S10の後においては、SiC原基板10内に格子歪みは観察されなかった。すなわち、エッチング工程S10により、加工変質層12が除去されたことがわかる。
なお、エッチング後のSiC原基板10の表面には、MSBが形成されていた。
SiC原基板10を本体容器50及び高融点容器70に収容し、以下の熱処理条件で熱処理した。
多型:4H-SiC
基板サイズ:横幅10mm×縦幅10mm×厚み0.3mm
オフ方向及びオフ角:<11-20>方向4°オフ
エッチング面:(0001)面
MSBの有無:有
材料:多結晶SiC
容器サイズ:直径60mm×高さ4mm
基板保持具54の材料:単結晶SiC
SiC原基板10と本体容器50の底面との距離:2mm
Si蒸気供給源55:単結晶Si片
容器内の原子数比Si/C:1を超える
材料:TaC
容器サイズ:直径160mm×高さ60mm
Si蒸気供給源74(Si化合物):TaSi2
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1900℃
加熱時間:60min
温度勾配:1℃/mm
エッチング速度:300nm/min
本加熱室真空度:10-5Pa
なお、テラス幅の値としては、撮影したSEM像のステップに対して垂直なラインを引き、このライン上に存在するステップ数をカウントすることで、テラス幅の平均値を算出し採用した(テラス幅=ライン長さ/ライン上のステップ数)。
SiC原基板10を本体容器50及び高融点容器70に収容し、以下の熱処理条件で熱処理した。
多型:4H-SiC
基板サイズ:横幅10mm×縦幅10mm×厚み0.3mm
オフ方向及びオフ角:<11-20>方向4°オフ
エッチング面:(0001)面
MSBの有無:有
材料:多結晶SiC
容器サイズ:直径60mm×高さ4mm
SiC原基板10と本体容器50の底面との距離:2mm
Si蒸気供給源55:単結晶Si片
容器内の原子数比Si/C:1を超える
材料:TaC
容器サイズ:直径160mm×高さ60mm
Si蒸気供給源74(Si化合物):TaSi2
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1800℃
加熱時間:60min
温度勾配:1℃/mm
成長速度:68nm/min
本加熱室61真空度:10-5Pa
SiC原基板10を本体容器50及び高融点容器70に収容し、以下の熱処理条件で熱処理した。
多型:4H-SiC
基板サイズ:横幅10mm×縦幅10mm×厚み0.3mm
オフ方向及びオフ角:<11-20>方向4°オフ
成長面:(0001)面
MSBの有無:無し
加工変質層12の有無:無し
材料:多結晶SiC
容器サイズ:直径60mm×高さ4mm
SiC原基板10とSiC材料40との距離:2mm
容器内の原子数比Si/C:1以下
材料:TaC
容器サイズ:直径160mm×高さ60mm
Si蒸気供給源74(Si化合物):TaSi2
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1700℃
加熱時間:300min
温度勾配:1℃/mm
成長速度:5nm/min
本加熱室61真空度:10-5Pa
図11は、SiC基板層13中において、BPDから他の欠陥・転位(TED等)に変換した変換率を求める手法の説明図である。
図11(a)は、結晶成長工程S20によりSiC基板層13を成長させた様子を示している。この加熱工程では、SiC原基板10に存在していたBPDが、ある確率でTEDに変換される。そのため、SiC基板層13の表面には、100%変換されない限り、TEDとBPDが混在していることとなる。
図11(b)は、KOH溶解エッチング法を用いてSiC基板層13中の欠陥を確認した様子を示している。このKOH溶解エッチング法は、約500℃に加熱した溶解塩(KOH等)にSiC基板を浸し、転位や欠陥部分にエッチピットを形成し、そのエッチピットの大きさ・形状により転位の種類を判別する手法である。この手法により、SiC基板層13表面に存在しているBPD数を得る。
図11(c)は、KOH溶解エッチング後にSiC基板層13を除去する様子を示している。本手法では、エッチピット深さまで機械研磨やCMP等により平坦化した後、熱エッチングによりSiC基板層13を除去して、SiC原基板10の表面を表出させている。
図11(d)は、SiC基板層13を除去したSiC原基板10に対し、KOH溶解エッチング法を用いてSiC原基板10中の欠陥を確認した様子を示している。この手法により、SiC原基板10表面に存在しているBPD数を得る。
すなわち、表面にMSBが存在しないSiC原基板10を、原子数比Si/Cが1以下である準閉鎖空間に配置して結晶成長させることにより、BPDが低減・除去されることが把握できる。
SiC原基板10を本体容器50及び高融点容器70に収容し、以下の熱処理条件で熱処理した。
多型:4H-SiC
基板サイズ:横幅10mm×縦幅10mm×厚み0.3mm
オフ方向及びオフ角:<11-20>方向4°オフ
成長面:(0001)面
ドーパント:N
ドーピング濃度:3×1018cm-3
MSBの有無:無し
加工変質層12の有無:無し
材料:多結晶SiC
容器サイズ:直径60mm×高さ4mm
SiC原基板10とSiC材料40との距離:2mm
ドーパント:N
ドーピング濃度:1×1017cm-3以下(ラマン分光法検出限界以下)
容器内の原子数比Si/C:1以下
材料:TaC
容器サイズ:直径160mm×高さ60mm
Si蒸気供給源74(Si化合物):TaSi2
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1700℃
加熱時間:300min
温度勾配:1℃/mm
成長速度:5nm/min
本加熱室61真空度:10-5Pa
以下の条件で、SiC原基板10を本体容器50及び高融点容器70に収容した。
実施例5と同様のSiC原基板10を用いた。
実施例5と同様の本体容器50を用いた。
実施例5と同様の高融点容器70を用いた。
上記条件で配置したSiC原基板10を、以下の条件で加熱処理した。
加熱温度:1800℃
加熱時間:60min
温度勾配:1℃/mm
成長速度:50nm/min
エッチング速度:50nm/min
本加熱室61真空度:13Pa(N2ガス導入)
この実施例6のSiC基板層13厚みは3μmであった。
図14(a)は、本発明のエッチング工程における、加熱温度とエッチング速度の関係を示すグラフである。このグラフの横軸は温度の逆数であり、このグラフの縦軸はエッチング速度を対数で表示している。
図14(b)は、本発明の結晶成長工程における、加熱温度と成長速度の関係を示すグラフである。このグラフの横軸は温度の逆数であり、このグラフの縦軸は成長速度を対数で表示している。
以下、エッチング工程の熱力学計算と、結晶成長工程の熱力学計算に分けて詳細に説明する。
エッチング工程の熱力学計算においては、本体容器50を加熱した際に、SiC原基板10から発生する蒸気量(Si元素を含む気相種及びC元素を含む気相種)をエッチング量に換算できる。その場合、SiC原基板10のエッチング速度は、以下の数1で求められる。
また、Piは、SiC原基板10が加熱されることで本体容器50内に発生する蒸気圧を足し合わせた値のことである。なお、Piの気相種としては、SiC,Si2C,SiC2等が想定される。
なお、熱力学計算に用いた各化学種のデータはJANAF熱化学表の値を採用した。
また、SiC原基板10を原子数比Si/Cが1以下である空間(本体容器50内)に配置して、SiC原基板10をエッチングした結果(×印)は、SiC-C平衡蒸気圧環境における単結晶SiCエッチングの熱力学計算の結果と傾向が一致していることがわかる。
一方で、SiC-C平衡蒸気圧環境下でエッチングされた×印箇所の条件においては、MSBが形成されていることがわかる。
次に、結晶成長工程の熱力学計算においては、本体容器50内の加熱した際に、SiC原料とSiC基板から発生する蒸気の分圧差を成長量に換算できる。この時の成長駆動力としては、化学ポテンシャル差や温度勾配を想定できる。なお、この化学ポテンシャル差は、多結晶SiC(SiC材料40)と単結晶SiC(SiC原基板10)の表面で発生する気相種の分圧差を想定できる。その場合、SiCの成長速度は以下の数2で求められる。
また、P原料-P基板は、原料ガスが過飽和な状態となって、SiCとして析出した成長量であり、原料ガスとしてはSiC,Si2C,SiC2が想定される。
具体的には、数2を用いて、以下の条件(i)~(iv)で熱力学計算を行った。(i)体積一定のSiC-Si平衡蒸気圧環境であること、(ii)成長駆動力は、本体容器50内の温度勾配と、多結晶SiCと単結晶SiCの蒸気圧差(化学ポテンシャル差)であること、(iii)原料ガスは、SiC,Si2C,SiC2であること、(iv)原料がSiC原基板10のステップに吸着する吸着係数は0.001であること。
具体的には、数2を用いて、以下の条件(i)~(iv)で熱力学計算を行った。(i)体積一定のSiC-C平衡蒸気圧環境であること、(ii)成長駆動力は、本体容器50内の温度勾配と、多結晶SiCと単結晶SiCの蒸気圧差(化学ポテンシャル差)であること、(iii)原料ガスは、SiC,Si2C,SiC2であること、(iv)原料がSiC原基板10のステップに吸着する吸着係数は0.001であること。
なお、熱力学計算に用いた各化学種のデータはJANAF熱化学表の値を採用した。
また、SiC原基板10を原子数比Si/Cが1以下である空間(本体容器50内)に配置して、SiC原基板10にSiC基板層13を成長させた結果(×印)は、SiC-C平衡蒸気圧環境におけるSiC成長の熱力学計算の結果と傾向が一致していることがわかる。
一方、SiC-C平衡蒸気圧環境下においては、2000℃の加熱温度で1.0μm/min以上の成長速度を達成することが推定される。また、2030℃以上の加熱温度で2.0μm/min以上の成長速度を達成することが推定される。
11 バルク層
12 加工変質層
13 SiC基板層
20 SiC基板体
30 SiC基板
40 SiC材料
50 本体容器
51 上容器
52 下容器
53 間隙
54 基板保持具
55 Si蒸気供給源
60 加熱炉
61 本加熱室
62 予備加熱室
63 移動手段
64 加熱ヒータ
65 真空形成用バルブ
66 不活性ガス注入用バルブ
67 真空計
70 高融点容器
71 上容器
72 下容器
73 間隙
74 Si蒸気供給源
S1 原料輸送空間
X エッチング空間
Y 結晶成長空間
S10 エッチング工程
S20 結晶成長工程
S30 剥離工程
S31 レーザー照射工程
S32 分離工程
Claims (12)
- SiC原基板をエッチングするエッチング工程と、
前記SiC原基板の上にSiC基板層を成長させてSiC基板体を得る結晶成長工程と、
前記SiC基板体の一部を剥離してSiC基板を得る剥離工程と、を含み、
前記エッチング工程及び前記結晶成長工程は、前記SiC原基板とSiC材料とを相対させて配置し、前記SiC原基板と前記SiC材料との間に温度勾配が形成されるよう加熱する工程である、SiC基板の製造方法。 - 前記エッチング工程及び前記結晶成長工程は、前記SiC原基板及び前記SiC材料をSi元素及びC元素を含む雰囲気下で加熱する工程である、請求項1に記載のSiC基板の製造方法。
- 前記エッチング工程及び前記結晶成長工程は、前記SiC原基板及び前記SiC材料を準閉鎖空間内で加熱する工程である、請求項1又は請求項2に記載のSiC基板の製造方法。
- 前記エッチング工程及び前記結晶成長工程は、前記SiC材料を含む本体容器内に前記SiC原基板を配置して加熱する工程である、請求項1~3の何れか一項に記載のSiC基板の製造方法。
- 前記エッチング工程は、前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が高温側、前記SiC材料が低温側となるよう加熱する工程である、請求項1~4の何れか一項に記載のSiC基板の製造方法。
- 前記エッチング工程は、原子数比Si/Cが1を超える準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が高温側、前記SiC材料が低温側となるよう加熱する工程を含む、請求項1~5の何れか一項に記載のSiC基板の製造方法。
- 前記結晶成長工程は、前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が低温側、前記SiC材料が高温側となるよう加熱する工程である、請求項1~6の何れか一項に記載のSiC基板の製造方法。
- 前記結晶成長工程は、原子数比Si/Cが1を超える準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が低温側、前記SiC材料が高温側となるよう加熱する工程を含む、請求項1~7の何れか一項に記載のSiC基板の製造方法。
- 前記結晶成長工程は、原子数比Si/Cが1以下の準閉鎖空間内に前記SiC原基板と前記SiC材料とを相対させて配置し、前記SiC原基板が低温側、前記SiC材料が高温側となるよう加熱する工程を含む、請求項1~8の何れか一項に記載のSiC基板の製造方法。
- 前記剥離工程は、前記SiC基板体にダメージ層を導入するレーザー照射工程と、
前記ダメージ層を起点に分離する分離工程と、を有する、請求項1~9の何れか一項に記載のSiC基板の製造方法。 - 剥離された前記SiC原基板をエッチングするエッチング工程と、
前記SiC原基板の上にSiC基板層を成長させてSiC基板体を得る結晶成長工程と、
前記SiC基板体の一部を剥離する剥離工程と、をさらに含む、請求項1~10の何れか一項に記載のSiC基板の製造方法。 - 剥離された前記SiC基板層をエッチングするエッチング工程と、
前記SiC基板層の上に他のSiC基板層を成長させてSiC基板体を得る結晶成長工程と、
前記SiC基板体の一部を剥離する剥離工程と、をさらに含む、請求項1~11の何れか一項に記載のSiC基板の製造方法。
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| EP20849437.7A EP4012077A4 (en) | 2019-08-06 | 2020-08-05 | Sic substrate production method |
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Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008074664A (ja) * | 2006-09-21 | 2008-04-03 | Nippon Steel Corp | エピタキシャル炭化珪素単結晶基板及びその製造方法 |
| JP2013049161A (ja) | 2011-08-30 | 2013-03-14 | Hamamatsu Photonics Kk | 加工対象物切断方法 |
| JP2015024932A (ja) | 2013-07-24 | 2015-02-05 | トヨタ自動車株式会社 | SiC基板の製造方法 |
| JP2015179082A (ja) | 2014-02-28 | 2015-10-08 | 学校法人関西学院 | 走査型電子顕微鏡観察コントラスト校正用標準試料及び走査型電子顕微鏡を用いた結晶性基板の検査方法 |
| JP2016015463A (ja) * | 2014-06-10 | 2016-01-28 | エルシード株式会社 | SiC材料の加工方法及びSiC材料 |
| WO2016114382A1 (ja) * | 2015-01-16 | 2016-07-21 | 住友電気工業株式会社 | 半導体基板の製造方法、半導体基板、複合半導体基板の製造方法、複合半導体基板、および半導体接合基板 |
| JP2017500725A (ja) | 2013-10-08 | 2017-01-05 | シルテクトラ ゲゼルシャフト ミット ベシュレンクター ハフトゥング | レーザー処理及び温度誘導ストレスを用いた複合ウェハー製造方法 |
| WO2017018533A1 (ja) * | 2015-07-29 | 2017-02-02 | 新日鐵住金株式会社 | エピタキシャル炭化珪素単結晶ウェハの製造方法 |
| JP2017526161A (ja) | 2014-11-27 | 2017-09-07 | シルテクトラ ゲゼルシャフト ミット ベシュレンクター ハフトゥング | 物質変化による固体分離 |
| WO2017188381A1 (ja) * | 2016-04-28 | 2017-11-02 | 学校法人関西学院 | 気相エピタキシャル成長方法及びエピタキシャル層付き基板の製造方法 |
| JP2018158858A (ja) * | 2017-03-22 | 2018-10-11 | 日本電信電話株式会社 | 結晶成長方法および装置 |
| WO2018211737A1 (ja) * | 2017-05-17 | 2018-11-22 | 三菱電機株式会社 | SiCエピタキシャルウエハおよびその製造方法 |
| JP2018207034A (ja) | 2017-06-08 | 2018-12-27 | 株式会社ディスコ | ウエーハ生成装置 |
| JP2019026500A (ja) * | 2017-07-28 | 2019-02-21 | 東洋炭素株式会社 | 単結晶SiCの製造方法、SiCインゴットの製造方法、SiCウエハの製造方法、及び単結晶SiC |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| ATE546569T1 (de) * | 2002-03-19 | 2012-03-15 | Central Res Inst Elect | Verfahren zur herstellung von sic-kristall |
| JP5297219B2 (ja) * | 2008-02-29 | 2013-09-25 | 信越化学工業株式会社 | 単結晶薄膜を有する基板の製造方法 |
| JP4987792B2 (ja) | 2008-04-17 | 2012-07-25 | 新日本製鐵株式会社 | エピタキシャル炭化珪素単結晶基板の製造方法 |
| EP2471981A4 (en) * | 2009-08-27 | 2013-04-17 | Nippon Steel & Sumitomo Metal Corp | SILICON SINGLE CRYSTAL WAFER AND MANUFACTURING METHOD THEREFOR |
| JP2011051861A (ja) * | 2009-09-04 | 2011-03-17 | Sumitomo Electric Ind Ltd | AlN単結晶の製造方法および種基板 |
| JP6282512B2 (ja) * | 2014-03-31 | 2018-02-21 | 東洋炭素株式会社 | SiC基板の潜傷深さ推定方法 |
| WO2016079984A1 (ja) * | 2014-11-18 | 2016-05-26 | 学校法人関西学院 | SiC基板の表面処理方法 |
| CN107004592B (zh) * | 2014-11-18 | 2020-12-08 | 东洋炭素株式会社 | 碳化硅基板的蚀刻方法及收容容器 |
| JP2017037944A (ja) * | 2015-08-07 | 2017-02-16 | エルシード株式会社 | 蛍光SiC材料の気相成長装置及び蛍光SiC材料の気相成長方法 |
| CN109071231B (zh) | 2016-04-27 | 2022-07-26 | 学校法人关西学院 | 带有石墨烯前驱体的SiC基板的制备方法和SiC基板的表面处理方法 |
| JP6795811B2 (ja) * | 2017-02-16 | 2020-12-02 | 国立大学法人埼玉大学 | 剥離基板製造方法 |
| CN110691671B (zh) | 2017-04-20 | 2023-10-10 | 西尔特克特拉有限责任公司 | 用于具有限定地定向的改性线的晶片制造的方法 |
-
2020
- 2020-08-05 EP EP20849437.7A patent/EP4012077A4/en active Pending
- 2020-08-05 WO PCT/JP2020/030080 patent/WO2021025086A1/ja not_active Ceased
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- 2020-08-05 CN CN202080055175.6A patent/CN114342045B/zh active Active
- 2020-08-06 TW TW109126625A patent/TWI899095B/zh active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008074664A (ja) * | 2006-09-21 | 2008-04-03 | Nippon Steel Corp | エピタキシャル炭化珪素単結晶基板及びその製造方法 |
| JP2013049161A (ja) | 2011-08-30 | 2013-03-14 | Hamamatsu Photonics Kk | 加工対象物切断方法 |
| JP2015024932A (ja) | 2013-07-24 | 2015-02-05 | トヨタ自動車株式会社 | SiC基板の製造方法 |
| JP2017500725A (ja) | 2013-10-08 | 2017-01-05 | シルテクトラ ゲゼルシャフト ミット ベシュレンクター ハフトゥング | レーザー処理及び温度誘導ストレスを用いた複合ウェハー製造方法 |
| JP2015179082A (ja) | 2014-02-28 | 2015-10-08 | 学校法人関西学院 | 走査型電子顕微鏡観察コントラスト校正用標準試料及び走査型電子顕微鏡を用いた結晶性基板の検査方法 |
| JP2016015463A (ja) * | 2014-06-10 | 2016-01-28 | エルシード株式会社 | SiC材料の加工方法及びSiC材料 |
| JP2017526161A (ja) | 2014-11-27 | 2017-09-07 | シルテクトラ ゲゼルシャフト ミット ベシュレンクター ハフトゥング | 物質変化による固体分離 |
| WO2016114382A1 (ja) * | 2015-01-16 | 2016-07-21 | 住友電気工業株式会社 | 半導体基板の製造方法、半導体基板、複合半導体基板の製造方法、複合半導体基板、および半導体接合基板 |
| WO2017018533A1 (ja) * | 2015-07-29 | 2017-02-02 | 新日鐵住金株式会社 | エピタキシャル炭化珪素単結晶ウェハの製造方法 |
| WO2017188381A1 (ja) * | 2016-04-28 | 2017-11-02 | 学校法人関西学院 | 気相エピタキシャル成長方法及びエピタキシャル層付き基板の製造方法 |
| JP2018158858A (ja) * | 2017-03-22 | 2018-10-11 | 日本電信電話株式会社 | 結晶成長方法および装置 |
| WO2018211737A1 (ja) * | 2017-05-17 | 2018-11-22 | 三菱電機株式会社 | SiCエピタキシャルウエハおよびその製造方法 |
| JP2018207034A (ja) | 2017-06-08 | 2018-12-27 | 株式会社ディスコ | ウエーハ生成装置 |
| JP2019026500A (ja) * | 2017-07-28 | 2019-02-21 | 東洋炭素株式会社 | 単結晶SiCの製造方法、SiCインゴットの製造方法、SiCウエハの製造方法、及び単結晶SiC |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP4012077A4 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4415025A4 (en) * | 2021-10-05 | 2025-10-08 | Kwansei Gakuin Educational Found | METHOD FOR PROVIDING DOPANT ACTIVATION RATES AND STRUCTURE CREATED BY SAID METHOD |
| EP4415026A4 (en) * | 2021-10-05 | 2025-10-22 | Kwansei Gakuin Educational Found | METHOD FOR OBTAINING A UNIFORM CONCENTRATION OF CHARGE CARRIERS IN AN EPITAXIAL LAYER, AND STRUCTURE CREATED BY MEANS OF SAID METHOD |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114342045A (zh) | 2022-04-12 |
| CN114342045B (zh) | 2025-09-19 |
| US20220290324A1 (en) | 2022-09-15 |
| EP4012077A1 (en) | 2022-06-15 |
| US12098476B2 (en) | 2024-09-24 |
| JPWO2021025086A1 (ja) | 2021-02-11 |
| TW202120753A (zh) | 2021-06-01 |
| JP7723235B2 (ja) | 2025-08-14 |
| TWI899095B (zh) | 2025-10-01 |
| EP4012077A4 (en) | 2023-09-20 |
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