WO2024200079A1 - Dispositif optoélectronique et son procédé de traitement - Google Patents

Dispositif optoélectronique et son procédé de traitement Download PDF

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Publication number
WO2024200079A1
WO2024200079A1 PCT/EP2024/057198 EP2024057198W WO2024200079A1 WO 2024200079 A1 WO2024200079 A1 WO 2024200079A1 EP 2024057198 W EP2024057198 W EP 2024057198W WO 2024200079 A1 WO2024200079 A1 WO 2024200079A1
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Prior art keywords
layer
sidewalls
doped
mesa
semiconductor layer
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English (en)
Inventor
Martin Hetzl
Norwin Von Malm
Philipp Kreuter
Tansen VERGHESE
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Ams Osram International GmbH
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Ams Osram International GmbH
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Priority to KR1020257036053A priority Critical patent/KR20250166300A/ko
Publication of WO2024200079A1 publication Critical patent/WO2024200079A1/fr
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/034Manufacture or treatment of coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/819Bodies characterised by their shape, e.g. curved or truncated substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/819Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/82Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/84Coatings, e.g. passivation layers or antireflective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment

Definitions

  • the present invention concerns an optoelectronic device , in particular a pLED for data communication and a method of processing the same .
  • pLEDs for optical and data communication has several benefits .
  • the vertical optoelectronic components provide an improved scalability and can be easily implemented in existing designs at large numbers .
  • a pLED is an optoelectronic component that comprises a diameter or more general a dimension that is smaller than 50 pm and in particular smaller than 20 pm.
  • a pLED can range in diameter between 2 pm and 10 pm. pLEDs in comparison to conventional LEDs with larger sizes further require a very low current resulting in an overall low power consumption, thereby reducing the amount of heat generated during operation .
  • the radiative recombination rate is substantially proportional to the product of the charge carrier concentrations in the active layer . Therefore , a high concentration of charge carriers in the active region decreases the radiative recombination time and the probability of the non-radiative recombination . This effect can be further enhanced by using quantum well structures and multi-quantum well structures , thus confining the charge carriers to a small region due to the bandgap structure .
  • an optoelectronic device comprises a semiconductor layer stack .
  • the semiconductor layer stack includes a first doped layer having a first doping type and a second doped layer having a second doping type .
  • the first doping type can for example include an n-type doping
  • the second doping type may include a respective p-type doping .
  • the first and second doped layer may comprise a plurality of sub-layers including different doping concentrations and doping profiles , respectively .
  • doped sub-layers opposite an active layer or region may comprise a higher doping concentration suitable for current distribution across the overall area of the respective doped layer .
  • An active layer is arranged between the first and second doped layer .
  • the second doped layer may comprise a simple pn- j unction .
  • the active layer may comprise a quantum well layer .
  • the active layer may include a multi-quantum well structure having a plurality of alternating barrier layers and quantum well layers , respectively .
  • the material for the semiconductor layer stack comprises gallium arsenide , GaAs or aluminum gallium arsenide AlGaAs . Said combination of materials is suitable to emit light in the red, and infrared portion of the spectra .
  • the aluminum content of the aluminum gallium arsenide Al x Gai x As layers within the layer stack may vary with parameter x and can be in the range between 0% and 70% , respectively .
  • the Al content varies depending on the colour and can reach up to 80% in the outer layers with decreasing Al content in the direction of the active layer , with longer wavelengths , i . e .
  • the Al content can be 30 % and less .
  • the active layer may comprise no Al content or less than 10% in some further aspects , the active layer may comprise InGaAs with an In content from 0% to 50% .
  • an active layer may comprise a multi-quantum well with its barrier layers having an Al content of larger than 10% and its quantum well layers having an Al content of less than 10% .
  • the semiconductor layer stack comprises mesa etched sidewalls , extending from the first doped layer to the second doped layer , the mesa-etches sidewalls also referred to a mesa facets .
  • the mesa etched sidewalls can be inclined with a varying degree of inclination .
  • the mesa facets extend along a certain crystal direction, in particular in a direction that generates only a few natural non radiative recombination centres .
  • the inclination of the sidewalls can change .
  • the inclination of the sidewalls close to the active region may be smaller than an inclination further away and particularly on one of the first and second doped layer , respectively .
  • a functional structure is arranged and deposited on the surface of the mesa etched sidewalls at least at the region of the active layer .
  • the functional structure is configured to cause a reduction of the radiative recombination lifetime .
  • this is achieved by inducing a controlled density of non- radiative recombination centres at the sidewalls and the parameter of the active layer .
  • the functional structure can be attached on the surface that is on the mesa facet of the active layer but can also form an integral part of the surface itself .
  • the functional structure comprises one of carbon, nitrogen and oxygen atoms or molecules that terminate the dangling bonds of the surface .
  • the functional structure is configured to cause a band bending of the active layer close to the surface or mesa facets .
  • the non radiative recombination centres are located within the bandgap .
  • the functional structure comprises a surface , which is roughened by a controlled plasma etching process .
  • the controlled plasma etching process is different from a process for cleaning the mesa facets and sidewalls of the semiconductor layer stack after the mesa etching process itself . While the purpose of the latter is actually to reduce the density of non-radiative recombination centres and anneal the mesa facets and sidewalls , the surface roughening by the controlled plasma etching process deliberately induces surface states with a non-radiative recombination characteristics . It has been found that the mesa etching results in a kind of unpredictable density of states and therefore a cleaning and annealing process might be suitable . In this regard, damages caused by the mesa etching step on the sidewalls can be cleaned and removed in some aspects using NH3 or NH4OH . This will clean the sidewalls providing a defined base for the subsequent application of the functional structure .
  • the plasma damage induced by the etching process can be controlled by the concentration of the plasma used for the process , the temperature as well as the plasma content and time duration for the process .
  • a material for the process can be used, which is more selective to the material of the active layer than to other layers .
  • the plasma etching process includes the incorporation of carbon, nitrogen or oxygen onto the surface of the layer stack .
  • an oxidation layer is deposited on the surface of the mesa etched sidewalls and the mesa facets at least at the active layer .
  • the oxidation layer may also extend across the first and second doped layers .
  • the oxidation layer can be generated by either depositing an oxidized material directly on the surface or by an active oxidation of the surface of the semiconductor stack itself using an oxygen containing material . Similar to the previous embodiment , the level of oxidation as well as the depth into the active layer is controlled and results in a defined density and distribution of non-radiative recombination centres .
  • a dielectric material for example , comprising oxygen or an oxidized material can be deposited on the surface of the mesa etched sidewalls and the mesa facets , respectively .
  • Such layer may terminate the dangling bonds of the surface forming defined interface states , which cause non-radiative recombination .
  • a layer is deposited containing one of nitrogen, oxygen and carbon . In this regard, the layer can be deposited and subsequently oxidized for example , in an oven or the like .
  • the functional structure comprises a functional layer on the mesa facets and the surface of the mesa etched sidewalls at least at the active layer .
  • the functional layer is covered by an epitaxially regrown encapsulation layer disposed directly on the functional layer .
  • the encapsulation layer can extend along the sidewalls of the semiconductor layer stack thereby covering the functional layer completely as well as partially onto the top surface of the semiconductor layer stack .
  • the regrown encapsulation layer can comprise a nitride or an oxide , for example , an A12O3 layer and or AIN layer .
  • the respective encapsulation layer can be processed by regrowth but also synthesized by reactive ion plasma sputtering process or any other suitable means .
  • the functional structure can further comprise a reflective material .
  • the functional structure comprises a dielectric oxide containing layer .
  • the dielectric oxide containing layer is disposed on the sidewalls of the semiconductor layer stack for example by a respective regrowth or sputtering process .
  • the dielectric oxide containing layer extends partially onto the top surface of the semiconductor layer stack .
  • the dielectric oxide containing layer can comprise one of Si02 , Nb2O5 , HfO2 or SiOH for example .
  • the functional structure comprises a dielectric nitride containing layer . This layer may include SiN for example .
  • the deposition of the dielectric material forms charged interface states , which provide static non-radiative recombination centres . These are formed on the sidewalls of at least at the active layer acting as traps for the charge carriers , preferably within the bandgap of the active layer material , thereby reducing the radiative recombination lifetime .
  • the functional structure comprises a regrown and subsequently oxidized Al x Gai- x As layer disposed on the sidewalls of the semiconductor layer stack .
  • the oxidized Al x Gai x As layer may extend partially onto the top surface of the semiconductor layer stack .
  • the aluminum content in Al x Gai x As layer prior to oxidation is chosen to be larger than 50% in regard to the Ga content (parameter x>0 . 50 ) and particularly more than 90% (parameter x>0 . 90 ) and more particularly, more than 97% (parameter x>0 . 97 ) .
  • the regrown layer comprises Al 0 . 98 Ga 0 .
  • material which is 98% aluminum . Due to the very high aluminum content , the band gap of the provided layer prior and after oxidation is large enough to avoid any shortcut between the differently doped first and second layer . Furthermore, due to the oxygen being present , the aluminum is oxidized resulting in a dielectric material forming a defined concentration of the non- radiative recombination centres at the mesa facet of the active layer .
  • the semiconductor layer stack comprises a first and second, - in particular- undoped cladding layer .
  • the cladding layers are located directly adj acent to the active region and may comprise , for example undoped aluminum gallium arsenide .
  • the cladding layer is usually used to prevent an undesired diffusion of dopants from the doped first and second layers into the active region .
  • the thickness of the cladding layer may range from a few nm to a few 10 nm.
  • the active layer comprises a multi-quantum well structure having a plurality of alternating barrier layers and quantum well layers .
  • the barrier layers comprise a higher Al content than the adj acent quantum well layers .
  • at least two barrier layers can comprise a doping level in the range of lel 6 1/cm 3 to lel8 1 /cm 3 . Similar to the previous embodiment , the charge carrier density in the barrier layers is increased, thereby reducing the radiative lifetime .
  • the functional structure generated on the cleaned sidewalls is configured to cause a band bending of the band structure of the active layer close to the surface .
  • functional structure generates a plurality of non-radiative recombination centres located with their respective energy states within a band gap of the active layer . In operation, charge carriers populate these states located in the "forbidden" zone and can recombine non-radiatively .
  • generating the functional structure comprises roughening the cleaned surface by a controlled plasma etching process .
  • the parameter of the plasma etching process are adj usted as to form a defined number of dangling bonds and centres with their energy states within the band gap .
  • a reflective layer can also be deposited on the functional structure in order to reflect light emitted towards the side to the main emission surface .
  • FIGS. 1A to 1C illustrate some steps of a method for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figures 2A and 2B show some further steps of a method for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figure 3 illustrates an alternative method step for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figures 4A and 4B illustrate some steps of a further embodiment of a method step for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figures 5A and 5B show some steps of yet another embodiment of a method step for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figures 6A and 6B show some steps of yet another embodiment of a method step for processing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figures 7A to 7C illustrate some aspects concerning further measures for reducing the charge carrier lifetime in combination with some aspects of the proposed principle .
  • Figure 1A illustrates the epitaxial deposition of a semiconductor layer stack 10 on the respective growth substrate 20 .
  • the growth substrate 20 comprises an n-doped gallium arsenide layer , which acts as wafer substrate , on which the subsequent layers are epitaxially deposited .
  • the n-doped gallium arsenide substrate may comprise a plurality of buffer layers to smooth and flattening its surface , such as to provide a substantially defect free surface .
  • an n-doped aluminum gallium arsenide layer 11 is epitaxially deposited on the surface of the growth substrate .
  • the layer 11 can comprise a doping distribution and/or a varying doping concentration based on the required needs .
  • the doping concentration closer to the growth substrate 20 may be larger than further away to improve the charge carrier inj ection into the aluminum gallium arsenide layer 11 .
  • the aluminum content of layer 11 may vary and also comprise a respective distribution over the thickness of layer 11 .
  • layer 11 can include one or more sublayers , in which the above-mentioned varying concentrations and distributions of dopants and Al content are implemented .
  • an undoped aluminum gallium arsenide cladding layer 12 is deposited on top of layer 11 .
  • the aluminum content of that layer may be similar to the aluminum content of layer 11 directly adj acent to it but can also vary to improve the charge carrier transport diffusion into the active layer 13 epitaxially deposited on top of placing layer 12 .
  • the thickness of cladding layer 12 is in the range between 10 nm and 50 nm .
  • the purpose of cladding layer 12 is to prevent diffusion of dopants from layer 11 into the active layer 13 .
  • Active layer 13 is covered by another cladding layer 14 of aluminum gallium arsenide similar to the first cladding layer 12 .
  • one of the cladding layers 12 and 14 may comprise a different , maybe higher Al content than the doped layer to act as an charge carrier barrier, in order to contain the charge carrier within the active layer , however , such implementation may be irrelevant if a multi-quantum well structure is used .
  • a p-doped layer 15 is deposited on top of the cladding layer 14 . Similar to the n-doped layer 11 , the doping concentration as well as the doping distribution of the p-doped aluminum gallium arsenide layer 15 may vary .
  • both layers 11 and 15 may not only comprise aluminum gallium arsenide sublayers , but can also include one or more gallium arsenide sub-layers or aluminum gallium arsenide sub-layers with varying aluminum content .
  • the purpose of these sublayers is to distribute the inj ected charge carriers across the overall area of the semiconductor layer stack 10 and will provide a continuous and equally distributed diffusion towards the active region .
  • the top surface of layer 15 is covered by a highly doped gallium arsenide contact layer 16 .
  • the contact layer 16 provides not only a connection to a conductive metal or a transparent conductive oxide , but also acts as the main emission surface in operation of the device later on .
  • FIG. IB The next step of the proposed method is illustrated in Figure IB .
  • a mas k layer material is deposited on the p-doped gallium arsenide contact layer 16 and subsequently structured to form a central portion of the hard mas k layer 21 .
  • the central portion forms a circle , a rectangle , or any other polygon like a hexagon structure .
  • one or more mesa etching steps are performed to provide inclined sidewalls 17 exposing the facets of active layer 13 as well as the two doped layers 11 and 15 , respectively .
  • the results of the mesa etching process is illustrated in Figure 2C and can be achieved by several subsequent mesa etching steps .
  • the surface of the active layer 13 is cleaned and annealed after the first etching step to remove any plasma damages from the surface of active layer 13 .
  • a small A12O3 is deposited on the exposed surface areas to prevent damages from the respective surfaces .
  • the A12O3 layer is removed and a further yet optional cleaning process using NH3and NH4OH, any residual material is removed from the surface of the inclined sidewalls .
  • NH3and NH4Oh can also be used in the first cleaning and annealing step .
  • the surface is subsequently covered after annealing with a thin layer of A12O3 to protect the annealed surface against the etchant of the next step .
  • a subsequent etching process is then conducted to remove material from the n-doped layer 11 , resulting in the same inclination or in a different inclination depending on the desired layer stack structure .
  • the existing A12O3 layer for protecting the side walls and mesa facets of the active layer 13 is then removed and the sidewalls prepared to provide defined state of the mesa facets . This can be achieved for example by the above-mentioned cleaning processes and any other suitable means .
  • the processing of a functional structure as shown in the following embodiments can cause a variety of different states , resulting in an increased non radiative recombination ratio at the perimeter .
  • simple defects are introduced .
  • the functional structure causes a band bending of the active layer close to the perimeter with the energetic states of the non- radiative recombination centres being located within the bandgap . The latter can also be implemented without a significant band bending .
  • FIGS. 2A) and 2B illustrate a possible embodiment thereof .
  • a functional layer 30 is generated on the sidewalls of the layer stack 10 as well as the top surface of the p-doped gallium arsenide contact .
  • a controlled plasma etching process is conducted to induce a defined level of equally distributed damages across the surface of the inclined sidewalls . The damage results in dangling a bonds and other defects causing non-radiative recombination at those locations and along the perimeter of the mesa facet of layer 13 .
  • nitrogen, oxygen or carbon is added to saturate the dangling bonds .
  • the thickness of the surface structure 30 which can range from a few nanometres to approximately 30 nm .
  • an oxidation layer can be deposited on the surface acting as the functional structure 30 .
  • the functional structure 30 can also be implemented by oxidizing the surface of the mesa facets of layer stack 10 .
  • the layer stack 10 is then encapsulated to protect the functional structure 13 via an epitaxially regrowth layer depositing a dielectric material on the functional layer as well as on the top surface of layer stack 10 .
  • the dielectric material is regrown with a thickness of several 10 nm to several hundred nm .
  • the dielectric material can be further covered by a reflective material to prevent a side emission .
  • the dielectric material at the top surface is then at least partially removed together with the functional structure 13 to provide a recess 33 and an opening therein .
  • the recess 33 and opening acts as the main emission surface for the optoelectronic device .
  • the material of the encapsulation layer 31 can be removed from the top surface completely or only partially as indicated in Figure 2 .
  • FIG. 3 illustrates an alternative embodiment after processing the layer stack providing the cleaned mesa etched sidewalls .
  • a dielectric layer 40 is deposited on the inclined sidewalls as well as partially on the surface to form a plurality of charged interface states . These interface states act as stationary a non-radiative recombination centres at which the charge carriers recombine non-radiatively during operation of the device reducing the overall radiation recombination time .
  • the dielectric material 40 is deposited using for instance a sputtering process or- when implementing pLEDs- a chemical vapor deposition, gas phase deposition or physical vapor deposition process .
  • two or more precursors can be added into the reactor chamber causing a chemical reaction of the respective components on the sidewalls forming the dielectric material .
  • Typical materials suitable for such dielectric material on the inclined surface contain SiO2 , Nb2O5 , HfO2 and SIN or SION . Consequently, the required precursors require an oxygen donor .
  • the overall thickness of the dielectric layer 40 and 41 can be is small in the range of a few of 10 nm up to a couple of hundred nanometres .
  • the concentration of charged interface states depends on the amount and concentration during the deposition process and the deposition parameters .
  • mask is disposed on the top surface and the dielectric material on the top surface partially removed to form recess 33 as main emission surface .
  • another a dielectric layer can be disposed on the dielectric material for further protection .
  • an aluminum gallium arsenide layer as indicated in Figure 4 has the benefit that the overall material system does not need to be changed, but the respective aluminum content varied . Consequently, the optoelectronic device can be a processed completely within the epitaxial deposition chamber , until the aluminum gallium arsenide layer 50 is deposited and then moved to the oxygen containing atmosphere .
  • an epitaxial layer stack 10 is deposited on a growth substrate 20 similar to the previous embodiments .
  • very thin layers 53 and 54 containing aluminum gallium arsenide with a high aluminum content are introduced between the doped layer 11 and the respective cladding layer 12 or more generally between the doped layer 11 and the active layer 13 .
  • the aluminum content of the Al x Gai x As layers 53 and 55 comprise a very high aluminum content with parameter x larger than 0 . 9 and particularly larger than 0 . 97 corresponding substantially to the aluminum content of the Al x Gai x As layer 50 subsequently deposited on the inclined sidewalls of the layer stack .
  • the active layer was not specifically prepared to further improve the fall or rise time by artificially inducing dopants or other structures within the active layer .
  • the rise and fall time can be decreased by changing the charge carrier density within the active layer or increasing the non-radiative recombination at the cost of the radiative recombination .
  • FIGS 7A) to 7C illustrate respective embodiments thereof .
  • the active region 13 comprises a multi-quantum well structure with an additional doping of the quantum well layers 130 to increase of the charge carrier density therein . Consequently, the charge carrier density is increased within the central region of the active layer 13 , while the perimeter contains a functional structure 30 providing an increased density of non-radiative recombination centres .
  • a further embodiment illustrated in Figure 7C shows that the active layer 13 comprises a plurality of quantum dots 132 made of aluminum gallium arsenide and gallium arsenide instead of a quantum well structure .
  • the quantum dots comprise a reduced recombination time , thereby allowing a higher switchability of such optoelectronic device .
  • the density of the quantum dots within the active layer can be varied and adj usted with a focus on the central region .
  • an oxide aluminum gallium arsenide layer was introduced on the sidewalls and oxidized together with an aperture as in the previous embodiments .
  • measures for processing the sidewall and mesa facets to introduce a defined state on non-radiative recombination centres at the perimeter of active layer 13 can be combined with measures within the active layer to increase the charge carrier density in the central portion .

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Abstract

L'invention concerne un dispositif optoélectronique et en particulier un µLED, comprenant : un empilement de couches semi-conductrices, avec une première couche dopée ayant un premier type de dopage et une seconde couche dopée ayant un second type de dopage et une couche active entre les première et seconde couches dopées. Un matériau de l'empilement de couches semi-conductrices comprend AlGaAs et/ou GaAs. L'empilement de couches semi-conductrices comprend des parois latérales gravées en mesa s'étendant de la première couche dopée à la seconde couche dopée. Une structure fonctionnelle est disposée sur la surface des parois latérales gravées en mesa au moins au niveau de la couche active provoquant une réduction de la durée de vie de recombinaison radiative.
PCT/EP2024/057198 2023-03-30 2024-03-18 Dispositif optoélectronique et son procédé de traitement Ceased WO2024200079A1 (fr)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190341521A1 (en) * 2018-05-01 2019-11-07 Facebook Technologies, Llc Micron-sized light emitting diode designs
US20200052158A1 (en) * 2015-12-22 2020-02-13 Apple Inc. Led sidewall processing to mitigate non-radiative recombination
US20200313036A1 (en) * 2019-03-29 2020-10-01 Facebook Technologies, Llc Regrowth of epitaxial layer for surface recombination velocity reduction in light emitting diodes
US20210133528A1 (en) * 2018-02-08 2021-05-06 Cornell University Wireless, optically-powered optoelectronic sensors
US20220310875A1 (en) * 2019-06-19 2022-09-29 Comptek Solutions Oy Optoelectronic device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200052158A1 (en) * 2015-12-22 2020-02-13 Apple Inc. Led sidewall processing to mitigate non-radiative recombination
US20210133528A1 (en) * 2018-02-08 2021-05-06 Cornell University Wireless, optically-powered optoelectronic sensors
US20190341521A1 (en) * 2018-05-01 2019-11-07 Facebook Technologies, Llc Micron-sized light emitting diode designs
US20200313036A1 (en) * 2019-03-29 2020-10-01 Facebook Technologies, Llc Regrowth of epitaxial layer for surface recombination velocity reduction in light emitting diodes
US20220310875A1 (en) * 2019-06-19 2022-09-29 Comptek Solutions Oy Optoelectronic device

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