WO2024252949A1 - Power conversion device and drive device - Google Patents

Power conversion device and drive device Download PDF

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Publication number
WO2024252949A1
WO2024252949A1 PCT/JP2024/019108 JP2024019108W WO2024252949A1 WO 2024252949 A1 WO2024252949 A1 WO 2024252949A1 JP 2024019108 W JP2024019108 W JP 2024019108W WO 2024252949 A1 WO2024252949 A1 WO 2024252949A1
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WO
WIPO (PCT)
Prior art keywords
current
fault
predetermined
phase
power conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2024/019108
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French (fr)
Japanese (ja)
Inventor
遼一 稲田
洋 中野
信康 金川
哲 重田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Astemo Ltd
Original Assignee
Hitachi Astemo Ltd
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Publication date
Application filed by Hitachi Astemo Ltd filed Critical Hitachi Astemo Ltd
Priority to CN202480011235.2A priority Critical patent/CN120660276A/en
Priority to DE112024000549.7T priority patent/DE112024000549T5/en
Publication of WO2024252949A1 publication Critical patent/WO2024252949A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P29/00Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
    • H02P29/02Providing protection against overload without automatic interruption of supply
    • H02P29/024Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
    • H02P29/027Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load the fault being an over-current

Definitions

  • the present invention relates to a power conversion device and a drive device.
  • a power conversion device installed in a drive device for an electric vehicle or the like converts DC power supplied from a DC power source into AC power to drive a motor or the like. If an open fault or stuck-off fault occurs in a switching element for power conversion installed in the power conversion device, correct current control cannot be performed and the output torque of the motor fluctuates. For this reason, technology is known for diagnosing open faults in switching elements.
  • the fault diagnosis device described in Patent Document 1 determines that a switching element has a fault when the absolute value of the smoothed AC current is equal to or greater than a predetermined value.
  • the fault diagnosis device described in Patent Document 2 diagnoses that the switching element has an open fault when the sum of the current phase difference and the magnetic pole position is within a predetermined range and the absolute value of the current is smaller than a fault diagnosis value.
  • a fault is determined based on the smoothed current, so when the current frequency is low, the smoothed current becomes large even under normal conditions, and there is a possibility that the switching element may be erroneously diagnosed as faulty. This poses the problem that stable diagnosis cannot be performed when the current frequency is low.
  • a diagnosis is performed when the sum of the current phase and magnetic pole position is within a specified range, so the range in which abnormalities can be counted through diagnosis is limited to a part of one current cycle, and a time equivalent to several current cycles is required to perform a stable diagnosis.
  • the power conversion device includes a current detection unit that detects the output current of each phase of a three-phase inverter circuit having switching elements, and a fault diagnosis unit that diagnoses an open fault in the switching elements based on the output current of each phase.
  • the fault diagnosis unit calculates a fault detection counter for each phase by adding a predetermined addition amount when the value of the output current is within a predetermined range, and subtracting a predetermined subtraction amount when the value of the output current is not within the predetermined range, and diagnoses the open fault when the fault detection counter exceeds a first counter threshold. The lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set, or the first counter threshold is set to a larger value.
  • the present invention makes it possible to stably diagnose open faults in switching elements regardless of the frequency of the current.
  • FIG. 1 is a schematic diagram of a vehicle.
  • FIG. 2 is a diagram showing a schematic configuration of the drive device.
  • FIG. 3 is a diagram illustrating an example of a configuration of a power conversion circuit.
  • FIG. 4 is a control block diagram showing the details of the function of the control circuit.
  • FIG. 5 is a flowchart illustrating an example of an open fault diagnosis process.
  • FIG. 6 is an example of a timing chart of the open failure diagnosis process.
  • FIG. 7 is a flowchart illustrating an example of an open fault diagnosis process according to the second embodiment.
  • FIG. 8 is a flowchart illustrating an example of an open fault diagnosis process according to the second embodiment.
  • FIG. 9 is an example of a timing chart of the open circuit failure diagnosis process according to the second embodiment.
  • FIG. 1 is a schematic diagram of a vehicle.
  • FIG. 2 is a diagram showing a schematic configuration of the drive device.
  • FIG. 3 is a diagram illustrating an example of a configuration of a
  • FIG. 10 is a flowchart illustrating an example of an open fault diagnosis process according to the third embodiment.
  • FIG. 11 is a diagram showing a current waveform when an open circuit failure occurs.
  • FIG. 12 is a flowchart illustrating an example of an open fault diagnosis process according to the fourth embodiment.
  • FIG. 13 is a diagram showing a current waveform when an open circuit failure occurs.
  • FIG. 14 is a flowchart illustrating an example of an open fault diagnosis process according to the fourth embodiment.
  • FIG. 15 is an example of a timing chart of the open circuit failure diagnosis process in the fourth embodiment.
  • FIG. 16 shows signal waveforms for comparing the first and fifth embodiments.
  • FIG. 1 is a schematic diagram of a vehicle that runs on a motor (not shown).
  • the vehicle 1 is equipped with a drive unit 2 to which power is supplied from a DC power source 5.
  • the drive unit 2 has a power conversion device, a motor, and a reducer. The driving force of the motor is transmitted via the reducer to an axle 4 on which wheels 3a are provided.
  • the drive unit 2 is installed on the axle 4 of the front wheels (wheels 3a), but it may also be installed on the axle of the rear wheels (wheels 3b).
  • the drive units 2 may also be installed on the axles 4 of the front and rear wheels, or independent drive units 2 may be installed on each of the left and right wheels 3a, 3b instead of on the axles.
  • a drive unit using an internal combustion engine may be installed in parallel with the drive unit 2 on the axle 4, separate from the drive unit 2 described in FIG. 1.
  • FIG. 2 is a diagram showing the general configuration of the drive unit 2.
  • a DC power supply 5, a control device 6, and a fault notification device 7 are provided around the drive unit 2.
  • the control device 6 transmits the target torque ⁇ s, the operating mode Sm, and the like to the drive unit 2.
  • the control device 6 also receives a fault notification signal Sf output from the drive unit 2. In this embodiment, only one control device 6 is shown, but multiple control devices may send and receive information.
  • the control device 6 also has a control function for the drive unit using the internal combustion engine described above, for example.
  • the DC power supply 5 is a power supply for driving the motor 9 in the drive device 2, and may be, for example, a battery.
  • the fault notification device 7 receives a fault notification signal Sf from the drive device 2 and notifies the passenger of the occurrence of a fault.
  • Methods for notifying the passenger of a fault include, for example, turning on a lamp, emitting a warning sound, or notifying by voice.
  • the drive unit 2 is equipped with a power conversion device 8, a motor 9, and a reducer (not shown).
  • the reducer amplifies the driving force of the motor 9 and transmits it to the axle 4 (or wheels 3a, 3b).
  • the motor 9 is a three-phase motor with three internal windings, and may be, for example, a synchronous motor using permanent magnets or an induction motor without permanent magnets.
  • the motor 9 is equipped with a motor angle sensor 91.
  • the motor angle sensor 91 measures the rotation angle of the motor rotor and outputs the measured angle to the power conversion device 8 as a motor angle sensor value ⁇ m.
  • the power conversion device 8 converts the DC power supplied from the DC power source 5 into AC power based on the target torque ⁇ s input from the control device 6, and supplies it to the motor 9.
  • the power conversion device 8 also has the function of converting the power of the motor 9 into DC power to charge the DC power source 5.
  • the power conversion device 8 includes a control circuit 80, a driver circuit 81, a power conversion circuit 82, a DC voltage sensor 83, and an AC current sensor 84.
  • the control circuit 80 generates a PWM (Pulse Width Modulation) signal pwm for controlling the current of each of the U, V, and W phases output from the power conversion device 8 to a predetermined value based on the target torque ⁇ s and the operating mode Sm from the control device 6. The details of the control circuit 80 will be described later.
  • the driver circuit 81 outputs a drive signal for switching on/off multiple power semiconductors provided in the power conversion circuit 82 based on the PWM signal pwm output by the control circuit 80.
  • the DC voltage sensor 83 is a sensor that measures the output voltage of the DC power supply 5, and outputs the measured voltage value as a DC voltage sensor value Vdc to the control circuit 80.
  • the AC current sensor 84 is a sensor that measures the AC current flowing through each phase (U phase, V phase, W phase) of the motor 9.
  • the AC current values of each phase measured by the AC current sensor 84 are input to the control circuit 80 as AC current sensor values Iu, Iv, Iw (hereinafter simply referred to as currents Iu, Iv, Iw).
  • the power conversion circuit 82 receives a drive signal from the driver circuit 81 to drive the internal power semiconductors and control the current flowing through the motor 9.
  • FIG. 3 is a diagram showing an example of the configuration of the power conversion circuit 82.
  • the power conversion circuit 82 has a smoothing capacitor 821 and six power semiconductors 822 inside. Two power semiconductors 822 that constitute an upper arm and a lower arm are provided for each phase (U phase, V phase, W phase). The output terminals of the upper and lower arms of each phase are connected to the windings of the corresponding phase of the motor 9.
  • the power semiconductor 822 switches on/off in response to the drive signal input from the driver circuit 81, and converts between DC and AC power.
  • Examples of this power semiconductor 822 include a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and an IGBT (Insulated Gate Bipolar Transistor). In the example shown in Figure 3, an IGBT is used as the power semiconductor 822.
  • the smoothing capacitor 821 is a capacitor that smoothes the current generated by turning on/off the power semiconductor 822 and suppresses ripples in the DC current supplied from the DC power source 5 to the power conversion circuit 82.
  • an electrolytic capacitor or a film capacitor is used as the smoothing capacitor 821.
  • the motor neutral point is floating, but it may be connected to ground (not shown).
  • Methods for connecting the motor neutral point to ground include a direct grounding method, a resistive grounding method, a compensating reactor grounding method, and an arc suppression reactor grounding method.
  • FIG. 4 is a control block diagram showing the detailed functions of the control circuit 80.
  • the control circuit 80 is equipped with a CPU, RAM, ROM, communication circuits, etc. (not shown) inside.
  • the CPU implements the functions of each part described below by expanding a program stored in the ROM into the RAM and executing it.
  • the ROM may be an electrically erasable programmable ROM (EEPROM) or a flash ROM.
  • the control circuit 80 has a state control unit 801, a target current calculation unit 802, a current control unit 803, a PWM signal generation unit 804, a motor speed calculation unit 805, and a diagnosis unit 806.
  • the control circuit 80 communicates with the external control device 6, and receives the above-mentioned operation mode Sm and target torque ⁇ s from the control device 6.
  • the control circuit 80 also controls the PWM signal pwm based on the operation mode Sm and the target torque ⁇ s, and drives the power conversion circuit 82 via the driver circuit 81 shown in FIG. 2. If the control circuit 80 determines that a fault has occurred internally, it outputs a fault notification signal Sf to the external control device 6 and fault notification device 7 shown in FIG. 2.
  • the motor speed calculation unit 805 calculates the motor angular speed ⁇ 0 based on the motor angle sensor value ⁇ m.
  • the calculated motor angular speed ⁇ 0 is input to the target current calculation unit 802 and the diagnosis unit 806.
  • the state control unit 801 transitions the operating state of the power conversion device 8 using the operating mode Sm and the fault notification signal Sf output by the diagnosis unit 806, and outputs the current operating state to the PWM signal generation unit 804.
  • operating states include a PWM state, a three-phase short-circuit state, and a three-phase open state.
  • the target current calculation unit 802 uses the target torque ⁇ s, the DC voltage sensor value Vdc, and the motor angular velocity ⁇ 0 to calculate the target current value required for the motor 9 to output the same torque as the target torque ⁇ s.
  • the target current value is output to the current control unit 803.
  • the target current value is expressed, for example, in the form of a d-axis target current value and a q-axis target current value.
  • the current control unit 803 performs feedback control using the target current value, currents Iu, Iv, Iw, motor angle sensor value ⁇ m, and DC voltage sensor value Vdc so that the AC current flowing through the motor 9 follows the target current value, and calculates duty values Du, Dv, Dw for three phases in PWM control.
  • the duty values Du, Dv, Dw are then input to the PWM signal generation unit 804.
  • the PWM signal generating unit 804 switches the signal to be output to the driver circuit 81 depending on the operating state output from the state control unit 801.
  • the PWM signal generating unit 804 has an internal timer (not shown), and when the operating state is the PWM state, it generates a PWM signal pwm using this timer value and the duty values Du, Dv, and Dw of each phase output by the current control unit 803.
  • the PWM signal generating unit 804 then outputs the generated PWM signal pwm to the driver circuit 81 shown in FIG. 2.
  • a PWM signal pwm is generated that turns off all six power semiconductors 822 (see FIG. 3) in the power conversion circuit 82.
  • a PWM signal pwm is generated that turns off all of the power semiconductors 822 in the upper arm and turns on all of the power semiconductors 822 in the lower arm, or turns on all of the power semiconductors 822 in the upper arm and turns off all of the power semiconductors 822 in the lower arm.
  • the generated PWM signal pwm is output to the driver circuit 81.
  • the diagnosis unit 806 diagnoses faults within the power conversion device 8 based on the currents Iu, Iv, and Iw, the motor angular velocity ⁇ 0 calculated by the motor speed calculation unit 805, and the target current value calculated by the target current calculation unit 802. If a fault is detected as a result of the diagnosis, the diagnosis unit 806 outputs the details of the fault location as a fault notification signal Sf to the state control unit 801, the external control device 6, and the fault notification device 7.
  • FIG. 5 is a flowchart showing an example of an open circuit failure diagnosis process executed by the diagnosis unit 806.
  • the diagnosis unit 806 repeatedly executes a series of processes shown in Fig. 5 at a fixed time interval.
  • step S100 the diagnosis unit 806 determines whether the target current value input from the target current calculation unit 802 is greater than the threshold value Th1. If it is determined in step S100 that the target current value is greater than the threshold value Th1, the process proceeds to step S101, and if it is determined that the target current value is equal to or less than the threshold value Th1, the diagnosis process in FIG. 5 is terminated.
  • step S101 loop processing for each phase is started.
  • the loop processing from step S101 to step S113 is performed for each of the U phase, V phase, and W phase.
  • step S102 the diagnosis unit 806 determines whether the absolute value of the U-phase current Iu (represented as
  • the diagnosis unit 806 adds a predetermined additional amount according to the current frequency to the U-phase fault detection counter C in step S104.
  • the diagnosis unit 806 subtracts a predetermined subtraction amount according to the current frequency from the U-phase fault detection counter C in step S106.
  • the predetermined addition amount in step S104 and the predetermined subtraction amount in step S106 are values proportional to the frequency of the current. In other words, the higher the current frequency, the larger the predetermined addition amount and the predetermined subtraction amount are set. Since the current frequency is proportional to the motor speed, the predetermined addition amount and the predetermined subtraction amount are set based on the motor angular velocity ⁇ 0 calculated by the motor speed calculation unit 805. In that case, the current frequency may be calculated from the motor angular velocity ⁇ 0, or the predetermined addition amount and the predetermined subtraction amount may be values proportional to the motor angular velocity ⁇ 0 itself. Of course, the current frequency may also be calculated from the input currents Iu, Iv, and Iw.
  • step S108 the diagnosis unit 806 determines whether the U-phase failure detection counter C exceeds the threshold value Th3. If the failure detection counter exceeds the threshold value Th3, the process proceeds to step S110, where it is diagnosed that the U-phase power semiconductor 822 has an open failure. On the other hand, if the failure detection counter C does not exceed the threshold value Th3, the process proceeds to step S112, where it is diagnosed that the U-phase power semiconductor 822 is normal.
  • step S113 the loop processing of the U phase is completed, and then the process returns to step S101 to execute the loop processing for the V phase. Then, once the loop processing for the V phase is completed, the process returns again to step S101 to execute the loop processing for the W phase.
  • step S113 the same processing as for the U phase is executed in steps S102 to S112 for the V and W phases.
  • Figure 6 is an example of a timing chart for open fault diagnosis processing, showing the U phase as an example.
  • Signal waveforms (a) and (b) show an example when the frequency of current Iu is low.
  • the solid line in signal waveform (a) shows the change in current Iu.
  • the solid line in signal waveform (b) shows the change in fault detection counter C.
  • signal waveforms (c) and (d) show an example when the frequency of current Iu is high.
  • the solid line in signal waveform (c) shows the change in current Iu.
  • the solid line in signal waveform (d) shows the change in fault detection counter C.
  • the horizontal axis is time t.
  • an open circuit fault occurs at time t1.
  • a sinusoidal current flows through the motor 9.
  • an open circuit fault occurs in the U-phase power semiconductor 822 at time t1
  • no current flows in either the positive or negative direction in the U-phase.
  • Figure 6 shows a case where an open circuit fault occurs in the power semiconductor 822 of the upper arm of the U-phase, and no current flows in the positive direction.
  • the diagnostic unit 806 diagnoses that the power semiconductor 822 has an open fault.
  • the higher the current frequency the larger the increment/decrement amount of the fault detection counter C is set.
  • the increment/decrement amount of the fault detection counter C is constant regardless of the current frequency.
  • the dashed lines L1 and L2 shown in the signal waveforms (b) and (d) of FIG. 6 show the comparative example.
  • the time period during which the current Iu is below the threshold value Th2 during normal operation is longer as the frequency of the current Iu is lower.
  • the diagnostic process is performed at a constant cycle regardless of the frequency of the current Iu. Therefore, even when the frequency of the current Iu is high as in signal waveform (c), it is necessary to set the amount of addition/subtraction of the fault detection counter C so that the fault detection counter C exceeds the threshold value Th3 by the time approximately 1/2 cycle has elapsed since the fault occurred at time t1.
  • the amount of addition/subtraction in the comparative example is constant regardless of frequency, when the frequency of the current Iu is low as in signal waveform (a), the fault detection counter C during normal operation is as shown by line L1.
  • the power semiconductor 822 is erroneously diagnosed as having an open circuit fault even during normal operation.
  • the increment/decrement of the fault detection counter C is set so that when the frequency of the current Iu is low, the fault is detected within 1/2 period when an open fault occurs, and a false diagnosis of an open fault does not occur under normal conditions. That is, regardless of the frequency of the current Iu, the increment/decrement of the fault detection counter C is set as shown by the solid line in the signal waveform (b) of FIG. 6. With this setting, when the frequency of the current Iu is high as in the signal waveform (c), the fault detection counter C after the occurrence of an open fault will be as shown by line L2 in the signal waveform (d). As a result, the fault detection counter C may not reach the threshold value Th3, and an open fault in the power semiconductor 822 may not be detected.
  • the higher the current frequency the larger the increment/decrement amount of the fault detection counter C is set. Therefore, as shown by the solid lines in the signal waveforms (b) and (d) of Figure 6, it is possible to set the increment/decrement amount of the fault detection counter C so that when an open fault occurs, the fault detection counter C reaches the threshold value Th3 within 1/2 the period of the current change, and so that the fault detection counter C does not reach the threshold value Th3 under normal conditions. As a result, stable open fault diagnosis can be performed regardless of the high or low frequency of the current.
  • step S100 by performing the processing of step S100, if the target current value is equal to or less than the threshold value Th1, the processing of the open fault diagnosis is not performed. For example, if the processing of step S100 is not provided, even if an open fault has not occurred, if the absolute value of the current flowing through the motor 9 is smaller than the threshold value Th2, the fault detection counter C may exceed the threshold value Th3, resulting in a misdiagnosis of an open fault. Therefore, in this embodiment, by performing the processing of step S100, such a misdiagnosis can be avoided.
  • the amount of current to be passed through the motor 9 is determined by the target torque ⁇ s and the motor speed (i.e., the motor angular speed ⁇ 0). Therefore, in the determination process of step S100, the determination may be made using the target torque ⁇ s and the motor angular speed ⁇ 0 instead of using the target current value.
  • the increment/decrement amount of the fault detection counter C is set to a larger amount as the current frequency increases, it is possible to detect an open fault in the power semiconductor 822 regardless of the motor rotation speed (i.e., the current frequency). Furthermore, in the first embodiment, an open fault is detected within a period of approximately 1/2 the cycle of the current Iu regardless of the motor rotation speed, allowing for rapid fault detection.
  • Second Embodiment A second embodiment of a drive device of the present invention will be described with reference to Figures 7 to 9.
  • the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example.
  • the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 of the first embodiment described above.
  • FIGS. 7 and 8 are flowcharts showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806 (see FIG. 4) of the control circuit 80.
  • the diagnosis unit 806 repeatedly executes the process shown in FIG. 7 and the process shown in FIG. 8 at regular time intervals. Note that the execution periods of the processes in FIG. 7 and FIG. 8 may be the same or different.
  • step S200 the diagnosis unit 806 judges whether the U-phase fault detection counter C exceeds the threshold value Th3A. If it is judged in step S200 that C>Th3A, the process proceeds to step S202, where the U-phase abnormality flag is set. On the other hand, if it is judged in step S200 that C ⁇ Th3A, the process proceeds to step S204, where it is judged whether the U-phase fault detection counter C is below the threshold value Th3B. If it is judged in step S204 that C ⁇ Th3B, the process proceeds to step S206, where the U-phase abnormality flag is reset. On the other hand, if it is judged in step S204 that C ⁇ Th3B, the process proceeds to step S113.
  • the threshold value Th3B is set so that Th3B ⁇ Th3A.
  • step S113 the loop processing for the U phase is completed, and then the process returns to step S101 to execute the loop processing for the V phase. Then, once the loop processing for the V phase is completed, the process returns to step S101 again to execute the loop processing for the W phase.
  • step S113 the same processing as that for the U phase described above is executed for the V and W phases.
  • step S300 the diagnosis unit 806 determines whether or not an abnormality flag is set for any of the phases. If it is determined in step S300 that the abnormality flag is set (yes), the process proceeds to step S302, where the debounce counter Cd is incremented. On the other hand, if the abnormality flags for all phases are reset, the process proceeds to step S304, where the debounce counter Cd is decremented.
  • step S306 the diagnostic unit 806 determines whether the debounce counter Cd exceeds the threshold value Th4. If it is determined in step S306 that Cd>Th4, the process proceeds to step S308, where the power semiconductor 822 is diagnosed as having an open circuit fault. On the other hand, if it is determined in step S306 that Cd ⁇ Th4, the power semiconductor 822 is diagnosed as being normal.
  • FIG. 9 shows an example of a timing chart of the open fault diagnosis process in the second embodiment, using the U phase as an example.
  • the solid line in signal waveform (a) indicates the change in current Iu
  • the solid line in signal waveform (b) indicates the change in fault detection counter C
  • the solid line in signal waveform (c) indicates the change in the abnormality flag
  • the solid line in signal waveform (d) indicates the change in debounce counter Cd.
  • the horizontal axis is time t.
  • step S104 and the amount subtracted in step S106 are set so that the increase in the fault detection counter C in the interval (Th2>Iu>-Th2) is greater than the decrease in the interval (Iu ⁇ -Th2).
  • the turning point of the fault detection counter C from increase to decrease and decrease to increase gradually moves upward in the figure, and the fault detection counter C is maintained in the state of C ⁇ Th3, and the abnormality flag is maintained in the set state.
  • step S300 in FIG. 8 is executed at time t3 after the abnormality flag is set (time t2)
  • the process of step S302 is performed and the debounce counter Cd is incremented as shown in the signal waveform (d). Thereafter, the debounce counter Cd is incremented each time the process of FIG. 8 is repeated at a fixed time period. Then, when the debounce counter Cd exceeds the threshold value Th4 at time t4, step 308 in FIG. 8 is executed and an open failure is diagnosed.
  • the fault detection counter C exceeds the threshold value Th3A, an abnormality flag is set, and the abnormality flag remains set until the fault detection counter C falls below the threshold value Th3B. Then, by performing increments and decrements on the debounce counter Cd based on the state of the abnormality flag, a stable diagnosis of fault or normality can be performed regardless of the processing timing of the debounce counter Cd.
  • the fault detection counter C exceeds the threshold value Th3 and an open fault is detected, so that the open fault can be detected quickly.
  • the second embodiment by introducing a debounce counter Cd based on the abnormality flag as described above, the occurrence of erroneous detection due to accidental influences such as noise is avoided, and the stability of the open fault diagnosis is improved.
  • Cd when a state in which no current Iu flows occurs for approximately three consecutive cycles, Cd>Th4 and an open fault is diagnosed. The time until this open fault is determined depends on the execution cycle of the process in Figure 8, so the diagnostic processing time can be shortened by shortening the execution cycle.
  • the fault detection counter C i.e., the integrated value of the addition and subtraction amounts
  • the fault detection counter C may fall below the threshold value Th3B and the abnormality flag may be reset even if an open fault occurs in the power semiconductor 822.
  • the fault detection counter C exceeds the threshold value Th3A and the abnormality flag is set (time t2 in FIG. 9), the fault detection counter C is further incremented by a fixed number ⁇ C. By doing so, the line of the fault detection counter C from time t2 onwards is shifted upward in the figure by a fixed number ⁇ C. As a result, the reset of the abnormality flag when an open fault occurs is prevented, reducing the possibility of overlooking an open fault.
  • FIG. 10 A third embodiment of the drive device of the present invention will be described with reference to Figures 10 and 11.
  • the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example.
  • the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
  • FIG. 10 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806.
  • the diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 10 at a fixed time interval.
  • the flowchart in FIG. 10 is obtained by adding step S400 to the flowchart shown in FIG. 5.
  • the following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment.
  • the process related to the U phase of the phase-by-phase loop process that begins in step S101 will be described.
  • the diagnosis unit 806 sets the threshold value Th2 to a value corresponding to the frequency of the current Iu. Specifically, the higher the frequency of the current Iu, the larger the threshold value Th2 is set.
  • the threshold value Th2 is set based on the motor angular velocity ⁇ 0 calculated by the motor speed calculation unit 805. In that case, the current frequency may be calculated from the motor angular velocity ⁇ 0, or the threshold value Th2 may be set to a value proportional to the motor angular velocity ⁇ 0 itself. Of course, the current frequency may also be calculated from the input currents Iu, Iv, and Iw.
  • step S102 the threshold value Th2 set in step S400 is used to determine whether the absolute value of the current Iu exceeds the threshold value Th2.
  • the processing from step S102 onwards is the same as in the flowchart shown in Figure 5, and so a description thereof will be omitted.
  • the processing relating to the V phase and W phase is performed in the same manner as in the case of the U phase.
  • Figure 11 shows the current waveforms when an open failure occurs in power semiconductor 822, where current waveform (a) shows the waveform when the motor speed is low, and current waveform (b) shows the waveform when the motor speed is high. In both cases, the horizontal axis represents time. When an open failure occurs in power semiconductor 822, no current flows through the failed phase for a section of approximately 1/2 the current cycle.
  • the threshold value Th2 for determining the magnitude of the current in an open fault diagnosis is always constant, there is a risk that an open fault cannot be correctly diagnosed when the motor speed is high.
  • the threshold value Th2 is set to a larger value as the motor speed increases, thereby avoiding erroneous diagnosis and enabling stable open fault diagnosis regardless of the motor speed.
  • FIG. 12 A fourth embodiment of the drive device of the present invention will be described with reference to Figures 12 and 13.
  • the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example.
  • the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
  • FIG. 12 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806.
  • the diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 12 at a fixed time interval.
  • the flowchart in FIG. 12 is obtained by adding steps S500 and S502 instead of step S102 in the flowchart shown in FIG. 5 of the first embodiment.
  • the following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment.
  • the process related to the U phase of the phase-by-phase loop process that begins in step S101 will be described.
  • step S500 the diagnostic unit 806 sets an upper threshold Th2A and a lower threshold Th2B as shown in FIG. 13 depending on the direction of current flow under normal conditions, i.e., whether the current direction is positive or negative.
  • FIG. 13 is a diagram showing the waveform of current Iu when an open fault has occurred, with the dashed line indicating the threshold Th2A and the dashed line indicating the threshold Th2B. Note that FIG. 13 shows the current waveform when the motor speed is high, as shown in the current waveform (b) of FIG. 11. During period R1 when a positive current flows under normal conditions, a current of around 0 [A] or a negative current flows.
  • threshold Th2A Th2
  • Th2B Th2B
  • the current value (Iu, Iv, Iw) of each phase under normal conditions can be calculated from the current target value (Id, Iq) and electrical angle ( ⁇ ) using formula (1).
  • Id is the d-axis target current value
  • Iq is the q-axis target current value
  • is the electrical angle
  • Iu is the U-phase current
  • Iv is the V-phase current
  • Iw is the W-phase current.
  • the electrical angle ⁇ can be calculated by multiplying the motor angle sensor value ⁇ m by the number of pole pairs of the motor 9.
  • the direction of the current in each phase is determined from the positive or negative value of the current value (Iu, Iv, Iw) of each phase calculated here.
  • step S502 the diagnosis unit 806 determines whether the current Iu satisfies "threshold Th2A > current Iu > threshold Th2B". If it is determined in step S502 that "threshold Th2A > current Iu > threshold Th2B", the process proceeds to step S104, where the fault detection counter C for the U phase is incremented by a predetermined addition amount. On the other hand, if it is determined in step S502 that "threshold Th2A > current Iu > threshold Th2B" is not true, the process proceeds to step S106, where a predetermined subtraction amount is subtracted from the fault detection counter C. Note that the processing from step S108 onwards is the same as in the flowchart shown in Figure 5, and therefore a description thereof will be omitted. The processing relating to the V phase and W phase is also performed in the same manner as in the case of the U phase.
  • the threshold value Th2 is set to avoid misdiagnosis.
  • the threshold value Th2B is set to a large negative value in this period R1, so that misdiagnosis can be avoided. As a result, stable open fault diagnosis can be performed regardless of whether the motor speed is high or low.
  • a fifth embodiment of the drive device of the present invention will be described with reference to Figures 14 and 15.
  • the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example.
  • the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.
  • FIG. 14 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806.
  • the diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 14 at a fixed time interval.
  • the flowchart in FIG. 14 adds steps S600 and S602 instead of steps S104 and S106 in the flowchart shown in FIG. 5 of the first embodiment, and further adds a new step S604.
  • the following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment.
  • the process related to the U phase of the phase-by-phase loop process that starts in step S101 will be described.
  • step S102 If it is determined in step S102 that the absolute value of the current Iu is less than the threshold value Th2, the process proceeds to step S600, where a fixed value is added to the U-phase fault detection counter C. On the other hand, if it is determined in step S102 that the absolute value of the current Iu is greater than or equal to the threshold value Th2, the process proceeds to step S602, where a fixed value is subtracted from the U-phase fault detection counter C.
  • a threshold value Th3 is set according to the current frequency. Details will be described later, but the higher the current frequency, the smaller the threshold value Th3 is set.
  • the current frequency is proportional to the motor speed, so the threshold value Th3 is set based on the motor angular velocity ⁇ 0 calculated by the motor speed calculation unit 805.
  • the current frequency may be calculated from the motor angular velocity ⁇ 0, or the threshold value Th3 may be set to a value proportional to the motor angular velocity ⁇ 0 itself.
  • the current frequency may also be calculated from the input currents Iu, Iv, and Iw.
  • step S108 onwards is the same as in the flowchart shown in FIG. 5, and so a description thereof will be omitted. Processing relating to the V and W phases is also performed in the same manner as in the case of the U phase.
  • FIG. 15 is a timing chart corresponding to FIG. 6 of the first embodiment.
  • Signal waveforms (a), (b), and (c) are the same as signal waveforms (a), (b), and (c) shown in FIG. 6, and signal waveform (d) is different from signal waveform (d) in FIG. 6.
  • Signal waveforms (a) and (b) show an example when the frequency of current Iu is low, and the solid line of signal waveform (a) shows the change in current Iu, and the solid line of signal waveform (b) shows the change in fault detection counter C.
  • signal waveforms (c) and (d) show an example when the frequency of current Iu is high, and the solid line of signal waveform (c) shows the change in current Iu, and the solid line of signal waveform (d) shows the change in fault detection counter C.
  • the increment and decrement amounts of the fault detection counter C are set to constant values, so the slope of the line of the fault detection counter C in the signal waveform (b) is the same as the slope of the line of the fault detection counter C in the signal waveform (d).
  • the increment and decrement periods of the fault detection counter C per period are shorter in the signal waveform (c), which has a higher current frequency, and so the increment and decrement amounts of the fault detection counter C during that time are also smaller.
  • the value of the threshold Th3 is set large to prevent misdiagnosis.
  • the value of the threshold Th3 is set smaller than when the frequency of the current Iu is high. In this case, taking into account the amount of addition and the number of additions within a period of approximately 1/2 a cycle during an open fault, the magnitude of the threshold Th3 is set so that the fault detection counter C reaches the threshold Th3 within a period of approximately 1/2 a cycle.
  • the magnitude of the threshold value Th3 is changed according to the current frequency, making it possible to detect an open circuit failure in the power semiconductor 822 regardless of the motor speed (high or low current frequency) and to prevent erroneous detection during normal operation.
  • the first embodiment described above it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the increment/decrement amount of the fault detection counter C according to the current frequency.
  • the fifth embodiment it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the magnitude of the threshold value Th3 according to the current frequency.
  • FIG. 16 shows signal waveforms for comparing the first and fifth embodiments.
  • signal waveform (a) represents the change in motor speed
  • signal waveform (b) represents the current waveform under normal conditions
  • signal waveform (c) represents the change in the fault detection counter C in the fifth embodiment
  • signal waveform (d) represents the change in the fault detection counter C in the first embodiment.
  • Signal waveforms (c) and (d) also show the threshold value Th3 in each embodiment. Note that the example shown in FIG. 16 shows a case where the absolute value of the current remains below the threshold value Th2 for a long period of time when the motor speed is low, and then the motor speed increases and the current value becomes equal to or greater than the threshold value Th2.
  • the fault detection counter C is incremented only little by little, as shown in signal waveform (d).
  • the period during which the current value is equal to or greater than the threshold value Th2 becomes longer than the period during which the current value is below the threshold value Th2, and the fault detection counter C is decremented by a large amount. As a result, the fault detection counter does not reach the threshold value Th3, and an open fault is not erroneously diagnosed.
  • the threshold value Th3 when the motor speed is low (when the current frequency is low), the threshold value Th3 is set high and decreases rapidly as the motor speed increases. Also, the increase in the fault detection counter C when the current value is below the threshold value Th2 is greater than in the first embodiment, in which the addition amount is set high at low frequencies. When the current amplitude exceeds the threshold value Th2, the subtraction period of the fault detection counter C is longer than the addition period, so that the fault detection counter C generally tends to decrease.
  • the diagnosis method of the first embodiment can reduce the occurrence of false diagnosis when the motor speed changes, compared to the diagnosis method of the fifth embodiment.
  • a current detection unit AC current sensor 84 that detects the output current of each phase of a three-phase inverter circuit (power conversion circuit 82) equipped with a switching element (power semiconductor 822), and a fault diagnosis unit (diagnosis unit 806) that diagnoses an open fault of the power semiconductor 822 based on the output current of each phase
  • the diagnosis unit 806 calculates a fault detection counter C for each phase by adding a predetermined addition amount when the value of the output current is within a predetermined range (
  • the diagnosis unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current is lower, or sets the first counter threshold (threshold Th3) to a larger value
  • the lower the frequency of the output current the smaller the predetermined addition amount and the predetermined subtraction amount are set to, making it possible to detect an open circuit failure regardless of whether the frequency is high or low.
  • the lower the frequency of the output current the larger the first counter threshold (threshold Th3) is set to, making it possible to detect an open circuit failure regardless of whether the frequency is high or low.
  • the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current decreases, sets a fault flag when the fault detection counter C exceeds a predetermined set threshold (threshold Th3A), and resets the fault flag when the fault detection counter falls below a predetermined reset threshold (threshold Th3B).
  • the diagnostic unit 806 increments the debounce counter Cd when the fault flag is set, and decrements the debounce counter Cd when the fault flag is reset, and diagnoses an open fault when the debounce counter Cd exceeds a second counter threshold (threshold Th4).
  • the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values the lower the frequency of the output current, and sets the predetermined range, i.e., the width from Th2 to -Th2 in Figure 11, to a wider value the higher the frequency of the output current.
  • the threshold value Th2 When the frequency of the output current (i.e., the motor speed) is high, a ripple current is likely to occur due to the influence of the back electromotive force generated by the motor 9. Therefore, by setting the threshold value Th2 to a larger value as the motor speed increases, misdiagnosis can be avoided and a stable open fault diagnosis can be performed regardless of the motor speed.
  • a rotation speed detection unit (motor angle sensor 91) may be further provided to detect the rotation speed (motor speed) of the rotating electric machine (motor 9) to which the output current is input, and the predetermined addition amount and the predetermined subtraction amount may be set to smaller values as the rotation speed decreases, and the width of the predetermined range may be set to be wider as the rotation speed increases. This can achieve the same effect as in the above-mentioned case of (C3).
  • the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current decreases, and estimates the positive or negative of the current in a normal case where no open circuit fault occurs, based on the output current detected by the AC current sensor 84.
  • the negative value range (Th2A to 0) within the predetermined range (Th2B ⁇ predetermined range ⁇ Th2A) is set to be larger than the positive value range (0 to Th2B), and if the estimation result of the diagnostic unit 806 is negative, the positive value range (0 to Th2B) within the predetermined range (Th2B ⁇ predetermined range ⁇ Th2A) is set to be larger than the negative value range (Th2A to 0).
  • the present invention is not limited to the above-described embodiments, but includes various modified examples.
  • the above-described embodiments have been described in detail to clearly explain the present invention, and are not necessarily limited to those having all of the configurations described. It is also possible to replace part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace part of the configuration of each embodiment with other configurations.
  • the above-mentioned configurations, functions, processing units, processing means, etc. may be realized in hardware, in part or in whole, for example by designing them as integrated circuits. Further, the above-mentioned configurations, functions, etc. may be realized in software by a processor interpreting and executing a program that realizes each function. Information on the programs, tables, files, etc. that realize each function can be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card or DVD.
  • a recording device such as a hard disk or SSD (Solid State Drive)
  • a recording medium such as an IC card or DVD.

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Abstract

This power conversion device comprises: a current detection unit that detects the output current of each phase of a three-phase inverter circuit including a switching element; and a failure diagnosis unit that diagnoses an open failure of the switching element on the basis of the output current of each phase. The failure diagnosis unit adds a predetermined addition amount when the value of the output current is within a predetermined range and subtracts a predetermined subtraction amount when the value of the output current is not within the predetermined range, thereby calculating a failure detection counter for each phase and diagnosing the switching element as the open failure when the failure detection counter exceeds a first counter threshold, wherein the lower the frequency of the output current, the smaller the value of the predetermined addition amount and the predetermined subtraction amount are set to, or the first counter threshold is set to a larger value.

Description

電力変換装置および駆動装置Power conversion device and drive device

 本発明は、電力変換装置および駆動装置に関する。 The present invention relates to a power conversion device and a drive device.

 電動車両等の駆動装置に設けられた電力変換装置は、直流電源から供給される直流電力を交流電力に変換しモータ等を駆動させる。電力変換装置に設けられている電力変換用のスイッチング素子にオープン故障もしくはオフ固着故障が発生すると、正しい電流制御ができずにモータの出力トルクが変動する。そのため、スイッチング素子のオープン故障を診断する技術が知られている。 A power conversion device installed in a drive device for an electric vehicle or the like converts DC power supplied from a DC power source into AC power to drive a motor or the like. If an open fault or stuck-off fault occurs in a switching element for power conversion installed in the power conversion device, correct current control cannot be performed and the output torque of the motor fluctuates. For this reason, technology is known for diagnosing open faults in switching elements.

 例えば、特許文献1に記載の故障診断装置では、平滑化後の交流電流の絶対値が所定値以上である場合に、スイッチング素子が故障していると判定している。また、特許文献2に記載の故障診断装置では、電流位相差と磁極位置の和が所定範囲内のときに、電流の絶対値が故障診断値より小さい場合にはスイッチング素子がオープン故障であると診断している。 For example, the fault diagnosis device described in Patent Document 1 determines that a switching element has a fault when the absolute value of the smoothed AC current is equal to or greater than a predetermined value. In addition, the fault diagnosis device described in Patent Document 2 diagnoses that the switching element has an open fault when the sum of the current phase difference and the magnetic pole position is within a predetermined range and the absolute value of the current is smaller than a fault diagnosis value.

日本国特開2010-246328号公報Japanese Patent Application Publication No. 2010-246328 日本国特開2010-246327号公報Japanese Patent Application Publication No. 2010-246327

 特許文献1の技術では、平滑化後の電流をもとに故障を判定するため、電流の周波数が低い場合には正常時であっても平滑化後の電流が大きくなり、スイッチング素子が故障していると誤診断する可能性がある。そのため、電流の周波数が低い状態では安定した診断が行えないという課題がある。さらに、特許文献2の技術では、電流位相と磁極位置の総和が所定の範囲内の時に診断をするため、診断により異常をカウントできる範囲が電流1周期内の一部に限られ、安定した診断を行うには電流数周期分の時間が必要である。 In the technology of Patent Document 1, a fault is determined based on the smoothed current, so when the current frequency is low, the smoothed current becomes large even under normal conditions, and there is a possibility that the switching element may be erroneously diagnosed as faulty. This poses the problem that stable diagnosis cannot be performed when the current frequency is low. Furthermore, in the technology of Patent Document 2, a diagnosis is performed when the sum of the current phase and magnetic pole position is within a specified range, so the range in which abnormalities can be counted through diagnosis is limited to a part of one current cycle, and a time equivalent to several current cycles is required to perform a stable diagnosis.

 本発明の態様による電力変換装置は、スイッチング素子を備える三相インバータ回路の各相の出力電流を検出する電流検出部と、各相の前記出力電流に基づいて、前記スイッチング素子のオープン故障を診断する故障診断部と、を備え、前記故障診断部は、前記出力電流の値が所定範囲内である場合に所定加算量を加算し、前記出力電流の値が前記所定範囲内でない場合に所定減算量を減算することで相毎の故障検知カウンタを演算すると共に、前記故障検知カウンタが第1カウンタ閾値を超えた場合に前記オープン故障と診断し、前記出力電流の周波数が低いほど、前記所定加算量および前記所定減算量をより小さい値に、または、前記第1カウンタ閾値をより大きい値に設定する。 The power conversion device according to this aspect of the present invention includes a current detection unit that detects the output current of each phase of a three-phase inverter circuit having switching elements, and a fault diagnosis unit that diagnoses an open fault in the switching elements based on the output current of each phase. The fault diagnosis unit calculates a fault detection counter for each phase by adding a predetermined addition amount when the value of the output current is within a predetermined range, and subtracting a predetermined subtraction amount when the value of the output current is not within the predetermined range, and diagnoses the open fault when the fault detection counter exceeds a first counter threshold. The lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set, or the first counter threshold is set to a larger value.

 本発明によれば、電流の周波数の高低によらずスイッチング素子のオープン故障を安定して診断できる。 The present invention makes it possible to stably diagnose open faults in switching elements regardless of the frequency of the current.

図1は、車両の模式図である。FIG. 1 is a schematic diagram of a vehicle. 図2は、駆動装置の概略構成を示す図である。FIG. 2 is a diagram showing a schematic configuration of the drive device. 図3は、電力変換回路の構成の一例を示す図である。FIG. 3 is a diagram illustrating an example of a configuration of a power conversion circuit. 図4は、制御回路の機能の詳細を示す制御ブロック図である。FIG. 4 is a control block diagram showing the details of the function of the control circuit. 図5は、オープン故障診断処理の一例を示すフローチャートである。FIG. 5 is a flowchart illustrating an example of an open fault diagnosis process. 図6は、オープン故障診断処理におけるタイミングチャートの一例である。FIG. 6 is an example of a timing chart of the open failure diagnosis process. 図7は、第2の実施形態におけるオープン故障診断処理の一例を示すフローチャートである。FIG. 7 is a flowchart illustrating an example of an open fault diagnosis process according to the second embodiment. 図8は、第2の実施形態におけるオープン故障診断処理の一例を示すフローチャートである。FIG. 8 is a flowchart illustrating an example of an open fault diagnosis process according to the second embodiment. 図9は、第2の実施形態の場合のオープン故障診断処理におけるタイミングチャートの一例である。FIG. 9 is an example of a timing chart of the open circuit failure diagnosis process according to the second embodiment. 図10は、第3の実施形態におけるオープン故障診断処理の一例を示すフローチャートである。FIG. 10 is a flowchart illustrating an example of an open fault diagnosis process according to the third embodiment. 図11は、オープン故障が発生している場合の電流波形を示す図である。FIG. 11 is a diagram showing a current waveform when an open circuit failure occurs. 図12は、第4の実施形態におけるオープン故障診断処理の一例を示すフローチャートである。FIG. 12 is a flowchart illustrating an example of an open fault diagnosis process according to the fourth embodiment. 図13は、オープン故障が発生している場合の電流波形を示す図である。FIG. 13 is a diagram showing a current waveform when an open circuit failure occurs. 図14は、第4の実施形態におけるオープン故障診断処理の一例を示すフローチャートである。FIG. 14 is a flowchart illustrating an example of an open fault diagnosis process according to the fourth embodiment. 図15は、第4の実施形態の場合のオープン故障診断処理におけるタイミングチャートの一例である。FIG. 15 is an example of a timing chart of the open circuit failure diagnosis process in the fourth embodiment. 図16は、第1の実施形態と第5の実施形態とを比較するための信号波形を示したものである。FIG. 16 shows signal waveforms for comparing the first and fifth embodiments.

 以下、図を参照して本発明を実施するための形態について説明する。以下の記載および図面は、本発明を説明するための例示であって、説明の明確化のため、適宜、省略および簡略化がなされている。また、以下の説明では、同一または類似の要素および処理には同一の符号を付し、重複説明を省略する場合がある。なお、以下に記載する内容はあくまでも本発明の実施の形態の一例を示すものであって、本発明は下記の実施の形態に限定されるものではなく、他の種々の形態でも実施する事が可能である。 Below, a mode for carrying out the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and appropriate omissions and simplifications have been made to clarify the explanation. Furthermore, in the following explanation, the same or similar elements and processes are given the same reference numerals, and duplicate explanations may be omitted. Note that the content described below is merely one example of an embodiment of the present invention, and the present invention is not limited to the embodiment described below, but can be carried out in various other forms.

(第1の実施形態)
 図1~6を参照して本発明に係る駆動装置の第1の実施形態を説明する。図1は、モータ(不図示)で走行する車両の模式図である。車両1は直流電源5から電力が供給される駆動装置2を備える。図示は省略するが、駆動装置2は電力変換装置とモータと減速器を有する。モータの駆動力は、減速器を介して車輪3aが設けられた車軸4へと伝えられる。
(First embodiment)
A first embodiment of a drive unit according to the present invention will be described with reference to Figures 1 to 6. Figure 1 is a schematic diagram of a vehicle that runs on a motor (not shown). The vehicle 1 is equipped with a drive unit 2 to which power is supplied from a DC power source 5. Although not shown, the drive unit 2 has a power conversion device, a motor, and a reducer. The driving force of the motor is transmitted via the reducer to an axle 4 on which wheels 3a are provided.

 なお、図1に示す例では、前輪(車輪3a)の車軸4に駆動装置2を設置しているが、後輪(車輪3b)の車軸に設置してもよい。また、前後輪の車軸4に駆動装置2をそれぞれ設置してもよいし、車軸ではなく左右の各車輪3a,3bにそれぞれ独立した駆動装置2を設置してもよい。また、車軸4に対して図1で記載した駆動装置2とは別に、内燃機関を用いた駆動装置を駆動装置2と並列に設置してもよい。 In the example shown in FIG. 1, the drive unit 2 is installed on the axle 4 of the front wheels (wheels 3a), but it may also be installed on the axle of the rear wheels (wheels 3b). The drive units 2 may also be installed on the axles 4 of the front and rear wheels, or independent drive units 2 may be installed on each of the left and right wheels 3a, 3b instead of on the axles. Also, a drive unit using an internal combustion engine may be installed in parallel with the drive unit 2 on the axle 4, separate from the drive unit 2 described in FIG. 1.

 図2は、駆動装置2の概略構成を示す図である。駆動装置2の周辺には、直流電源5、制御装置6、故障通知装置7が設けられている。制御装置6は、駆動装置2に対して目標トルクτsや動作モードSmなどを送信する。また、制御装置6は駆動装置2から出力される故障通知信号Sfを受け取る。本実施形態では、制御装置6を1つのみ記載しているが、情報の送受信を複数の制御装置が実施してもよい。また、この制御装置6は、例えば、上述した内燃機関を用いた駆動装置の制御機能も備えている。 FIG. 2 is a diagram showing the general configuration of the drive unit 2. A DC power supply 5, a control device 6, and a fault notification device 7 are provided around the drive unit 2. The control device 6 transmits the target torque τs, the operating mode Sm, and the like to the drive unit 2. The control device 6 also receives a fault notification signal Sf output from the drive unit 2. In this embodiment, only one control device 6 is shown, but multiple control devices may send and receive information. The control device 6 also has a control function for the drive unit using the internal combustion engine described above, for example.

 直流電源5は駆動装置2内のモータ9を駆動させるための電源であり、例えばバッテリなどが該当する。故障通知装置7は、駆動装置2からの故障通知信号Sfを受け付け、搭乗者に対して故障の発生を通知する。故障の通知方法としては、例えば、ランプを点灯させる、警告音を発生させる、音声で通知するなどの方法が挙げられる。 The DC power supply 5 is a power supply for driving the motor 9 in the drive device 2, and may be, for example, a battery. The fault notification device 7 receives a fault notification signal Sf from the drive device 2 and notifies the passenger of the occurrence of a fault. Methods for notifying the passenger of a fault include, for example, turning on a lamp, emitting a warning sound, or notifying by voice.

 駆動装置2は、電力変換装置8、モータ9および不図示の減速機を備えている。減速器はモータ9の駆動力を増幅し、車軸4(もしくは車輪3a,3b)へ伝える役割を持つ。モータ9は内部に3個の巻き線を有した3相電動機であり、例えば永久磁石を用いた同期モータや永久磁石を用いない誘導モータが該当する。モータ9は、モータ角度センサ91を備えている。モータ角度センサ91は、モータロータの回転角度を測定し、測定した角度をモータ角度センサ値θmとして電力変換装置8に出力する。 The drive unit 2 is equipped with a power conversion device 8, a motor 9, and a reducer (not shown). The reducer amplifies the driving force of the motor 9 and transmits it to the axle 4 (or wheels 3a, 3b). The motor 9 is a three-phase motor with three internal windings, and may be, for example, a synchronous motor using permanent magnets or an induction motor without permanent magnets. The motor 9 is equipped with a motor angle sensor 91. The motor angle sensor 91 measures the rotation angle of the motor rotor and outputs the measured angle to the power conversion device 8 as a motor angle sensor value θm.

 電力変換装置8は、制御装置6から入力される目標トルクτs等に基づいて、直流電源5から供給される直流電力を交流電力に変換しモータ9に供給する。また、電力変換装置8は、モータ9の動力を直流電力に変換して直流電源5を充電する機能も有する。電力変換装置8は、制御回路80、ドライバ回路81、電力変換回路82、直流電圧センサ83および交流電流センサ84を備えている。 The power conversion device 8 converts the DC power supplied from the DC power source 5 into AC power based on the target torque τs input from the control device 6, and supplies it to the motor 9. The power conversion device 8 also has the function of converting the power of the motor 9 into DC power to charge the DC power source 5. The power conversion device 8 includes a control circuit 80, a driver circuit 81, a power conversion circuit 82, a DC voltage sensor 83, and an AC current sensor 84.

 制御回路80は、制御装置6からの目標トルクτsおよび動作モードSmに基づいて、電力変換装置8から出力されるU,V,W相の各相の電流を所定の値に制御するためのPWM(Pulse Width Modulation)信号pwmを生成する。なお、制御回路80の詳細は後述する。ドライバ回路81は、制御回路80が出力するPWM信号pwmに基づいて、電力変換回路82に設けられた複数のパワー半導体のオン/オフを切り替えるための駆動信号を出力する。 The control circuit 80 generates a PWM (Pulse Width Modulation) signal pwm for controlling the current of each of the U, V, and W phases output from the power conversion device 8 to a predetermined value based on the target torque τs and the operating mode Sm from the control device 6. The details of the control circuit 80 will be described later. The driver circuit 81 outputs a drive signal for switching on/off multiple power semiconductors provided in the power conversion circuit 82 based on the PWM signal pwm output by the control circuit 80.

 直流電圧センサ83は、直流電源5の出力電圧を測定するセンサであり、測定した電圧値を直流電圧センサ値Vdcとして制御回路80に出力する。交流電流センサ84は、モータ9の各相(U相、V相、W相)に流れる交流電流を測定するセンサである。交流電流センサ84が測定した各相の交流電流値は、交流電流センサ値Iu,Iv,Iw(以下では、単に電流Iu,Iv,Iwと呼ぶことにする)として制御回路80に入力される。なお、図2に示す例では、交流電流センサ84は各相に1つずつセンサを備えているが、2相分のみに設けても良い。「U相電流+V相電流+W相電流=0」の関係が成り立つので、2相にセンサを設ける構成の場合には、制御回路80において残り1相分の交流電流センサ値を計算によって算出する。 The DC voltage sensor 83 is a sensor that measures the output voltage of the DC power supply 5, and outputs the measured voltage value as a DC voltage sensor value Vdc to the control circuit 80. The AC current sensor 84 is a sensor that measures the AC current flowing through each phase (U phase, V phase, W phase) of the motor 9. The AC current values of each phase measured by the AC current sensor 84 are input to the control circuit 80 as AC current sensor values Iu, Iv, Iw (hereinafter simply referred to as currents Iu, Iv, Iw). In the example shown in FIG. 2, the AC current sensor 84 is provided with one sensor for each phase, but it may be provided for only two phases. Since the relationship "U phase current + V phase current + W phase current = 0" holds, in the case of a configuration in which sensors are provided for two phases, the control circuit 80 calculates the AC current sensor value for the remaining phase by calculation.

 電力変換回路82は、ドライバ回路81からの駆動信号を受けて内部のパワー半導体を駆動し、モータ9に流れる電流を制御する。図3は、電力変換回路82の構成の一例を示す図である。電力変換回路82は、内部に平滑コンデンサ821と6つのパワー半導体822を有する。相(U相、V相、W相)ごとに、上アームおよび下アームを構成する2つのパワー半導体822がそれぞれ設けられている。各相の上下アームの出力端子は、モータ9の対応する相の巻き線に接続される。 The power conversion circuit 82 receives a drive signal from the driver circuit 81 to drive the internal power semiconductors and control the current flowing through the motor 9. FIG. 3 is a diagram showing an example of the configuration of the power conversion circuit 82. The power conversion circuit 82 has a smoothing capacitor 821 and six power semiconductors 822 inside. Two power semiconductors 822 that constitute an upper arm and a lower arm are provided for each phase (U phase, V phase, W phase). The output terminals of the upper and lower arms of each phase are connected to the windings of the corresponding phase of the motor 9.

 パワー半導体822はドライバ回路81から入力される駆動信号に応じてオン/オフを切り替え、直流電力と交流電力の変換を行う。このパワー半導体822には、例えばパワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)やIGBT(Insulated Gate Bipolar Transistor)などが該当する。図3に示す例では、パワー半導体822としてIGBTを用いている。 The power semiconductor 822 switches on/off in response to the drive signal input from the driver circuit 81, and converts between DC and AC power. Examples of this power semiconductor 822 include a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and an IGBT (Insulated Gate Bipolar Transistor). In the example shown in Figure 3, an IGBT is used as the power semiconductor 822.

 平滑コンデンサ821は、パワー半導体822のオン/オフによって生じる電流を平滑化し、直流電源5から電力変換回路82へ供給される直流電流のリップルを抑制するためのコンデンサである。平滑コンデンサ821には、例えば電解コンデンサやフィルムコンデンサが使用される。 The smoothing capacitor 821 is a capacitor that smoothes the current generated by turning on/off the power semiconductor 822 and suppresses ripples in the DC current supplied from the DC power source 5 to the power conversion circuit 82. For example, an electrolytic capacitor or a film capacitor is used as the smoothing capacitor 821.

 なお、本実施形態では、モータ中性点は浮遊状態であるが、グラウンド(図示せず)と接続しても良い。モータ中性点をグラウンドと接続する際の方法には、直接接地方式、抵抗接地方式、補償リアクトル接地方式、消弧リアクトル接地方式がある。 In this embodiment, the motor neutral point is floating, but it may be connected to ground (not shown). Methods for connecting the motor neutral point to ground include a direct grounding method, a resistive grounding method, a compensating reactor grounding method, and an arc suppression reactor grounding method.

 図4は、制御回路80の機能の詳細を示す制御ブロック図である。制御回路80は内部に不図示のCPU、RAM、ROM、通信回路等を備えている。CPUは、ROMに格納されているプログラムをRAMに展開して実行することにより後述する各部の機能を実現する。ROMは、電気的に書き換え可能なEEPROM(Electrically Erasable Programmable ROM)やフラッシュROMでも良い。 FIG. 4 is a control block diagram showing the detailed functions of the control circuit 80. The control circuit 80 is equipped with a CPU, RAM, ROM, communication circuits, etc. (not shown) inside. The CPU implements the functions of each part described below by expanding a program stored in the ROM into the RAM and executing it. The ROM may be an electrically erasable programmable ROM (EEPROM) or a flash ROM.

 制御回路80は、状態制御部801、目標電流計算部802、電流制御部803、PWM信号生成部804、モータ速度計算部805および診断部806を有する。制御回路80は、外部の制御装置6と通信を行い、上述した動作モードSmや目標トルクτsを制御装置6から受け取る。また、制御回路80は、動作モードSmおよび目標トルクτsに基づいてPWM信号pwmを制御し、図2に示したドライバ回路81を介して電力変換回路82を駆動させる。また、制御回路80は、内部に故障が発生したと判断した場合、図2に示した外部の制御装置6および故障通知装置7に対して故障通知信号Sfを出力する。 The control circuit 80 has a state control unit 801, a target current calculation unit 802, a current control unit 803, a PWM signal generation unit 804, a motor speed calculation unit 805, and a diagnosis unit 806. The control circuit 80 communicates with the external control device 6, and receives the above-mentioned operation mode Sm and target torque τs from the control device 6. The control circuit 80 also controls the PWM signal pwm based on the operation mode Sm and the target torque τs, and drives the power conversion circuit 82 via the driver circuit 81 shown in FIG. 2. If the control circuit 80 determines that a fault has occurred internally, it outputs a fault notification signal Sf to the external control device 6 and fault notification device 7 shown in FIG. 2.

 モータ速度計算部805は、モータ角度センサ値θmに基づいてモータ角速度ω0を計算する。計算したモータ角速度ω0は、目標電流計算部802および診断部806に入力される。 The motor speed calculation unit 805 calculates the motor angular speed ω0 based on the motor angle sensor value θm. The calculated motor angular speed ω0 is input to the target current calculation unit 802 and the diagnosis unit 806.

 状態制御部801は、動作モードSmと診断部806が出力する故障通知信号Sfとを用いて電力変換装置8の動作状態を遷移させ、現在の動作状態をPWM信号生成部804に出力する。動作状態の例としては、例えばPWM状態、3相短絡状態、3相開放状態などが挙げられる。 The state control unit 801 transitions the operating state of the power conversion device 8 using the operating mode Sm and the fault notification signal Sf output by the diagnosis unit 806, and outputs the current operating state to the PWM signal generation unit 804. Examples of operating states include a PWM state, a three-phase short-circuit state, and a three-phase open state.

 目標電流計算部802は、目標トルクτs、直流電圧センサ値Vdcおよびモータ角速度ω0を用いて、モータ9が目標トルクτsと同じトルクを出力するために必要な目標電流値を計算する。目標電流値は電流制御部803に出力される。目標電流値は、例えば、d軸目標電流値とq軸目標電流値の形で表される。 The target current calculation unit 802 uses the target torque τs, the DC voltage sensor value Vdc, and the motor angular velocity ω0 to calculate the target current value required for the motor 9 to output the same torque as the target torque τs. The target current value is output to the current control unit 803. The target current value is expressed, for example, in the form of a d-axis target current value and a q-axis target current value.

 電流制御部803は、目標電流値、電流Iu,Iv,Iw、モータ角度センサ値θm、直流電圧センサ値Vdcを用いて、モータ9を流れる交流電流が目標電流値に追従するようにフィードバック制御を行い、PWM制御における3相分のデューティ値Du,Dv,Dwを計算する。そして、デューティ値Du,Dv,Dwは、PWM信号生成部804に入力される。 The current control unit 803 performs feedback control using the target current value, currents Iu, Iv, Iw, motor angle sensor value θm, and DC voltage sensor value Vdc so that the AC current flowing through the motor 9 follows the target current value, and calculates duty values Du, Dv, Dw for three phases in PWM control. The duty values Du, Dv, Dw are then input to the PWM signal generation unit 804.

 PWM信号生成部804は、状態制御部801から出力される動作状態に応じて、ドライバ回路81に出力する信号を切り替える。PWM信号生成部804は内部にタイマ(図示せず)を有しており、動作状態がPWM状態である場合には、このタイマ値と電流制御部803が出力する各相のデューティ値Du,Dv,Dwを用いてPWM信号pwmを生成する。そして、PWM信号生成部804は、生成したPWM信号pwmを図2に示すドライバ回路81へ出力する。 The PWM signal generating unit 804 switches the signal to be output to the driver circuit 81 depending on the operating state output from the state control unit 801. The PWM signal generating unit 804 has an internal timer (not shown), and when the operating state is the PWM state, it generates a PWM signal pwm using this timer value and the duty values Du, Dv, and Dw of each phase output by the current control unit 803. The PWM signal generating unit 804 then outputs the generated PWM signal pwm to the driver circuit 81 shown in FIG. 2.

 一方、動作状態が3相開放状態である場合は、電力変換回路82内の6個のパワー半導体822(図3参照)をすべてオフにするPWM信号pwmを生成する。また、動作状態が3相短絡状態である場合は、電力変換回路82内の6個のパワー半導体822の内、上アームのパワー半導体822をすべてオフにし、下アームのパワー半導体822をすべてオンにするPWM信号pwm、あるいは、上アームのパワー半導体822をすべてオンにし下アームのパワー半導体822をすべてオフにするPWM信号pwmを生成する。生成されたPWM信号pwmはドライバ回路81へ出力される。 On the other hand, when the operating state is a three-phase open state, a PWM signal pwm is generated that turns off all six power semiconductors 822 (see FIG. 3) in the power conversion circuit 82. When the operating state is a three-phase short-circuit state, a PWM signal pwm is generated that turns off all of the power semiconductors 822 in the upper arm and turns on all of the power semiconductors 822 in the lower arm, or turns on all of the power semiconductors 822 in the upper arm and turns off all of the power semiconductors 822 in the lower arm. The generated PWM signal pwm is output to the driver circuit 81.

 診断部806は、電流Iu,Iv,Iw、モータ速度計算部805で算出されたモータ角速度ω0および目標電流計算部802で算出された目標電流値に基づいて、電力変換装置8内部の故障を診断する。診断の結果、故障を検知した場合には、診断部806は、故障箇所の内容を故障通知信号Sfとして状態制御部801や外部の制御装置6および故障通知装置7に出力する。 The diagnosis unit 806 diagnoses faults within the power conversion device 8 based on the currents Iu, Iv, and Iw, the motor angular velocity ω0 calculated by the motor speed calculation unit 805, and the target current value calculated by the target current calculation unit 802. If a fault is detected as a result of the diagnosis, the diagnosis unit 806 outputs the details of the fault location as a fault notification signal Sf to the state control unit 801, the external control device 6, and the fault notification device 7.

(オープン故障診断の処理)
 図5は、診断部806により実行されるオープン故障診断処理の一例を示すフローチャートである。診断部806は、図5に示す一連の処理を一定の時間周期で繰り返し実行する。
(Open fault diagnosis processing)
Fig. 5 is a flowchart showing an example of an open circuit failure diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes a series of processes shown in Fig. 5 at a fixed time interval.

 ステップS100では、診断部806は、目標電流計算部802から入力された目標電流値が閾値Th1より大きいか否かを判定する。ステップS100において、目標電流値が閾値Th1より大きいと判定されるとステップS101へ進み、目標電流値が閾値Th1以下であると判定されると図5の診断処理を終了する。 In step S100, the diagnosis unit 806 determines whether the target current value input from the target current calculation unit 802 is greater than the threshold value Th1. If it is determined in step S100 that the target current value is greater than the threshold value Th1, the process proceeds to step S101, and if it is determined that the target current value is equal to or less than the threshold value Th1, the diagnosis process in FIG. 5 is terminated.

 ステップS101では、相毎のループ処理を開始する。図5のフローチャートにおいて、ステップS101からステップS113までのループ処理は、U相、V相、W相の相毎にそれぞれ行われる。以下では、U相に関して説明し、V相およびW相に関する説明は省略する。 In step S101, loop processing for each phase is started. In the flowchart of FIG. 5, the loop processing from step S101 to step S113 is performed for each of the U phase, V phase, and W phase. The following describes the U phase, and descriptions of the V phase and W phase are omitted.

 ステップS102では、診断部806は、U相の電流Iuの絶対値(図5では|電流|と表す)が閾値Th2よりも小さいか否かを判定する。ステップS102において電流Iuの絶対値が閾値Th2よりも小さいと判定されると、ステップS104へ進む。一方、電流Iuの絶対値が閾値Th2以上であると判定されると、ステップS106へ進む。 In step S102, the diagnosis unit 806 determines whether the absolute value of the U-phase current Iu (represented as |Current| in FIG. 5) is smaller than the threshold value Th2. If it is determined in step S102 that the absolute value of the current Iu is smaller than the threshold value Th2, the process proceeds to step S104. On the other hand, if it is determined that the absolute value of the current Iu is equal to or greater than the threshold value Th2, the process proceeds to step S106.

 電流Iuが|Iu|<Th2であってステップS104へ進んだ場合には、診断部806は、ステップS104においてU相の故障検知カウンタCに、電流の周波数に応じた所定加算量を加算する。一方、電流Iuが|Iu|≧Th2であってステップS106へ進んだ場合には、診断部806は、ステップS106においてU相の故障検知カウンタCから、電流の周波数に応じた所定減算量を減算する。 If the current Iu is |Iu|<Th2 and the process proceeds to step S104, the diagnosis unit 806 adds a predetermined additional amount according to the current frequency to the U-phase fault detection counter C in step S104. On the other hand, if the current Iu is |Iu| ≧Th2 and the process proceeds to step S106, the diagnosis unit 806 subtracts a predetermined subtraction amount according to the current frequency from the U-phase fault detection counter C in step S106.

 ここで、ステップS104の所定加算量およびステップS106の所定減算量は、電流の周波数に比例した値とする。すなわち、電流の周波数が高いほど、所定加算量および所定減算量を大きく設定する。電流の周波数はモータ速度に比例するので、モータ速度計算部805で算出されたモータ角速度ω0に基づいて所定加算量および所定減算量を設定する。その場合、モータ角速度ω0から電流周波数を算出しても良いし、所定加算量および所定減算量をモータ角速度ω0自体に比例した値としても良い。もちろん、入力された電流Iu,Iv,Iwから電流の周波数を算出するようにしても良い。 Here, the predetermined addition amount in step S104 and the predetermined subtraction amount in step S106 are values proportional to the frequency of the current. In other words, the higher the current frequency, the larger the predetermined addition amount and the predetermined subtraction amount are set. Since the current frequency is proportional to the motor speed, the predetermined addition amount and the predetermined subtraction amount are set based on the motor angular velocity ω0 calculated by the motor speed calculation unit 805. In that case, the current frequency may be calculated from the motor angular velocity ω0, or the predetermined addition amount and the predetermined subtraction amount may be values proportional to the motor angular velocity ω0 itself. Of course, the current frequency may also be calculated from the input currents Iu, Iv, and Iw.

 ステップS104およびステップS106の処理が終了すると、ステップS108へ進む。ステップS108では、診断部806は、U相の故障検知カウンタCが閾値Th3を超えているか否かを判定する。故障検知カウンタが閾値Th3を超えている場合には、ステップS110へ進んでU相のパワー半導体822がオープン故障していると診断する。一方、故障検知カウンタCが閾値Th3を超えていない場合には、ステップS112へ進んでU相のパワー半導体822は正常であると診断する。 When the processing of steps S104 and S106 is completed, the process proceeds to step S108. In step S108, the diagnosis unit 806 determines whether the U-phase failure detection counter C exceeds the threshold value Th3. If the failure detection counter exceeds the threshold value Th3, the process proceeds to step S110, where it is diagnosed that the U-phase power semiconductor 822 has an open failure. On the other hand, if the failure detection counter C does not exceed the threshold value Th3, the process proceeds to step S112, where it is diagnosed that the U-phase power semiconductor 822 is normal.

 ステップS110およびステップS112の処理が終了すると、ステップS113へ進む。ステップS113ではU相のループ処理を完了し、その後、ステップS101へ戻ってV相に関するループ処理を実行する。そして、V相に関するループ処理が完了したならば、再びステップS101へ戻ってW相に関するループ処理を実行する。説明は省略するが、V相およびW相に関しても、U相の場合と同様の処理がステップS102~S112において実行される。 When the processing of steps S110 and S112 is completed, the process proceeds to step S113. In step S113, the loop processing of the U phase is completed, and then the process returns to step S101 to execute the loop processing for the V phase. Then, once the loop processing for the V phase is completed, the process returns again to step S101 to execute the loop processing for the W phase. Although not explained here, the same processing as for the U phase is executed in steps S102 to S112 for the V and W phases.

 図6は、オープン故障診断処理におけるタイミングチャートの一例であり、U相を例に示した。信号波形(a),(b)は、電流Iuの周波数が低い場合の例を示したものである。信号波形(a)の実線は電流Iuの変化を示す。信号波形(b)の実線は故障検知カウンタCの変化を示す。一方、信号波形(c),(d)は電流Iuの周波数が高い場合の例を示したものである。信号波形(c)の実線は電流Iuの変化を示す。信号波形(d)の実線は故障検知カウンタCの変化を示す。いずれの信号波形の場合も、横軸は時間tである。 Figure 6 is an example of a timing chart for open fault diagnosis processing, showing the U phase as an example. Signal waveforms (a) and (b) show an example when the frequency of current Iu is low. The solid line in signal waveform (a) shows the change in current Iu. The solid line in signal waveform (b) shows the change in fault detection counter C. On the other hand, signal waveforms (c) and (d) show an example when the frequency of current Iu is high. The solid line in signal waveform (c) shows the change in current Iu. The solid line in signal waveform (d) shows the change in fault detection counter C. In all signal waveforms, the horizontal axis is time t.

 図6に示す例では時刻t1にオープン故障が発生している。時刻t1より以前の正常時には、モータ9には正弦波状の電流が流れる。しかし、時刻t1にU相のパワー半導体822にオープン故障が発生すると、U相においては正負いずれかの方向に電流が流れなくなる。図6はU相の上アームのパワー半導体822がオープン故障である場合を示したもので、正方向に電流が流れなくなっている。 In the example shown in Figure 6, an open circuit fault occurs at time t1. Before time t1, under normal conditions, a sinusoidal current flows through the motor 9. However, when an open circuit fault occurs in the U-phase power semiconductor 822 at time t1, no current flows in either the positive or negative direction in the U-phase. Figure 6 shows a case where an open circuit fault occurs in the power semiconductor 822 of the upper arm of the U-phase, and no current flows in the positive direction.

 正常時であっても、信号波形(a),(c)に示すように、電流Iuの絶対値が閾値Th2未満である時間帯は存在する。しかし、閾値Th2未満となる時間帯は電流Iuの1周期に比べて短いので、故障検知カウンタCは閾値Th3を超えることがない。一方、パワー半導体822のオープン故障が発生すると電流Iuが正方向に流れなくなり、その状態が続く約1/2周期の間は、電流Iuの値はほぼ0[A]になる。電流Iuの値がほぼ0[A]となる状態においては、電流Iuの絶対値は閾値Th2未満であるため、常にステップS102からステップS104へと進み、故障検知カウンタCの加算が繰り返される。そして、故障検知カウンタCが閾値Th3を超えた(C>Th3)時点(時刻t2)で、診断部806はパワー半導体822がオープン故障していると診断する。 Even under normal conditions, as shown in the signal waveforms (a) and (c), there is a time period during which the absolute value of the current Iu is less than the threshold value Th2. However, since the time period during which the current Iu is less than the threshold value Th2 is shorter than one period of the current Iu, the fault detection counter C does not exceed the threshold value Th3. On the other hand, when an open fault occurs in the power semiconductor 822, the current Iu stops flowing in the positive direction, and the value of the current Iu becomes almost 0 [A] during the approximately 1/2 period during which this state continues. When the value of the current Iu is almost 0 [A], the absolute value of the current Iu is less than the threshold value Th2, so the process always proceeds from step S102 to step S104, and the increment of the fault detection counter C is repeated. Then, at the point (time t2) when the fault detection counter C exceeds the threshold value Th3 (C>Th3), the diagnostic unit 806 diagnoses that the power semiconductor 822 has an open fault.

 本実施形態では、図5のステップS104およびS106で説明したように、電流の周波数が高いほど故障検知カウンタCの加減算量を大きく設定するようにしている。ここで、比較例として、故障検知カウンタCの加減算量を電流の周波数によらず一定とした場合を考える。図6の信号波形(b),(d)に示す一点鎖線のラインL1,L2は比較例の場合を示している。 In this embodiment, as explained in steps S104 and S106 of FIG. 5, the higher the current frequency, the larger the increment/decrement amount of the fault detection counter C is set. As a comparative example, consider a case where the increment/decrement amount of the fault detection counter C is constant regardless of the current frequency. The dashed lines L1 and L2 shown in the signal waveforms (b) and (d) of FIG. 6 show the comparative example.

 信号波形(a),(c)に示すように、正常時に閾値Th2未満となる時間帯は電流Iuの周波数が低いほど長い。診断処理は電流Iuの周波数によらず一定周期で実施される。そのため、信号波形(c)のように電流Iuの周波数が高い場合であっても、時刻t1に故障が発生してほぼ1/2周期が経過するまでに故障検知カウンタCが閾値Th3を超えるように、故障検知カウンタCの加減算量を設定する必要がある。このように、加減算量を設定した場合、比較例の場合の加減算量は周波数によらず一定なので、信号波形(a)のように電流Iuの周波数が低い場合には、正常時における故障検知カウンタCはラインL1で示すようになる。その結果、比較例の加減算量設定方法の場合には、正常時においても、パワー半導体822がオープン故障していると誤診断されてしまうことになる。 As shown in signal waveforms (a) and (c), the time period during which the current Iu is below the threshold value Th2 during normal operation is longer as the frequency of the current Iu is lower. The diagnostic process is performed at a constant cycle regardless of the frequency of the current Iu. Therefore, even when the frequency of the current Iu is high as in signal waveform (c), it is necessary to set the amount of addition/subtraction of the fault detection counter C so that the fault detection counter C exceeds the threshold value Th3 by the time approximately 1/2 cycle has elapsed since the fault occurred at time t1. When the amount of addition/subtraction is set in this way, since the amount of addition/subtraction in the comparative example is constant regardless of frequency, when the frequency of the current Iu is low as in signal waveform (a), the fault detection counter C during normal operation is as shown by line L1. As a result, in the case of the method of setting the amount of addition/subtraction in the comparative example, the power semiconductor 822 is erroneously diagnosed as having an open circuit fault even during normal operation.

 逆に、電流Iuの周波数が低い場合において、オープン故障発生時に1/2周期以内に故障が検知され、正常時にオープン故障の誤診断が発生しないように故障検知カウンタCの加減算量を設定した場合を考える。すなわち、電流Iuの周波数によらず、図6の信号波形(b)の実線で示すように故障検知カウンタCの加減算量に設定する。そのように設定すると、信号波形(c)のように電流Iuの周波数が高い場合には、オープン故障発生後の故障検知カウンタCは信号波形(d)のラインL2で示すようになる。その結果、故障検知カウンタCが閾値Th3に到達できず、パワー半導体822のオープン故障を検知できない可能性がある。 Conversely, consider a case where the increment/decrement of the fault detection counter C is set so that when the frequency of the current Iu is low, the fault is detected within 1/2 period when an open fault occurs, and a false diagnosis of an open fault does not occur under normal conditions. That is, regardless of the frequency of the current Iu, the increment/decrement of the fault detection counter C is set as shown by the solid line in the signal waveform (b) of FIG. 6. With this setting, when the frequency of the current Iu is high as in the signal waveform (c), the fault detection counter C after the occurrence of an open fault will be as shown by line L2 in the signal waveform (d). As a result, the fault detection counter C may not reach the threshold value Th3, and an open fault in the power semiconductor 822 may not be detected.

 一方、第1の実施形態では、電流の周波数が高いほど故障検知カウンタCの加減算量を大きく設定するようにしている。そのため、図6の信号波形(b),(d)の実線で示すように、オープン故障発生時において電流変化の1/2周期内で故障検知カウンタCが閾値Th3に到達し、かつ、正常時において故障検知カウンタCが閾値Th3に到達しないように、故障検知カウンタCの加減算量を設定することが可能となる。その結果、電流の周波数の高低によらず安定したオープン故障診断を行うことができる。 On the other hand, in the first embodiment, the higher the current frequency, the larger the increment/decrement amount of the fault detection counter C is set. Therefore, as shown by the solid lines in the signal waveforms (b) and (d) of Figure 6, it is possible to set the increment/decrement amount of the fault detection counter C so that when an open fault occurs, the fault detection counter C reaches the threshold value Th3 within 1/2 the period of the current change, and so that the fault detection counter C does not reach the threshold value Th3 under normal conditions. As a result, stable open fault diagnosis can be performed regardless of the high or low frequency of the current.

 また、ステップS100の処理を行うことにより、目標電流値が閾値Th1以下である場合には、オープン故障診断の処理を実施しないようにしている。例えば、ステップS100の処理を設けない場合には、オープン故障が発生していない場合であっても、モータ9を流れる電流の絶対値が閾値Th2よりも小さい場合には、故障検知カウンタCが閾値Th3を超えてオープン故障と誤診断されるおそれがある。そのため、本実施形態では、ステップS100の処理を行うことにより、そのような誤診断を回避することができる。 In addition, by performing the processing of step S100, if the target current value is equal to or less than the threshold value Th1, the processing of the open fault diagnosis is not performed. For example, if the processing of step S100 is not provided, even if an open fault has not occurred, if the absolute value of the current flowing through the motor 9 is smaller than the threshold value Th2, the fault detection counter C may exceed the threshold value Th3, resulting in a misdiagnosis of an open fault. Therefore, in this embodiment, by performing the processing of step S100, such a misdiagnosis can be avoided.

 なお、モータ9に電流をどの程度流すかは、目標トルクτsとモータ速度(すなわち、モータ角速度ω0)によって決まる。そのため、ステップS100の判定処理において、目標電流値を使用する代わりに、目標トルクτsとモータ角速度ω0を使用して判定を行っても良い。 The amount of current to be passed through the motor 9 is determined by the target torque τs and the motor speed (i.e., the motor angular speed ω0). Therefore, in the determination process of step S100, the determination may be made using the target torque τs and the motor angular speed ω0 instead of using the target current value.

 上述したように、第1の実施形態では、電流の周波数が高いほど故障検知カウンタCの加減算量を大きく設定することにより、モータ回転速度(すなわち、電流の周波数)の高低によらず、パワー半導体822のオープン故障を検知することができる。さらに、第1の実施形態では、モータ回転速度の高低によらず電流Iuの約1/2周期の期間内でオープン故障が検知されるので、素早い故障検知を行うことができる。 As described above, in the first embodiment, by setting the increment/decrement amount of the fault detection counter C to a larger amount as the current frequency increases, it is possible to detect an open fault in the power semiconductor 822 regardless of the motor rotation speed (i.e., the current frequency). Furthermore, in the first embodiment, an open fault is detected within a period of approximately 1/2 the cycle of the current Iu regardless of the motor rotation speed, allowing for rapid fault detection.

(第2の実施形態)
 図7~9を参照して、本発明の駆動装置の第2の実施形態について説明する。第2の実施形態においても、図1に示す車両1に搭載される駆動装置2を例に説明する。なお、駆動装置2の概略構成、駆動装置2の電力変換装置8に設けられた電力変換回路82の構成、および、電力変換装置8に設けられた制御回路80の構成は、上述した第1の実施形態の図2,3,4に示す構成と同様である。
Second Embodiment
A second embodiment of a drive device of the present invention will be described with reference to Figures 7 to 9. In the second embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 of the first embodiment described above.

 図7,8は、制御回路80の診断部806(図4参照)により実行されるオープン故障診断処理の一例を示すフローチャートである。診断部806は、図7に示す処理および図8に示す処理を、それぞれ一定の時間周期で繰り返し実行する。なお、図7,8の処理の実行周期は同一でも良いし、異なっていても良い。 FIGS. 7 and 8 are flowcharts showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806 (see FIG. 4) of the control circuit 80. The diagnosis unit 806 repeatedly executes the process shown in FIG. 7 and the process shown in FIG. 8 at regular time intervals. Note that the execution periods of the processes in FIG. 7 and FIG. 8 may be the same or different.

 まず、図7のフローチャートについて説明する。図7のフローチャートにおいて、ステップS100,S101,S102,S104,S106およびS113の処理は、図5に示したフローチャートの同一符号を付したステップと同一の処理を行う。以下では、上述した第1の実施形態と異なる部分を主に説明し、第1の実施形態と同一の部分については説明を省略する。また、ステップS101で開始される相単位のループ処理の内、U相に関する処理について説明する。 First, the flowchart in FIG. 7 will be described. In the flowchart in FIG. 7, the processes in steps S100, S101, S102, S104, S106, and S113 are the same as those in the flowchart in FIG. 5, which are given the same reference numerals. In the following, the differences from the first embodiment described above will be mainly described, and the same parts as the first embodiment will not be described. In addition, the process related to the U phase of the loop process per phase that starts in step S101 will be described.

 図7のステップS104またはステップS106の処理が終了すると、ステップS200へ進む。ステップS200では、診断部806は、U相の故障検知カウンタCが閾値Th3Aを超えているか否かを判定する。ステップS200でC>Th3Aと判定されると、ステップS202へ進んでU相の異常フラグをセットする。一方、ステップS200でC≦Th3Aと判定されると、ステップS204へ進んでU相の故障検知カウンタCが閾値Th3Bを下回っているか否かを判定する。ステップS204でC<Th3Bと判定されると、ステップS206へ進んでU相の異常フラグをリセットする。一方、ステップS204でC≧Th3Bと判定されるとステップS113へ進む。なお、閾値Th3BはTh3B<Th3Aのように設定される。 When the processing of step S104 or step S106 in FIG. 7 is completed, the process proceeds to step S200. In step S200, the diagnosis unit 806 judges whether the U-phase fault detection counter C exceeds the threshold value Th3A. If it is judged in step S200 that C>Th3A, the process proceeds to step S202, where the U-phase abnormality flag is set. On the other hand, if it is judged in step S200 that C≦Th3A, the process proceeds to step S204, where it is judged whether the U-phase fault detection counter C is below the threshold value Th3B. If it is judged in step S204 that C<Th3B, the process proceeds to step S206, where the U-phase abnormality flag is reset. On the other hand, if it is judged in step S204 that C≧Th3B, the process proceeds to step S113. The threshold value Th3B is set so that Th3B<Th3A.

 ステップS113ではU相のループ処理を完了し、その後、ステップS101へ戻ってV相に関するループ処理を実行する。そして、V相に関するループ処理が完了したならば、再びステップS101へ戻ってW相に関するループ処理を実行する。説明は省略するが、V相およびW相に関しても、上述したU相の場合と同様の処理が実行される。 In step S113, the loop processing for the U phase is completed, and then the process returns to step S101 to execute the loop processing for the V phase. Then, once the loop processing for the V phase is completed, the process returns to step S101 again to execute the loop processing for the W phase. Although not explained further, the same processing as that for the U phase described above is executed for the V and W phases.

 次に、図8のフローチャートについて説明する。ステップS300では、診断部806は、各相の内のいずれかの相の異常フラグがセットされているか否かを判定する。ステップS300でセットされていると判定されると(yes)、ステップS302へ進みデバウンスカウンタCdを加算する。一方、全ての相の異常フラグがリセット状態の場合には、ステップS300でnoと判定されてステップS304へ進み、デバウンスカウンタCdを減算する。 Next, the flowchart in FIG. 8 will be described. In step S300, the diagnosis unit 806 determines whether or not an abnormality flag is set for any of the phases. If it is determined in step S300 that the abnormality flag is set (yes), the process proceeds to step S302, where the debounce counter Cd is incremented. On the other hand, if the abnormality flags for all phases are reset, the process proceeds to step S304, where the debounce counter Cd is decremented.

 ステップS306では、診断部806は、デバウンスカウンタCdが閾値Th4を超えているか否かを判定する。ステップS306でCd>Th4と判定されると、ステップS308へ進んでパワー半導体822がオープン故障していると診断する。一方、ステップS306でCd≦Th4と判定されると、パワー半導体822は正常であると診断する。 In step S306, the diagnostic unit 806 determines whether the debounce counter Cd exceeds the threshold value Th4. If it is determined in step S306 that Cd>Th4, the process proceeds to step S308, where the power semiconductor 822 is diagnosed as having an open circuit fault. On the other hand, if it is determined in step S306 that Cd≦Th4, the power semiconductor 822 is diagnosed as being normal.

 図9は、第2の実施形態におけるオープン故障診断処理のタイミングチャートの一例を示したものであり、U相を例に示した。信号波形(a)の実線は電流Iuの変化を示し、信号波形(b)の実線は故障検知カウンタCの変化し、信号波形(c)の実線は異常フラグの変化を示し、信号波形(d)の実線はデバウンスカウンタCdの変化を示す。いずれの信号波形の場合も、横軸は時間tである。 FIG. 9 shows an example of a timing chart of the open fault diagnosis process in the second embodiment, using the U phase as an example. The solid line in signal waveform (a) indicates the change in current Iu, the solid line in signal waveform (b) indicates the change in fault detection counter C, the solid line in signal waveform (c) indicates the change in the abnormality flag, and the solid line in signal waveform (d) indicates the change in debounce counter Cd. In all cases of signal waveforms, the horizontal axis is time t.

 図9の場合も、図6の場合と同様に時刻t1においてオープン故障が発生している。時刻t1にU相の上アームのパワー半導体822にオープン故障が発生し、それ以降、正方向に電流が流れなくなっている。時刻t1以降は電流Iuがゼロの状態がしばらく続くので、故障検知カウンタCは加算されて増加する。そして、時刻t2に故障検知カウンタCが閾値Th3Aを超えると、異常フラグがセットされる。その後、電流IuがIu≦-Th2となると故障検知カウンタCが減算され、Th2>Iu>-Th2となると故障検知カウンタCが加算される。その結果、故障検知カウンタCは、信号波形(b)に示すように増加、減少を繰り返す。 In the case of Figure 9, as in the case of Figure 6, an open circuit fault occurs at time t1. At time t1, an open circuit fault occurs in the power semiconductor 822 of the upper arm of the U-phase, and thereafter, no current flows in the positive direction. Since the current Iu remains at zero for a while after time t1, the fault detection counter C is incremented and increases. Then, when the fault detection counter C exceeds the threshold value Th3A at time t2, an abnormality flag is set. Thereafter, when the current Iu becomes Iu <= -Th2, the fault detection counter C is decremented, and when Th2 > Iu > -Th2, the fault detection counter C is incremented. As a result, the fault detection counter C repeatedly increases and decreases, as shown in the signal waveform (b).

 図9では、区間(Th2>Iu>-Th2)における故障検知カウンタCの増加量が区間(Iu≦-Th2)における減少量よりも大きくなるように、ステップS104における加算量およびステップS106における減算量が設定されている。その結果、故障検知カウンタCの増加→減少、減少→増加の折り返し点は徐々に図示上方に移動し、故障検知カウンタCはC≧Th3の状態が維持されて異常フラグのセット状態が維持される。 In Figure 9, the amount added in step S104 and the amount subtracted in step S106 are set so that the increase in the fault detection counter C in the interval (Th2>Iu>-Th2) is greater than the decrease in the interval (Iu≦-Th2). As a result, the turning point of the fault detection counter C from increase to decrease and decrease to increase gradually moves upward in the figure, and the fault detection counter C is maintained in the state of C≧Th3, and the abnormality flag is maintained in the set state.

 異常フラグがセット状態(時刻t2)となった後の時刻t3に、図8のステップS300が実行されると、ステップS302の処理が行われ、信号波形(d)に示すようにデバウンスカウンタCdが加算される。その後、一定の時間周期で図8の処理が繰り返される度に、デバウンスカウンタCdが加算される。そして、時刻t4にデバウンスカウンタCdが閾値Th4を超えると、図8のステップ308が実行されてオープン故障と診断される。 When step S300 in FIG. 8 is executed at time t3 after the abnormality flag is set (time t2), the process of step S302 is performed and the debounce counter Cd is incremented as shown in the signal waveform (d). Thereafter, the debounce counter Cd is incremented each time the process of FIG. 8 is repeated at a fixed time period. Then, when the debounce counter Cd exceeds the threshold value Th4 at time t4, step 308 in FIG. 8 is executed and an open failure is diagnosed.

 上述したように、第2の実施形態では、故障検知カウンタCが閾値Th3Aを超えた場合に異常フラグをセットし、この異常フラグのセット状態は故障検知カウンタCが閾値Th3Bを下回るまで継続する。そして、デバウンスカウンタCdの加減算を異常フラグの状態に基づいて実行することで、デバウンスカウンタCdの処理タイミングによらず安定して故障か正常かの診断を行うことができる。 As described above, in the second embodiment, when the fault detection counter C exceeds the threshold value Th3A, an abnormality flag is set, and the abnormality flag remains set until the fault detection counter C falls below the threshold value Th3B. Then, by performing increments and decrements on the debounce counter Cd based on the state of the abnormality flag, a stable diagnosis of fault or normality can be performed regardless of the processing timing of the debounce counter Cd.

 前述した第1の実施形態の場合には、電流Iuの約1/2周期のあいだ電流が流れない状態が発生すると、故障検知カウンタCが閾値Th3を超えてオープン故障が検知されるので、素早くオープン故障を検知することができる。一方、第2の実施形態では、上述のような異常フラグに基づくデバウンスカウンタCdを導入することにより、ノイズなどの偶発的影響による誤検知の発生を回避して、オープン故障診断の安定性向上を図っている。図9に示す例では、電流Iuが流れない状態の発生がほぼ3周期続いた場合に、Cd>Th4となりオープン故障と診断される。このオープン故障と判定されるまでの時間は図8の処理の実行周期に依存するので、実行周期をより短くすることで診断処理時間をより短くすることができる。 In the case of the first embodiment described above, when a state occurs in which no current flows for approximately 1/2 the cycle of the current Iu, the fault detection counter C exceeds the threshold value Th3 and an open fault is detected, so that the open fault can be detected quickly. On the other hand, in the second embodiment, by introducing a debounce counter Cd based on the abnormality flag as described above, the occurrence of erroneous detection due to accidental influences such as noise is avoided, and the stability of the open fault diagnosis is improved. In the example shown in Figure 9, when a state in which no current Iu flows occurs for approximately three consecutive cycles, Cd>Th4 and an open fault is diagnosed. The time until this open fault is determined depends on the execution cycle of the process in Figure 8, so the diagnostic processing time can be shortened by shortening the execution cycle.

 なお、信号波形(b)からも分かるように、パワー半導体822のオープン故障発生時は、電流Iuの1周期の内の約1/2周期は電流が流れなくなり、約1/2周期は電流が流れる。そのため、故障検知カウンタCの値(すなわち加算量および減算量の積算値)は、加算の後の減算によって0に近い値となる場合がある。そのため、閾値Th3Bの設定によっては、パワー半導体822のオープン故障が発生しているにもかかわらず故障検知カウンタCが閾値Th3Bを下回って、異常フラグがリセットされてしまうことがある。 As can be seen from the signal waveform (b), when an open fault occurs in the power semiconductor 822, current stops flowing for approximately 1/2 of one cycle of the current Iu, and current flows for approximately 1/2 of the cycle. As a result, the value of the fault detection counter C (i.e., the integrated value of the addition and subtraction amounts) may become close to 0 due to the subtraction after the addition. Therefore, depending on the setting of the threshold value Th3B, the fault detection counter C may fall below the threshold value Th3B and the abnormality flag may be reset even if an open fault occurs in the power semiconductor 822.

 そこで、故障検知カウンタCが閾値Th3Aを上回って異常フラグがセットされた際(図9の時刻t2)に、故障検知カウンタCをさらに一定数ΔCだけ加算する。そうすることで、時刻t2以降の故障検知カウンタCのラインが一定数ΔCだけ図示上方にシフトする。その結果、オープン故障発生時における異常フラグのリセットが防止され、オープン故障を見逃す可能性を低減できる。 Therefore, when the fault detection counter C exceeds the threshold value Th3A and the abnormality flag is set (time t2 in FIG. 9), the fault detection counter C is further incremented by a fixed number ΔC. By doing so, the line of the fault detection counter C from time t2 onwards is shifted upward in the figure by a fixed number ΔC. As a result, the reset of the abnormality flag when an open fault occurs is prevented, reducing the possibility of overlooking an open fault.

(第3の実施形態)
 図10,11を参照して、本発明の駆動装置の第3の実施形態について説明する。第3の実施形態においても、図1に示す車両1に搭載される駆動装置2を例に説明する。なお、駆動装置2の概略構成、駆動装置2の電力変換装置8に設けられた電力変換回路82の構成、および、電力変換装置8に設けられた制御回路80の構成は、上述した図2,3,4に示す構成と同様である。
Third Embodiment
A third embodiment of the drive device of the present invention will be described with reference to Figures 10 and 11. In the third embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.

 図10は、診断部806により実行されるオープン故障診断処理の一例を示すフローチャートである。診断部806は、図10に示す一連の処理を一定の時間周期で繰り返し実行する。図10のフローチャートは、図5に示したフローチャートにステップS400を追加したものである。以下では、上述した第1の実施形態と異なる部分を主に説明し、第1の実施形態と同一の部分については説明を省略する。また、ステップS101で開始される相単位のループ処理の内、U相に関する処理について説明する。 FIG. 10 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 10 at a fixed time interval. The flowchart in FIG. 10 is obtained by adding step S400 to the flowchart shown in FIG. 5. The following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment. In addition, the process related to the U phase of the phase-by-phase loop process that begins in step S101 will be described.

 図10のステップS400では、診断部806は、閾値Th2を電流Iuの周波数に応じた値に設定する。具体的には、電流Iuの周波数が高いほど、閾値Th2を大きく設定する。なお、電流の周波数はモータ速度に比例するので、ここでは、モータ速度計算部805で算出されたモータ角速度ω0に基づいて閾値Th2を設定する。その場合、モータ角速度ω0から電流周波数を算出しても良いし、閾値Th2をモータ角速度ω0自体に比例した値としても良い。もちろん、入力された電流Iu,Iv,Iwから電流の周波数を算出するようにしても良い。 In step S400 of FIG. 10, the diagnosis unit 806 sets the threshold value Th2 to a value corresponding to the frequency of the current Iu. Specifically, the higher the frequency of the current Iu, the larger the threshold value Th2 is set. Note that since the current frequency is proportional to the motor speed, here, the threshold value Th2 is set based on the motor angular velocity ω0 calculated by the motor speed calculation unit 805. In that case, the current frequency may be calculated from the motor angular velocity ω0, or the threshold value Th2 may be set to a value proportional to the motor angular velocity ω0 itself. Of course, the current frequency may also be calculated from the input currents Iu, Iv, and Iw.

 ステップS102では、ステップS400で設定した閾値Th2を用いて、電流Iuの絶対値が閾値Th2を超えているか否かを判定する。ステップS102以降の処理は図5に示したフローチャートの場合と同様であり、説明を省略する。また、V相およびW相に関する処理も、U相の場合と同様に行われる。 In step S102, the threshold value Th2 set in step S400 is used to determine whether the absolute value of the current Iu exceeds the threshold value Th2. The processing from step S102 onwards is the same as in the flowchart shown in Figure 5, and so a description thereof will be omitted. In addition, the processing relating to the V phase and W phase is performed in the same manner as in the case of the U phase.

 図11は、パワー半導体822のオープン故障が発生している場合の電流波形を示したものであり、電流波形(a)はモータ速度が低い場合の波形を示し、電流波形(b)はモータ速度が高い場合の波形を示す。いずれの場合も、横軸は時間である。パワー半導体822のオープン故障が発生すると、電流の約1/2周期の区間においては故障した相に電流が流れなくなる。 Figure 11 shows the current waveforms when an open failure occurs in power semiconductor 822, where current waveform (a) shows the waveform when the motor speed is low, and current waveform (b) shows the waveform when the motor speed is high. In both cases, the horizontal axis represents time. When an open failure occurs in power semiconductor 822, no current flows through the failed phase for a section of approximately 1/2 the current cycle.

 ところが、モータ速度が高い場合には、モータ9が発生する逆起電力の影響により電流(リプル電流)が流れることがある。そのため、オープン故障診断において電流の大小を判定する閾値Th2が常に一定であると、モータ速度が高い場合にオープン故障を正しく診断できないおそれがある。第3の実施形態では、図11の電流波形(a),(b)に示すように、モータ速度が高いほど閾値Th2を大きく設定することで誤診断を回避し、モータ速度の高低によらず安定したオープン故障診断を行うことができる。 However, when the motor speed is high, a current (ripple current) may flow due to the influence of the back electromotive force generated by the motor 9. Therefore, if the threshold value Th2 for determining the magnitude of the current in an open fault diagnosis is always constant, there is a risk that an open fault cannot be correctly diagnosed when the motor speed is high. In the third embodiment, as shown in the current waveforms (a) and (b) in Figure 11, the threshold value Th2 is set to a larger value as the motor speed increases, thereby avoiding erroneous diagnosis and enabling stable open fault diagnosis regardless of the motor speed.

(第4の実施形態)
 図12,13を参照して、本発明の駆動装置の第4の実施形態について説明する。第4の実施形態においても、図1に示す車両1に搭載される駆動装置2を例に説明する。なお、駆動装置2の概略構成、駆動装置2の電力変換装置8に設けられた電力変換回路82の構成、および、電力変換装置8に設けられた制御回路80の構成は、上述した図2,3,4に示す構成と同様である。
(Fourth embodiment)
A fourth embodiment of the drive device of the present invention will be described with reference to Figures 12 and 13. In the fourth embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.

 図12は、診断部806により実行されるオープン故障診断処理の一例を示すフローチャートである。診断部806は、図12に示す一連の処理を一定の時間周期で繰り返し実行する。図12のフローチャートは、第1の実施形態の図5に示したフローチャートのステップS102に代えてステップS500,S502を追加したものである。以下では、上述した第1の実施形態と異なる部分を主に説明し、第1の実施形態と同一の部分については説明を省略する。また、ステップS101で開始される相単位のループ処理の内、U相に関する処理について説明する。 FIG. 12 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 12 at a fixed time interval. The flowchart in FIG. 12 is obtained by adding steps S500 and S502 instead of step S102 in the flowchart shown in FIG. 5 of the first embodiment. The following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment. In addition, the process related to the U phase of the phase-by-phase loop process that begins in step S101 will be described.

 ステップS500では、診断部806は、正常時の電流が流れる向きすなわち電流方向が正方向か負方向かに応じて、図13に示すように上限側の閾値Th2Aおよび下限側の閾値Th2Bを設定する。図13は、オープン故障が発生している場合の電流Iuの波形を示す図であり、破線で閾値Th2Aのラインを示し、一点鎖線で閾値Th2Bのラインを示した。なお、図13では、図11の電流波形(b)に示すモータ速度が高い場合の電流波形を示した。正常時に正の電流が流れる期間R1において、0[A]付近の電流もしくは負の電流が流れている。 In step S500, the diagnostic unit 806 sets an upper threshold Th2A and a lower threshold Th2B as shown in FIG. 13 depending on the direction of current flow under normal conditions, i.e., whether the current direction is positive or negative. FIG. 13 is a diagram showing the waveform of current Iu when an open fault has occurred, with the dashed line indicating the threshold Th2A and the dashed line indicating the threshold Th2B. Note that FIG. 13 shows the current waveform when the motor speed is high, as shown in the current waveform (b) of FIG. 11. During period R1 when a positive current flows under normal conditions, a current of around 0 [A] or a negative current flows.

 図13の図示右側に示した実線ラインが、第1の実施の形態における閾値Th2、-Th2である。正常時に正方向の電流が流れる期間R1では、閾値Th2AはTh2A=Th2と設定され、閾値Th2Bは-Th2よりもマイナス方向に大きな値(Th2B<-Th2<0)に設定される。一方、正常時に負方向の電流が流れる期間R2では、閾値Th2AはTh2よりもプラス方向に大きな値(Th2A>Th2>0)に設定され、閾値Th2BはTh2A=-Th2と設定される。 The solid lines shown on the right side of Figure 13 are the thresholds Th2 and -Th2 in the first embodiment. During period R1 when a positive current flows normally, threshold Th2A is set to Th2A = Th2, and threshold Th2B is set to a value larger in the negative direction than -Th2 (Th2B < -Th2 < 0). On the other hand, during period R2 when a negative current flows normally, threshold Th2A is set to a value larger in the positive direction than Th2 (Th2A > Th2 > 0), and threshold Th2B is set to Th2A = -Th2.

 正常時の各相の電流値(Iu、Iv、Iw)は、電流目標値(Id、Iq)と電気角(θ)から式(1)を用いて計算することができる。式(1)において、Idはd軸目標電流値、Iqはq軸目標電流値、θは電気角、IuはU相電流、IvはV相電流、IwはW相電流を示す。電気角θはモータ角度センサ値θmにモータ9の極対数を掛けることで計算できる。ここで計算した各相の電流値(Iu、Iv、Iw)の正負から、各相の電流の方向を判断する。

Figure JPOXMLDOC01-appb-M000001
The current value (Iu, Iv, Iw) of each phase under normal conditions can be calculated from the current target value (Id, Iq) and electrical angle (θ) using formula (1). In formula (1), Id is the d-axis target current value, Iq is the q-axis target current value, θ is the electrical angle, Iu is the U-phase current, Iv is the V-phase current, and Iw is the W-phase current. The electrical angle θ can be calculated by multiplying the motor angle sensor value θm by the number of pole pairs of the motor 9. The direction of the current in each phase is determined from the positive or negative value of the current value (Iu, Iv, Iw) of each phase calculated here.
Figure JPOXMLDOC01-appb-M000001

 ステップS502では、診断部806は、電流Iuが「閾値Th2A>電流Iu>閾値Th2B」を満たしているか否かを判定する。ステップS502で「閾値Th2A>電流Iu>閾値Th2B」であると判定されると、ステップS104に進んでU相の故障検知カウンタCを所定加算量だけ加算する。一方、ステップS502で「閾値Th2A>電流Iu>閾値Th2B」でないと判定されると、ステップS106に進んで故障検知カウンタCから所定減算量だけ減算する。なお、ステップS108以降の処理は図5に示したフローチャートの場合と同様であり、説明を省略する。また、V相およびW相に関する処理も、U相の場合と同様に行われる。 In step S502, the diagnosis unit 806 determines whether the current Iu satisfies "threshold Th2A > current Iu > threshold Th2B". If it is determined in step S502 that "threshold Th2A > current Iu > threshold Th2B", the process proceeds to step S104, where the fault detection counter C for the U phase is incremented by a predetermined addition amount. On the other hand, if it is determined in step S502 that "threshold Th2A > current Iu > threshold Th2B" is not true, the process proceeds to step S106, where a predetermined subtraction amount is subtracted from the fault detection counter C. Note that the processing from step S108 onwards is the same as in the flowchart shown in Figure 5, and therefore a description thereof will be omitted. The processing relating to the V phase and W phase is also performed in the same manner as in the case of the U phase.

 前述した第3の実施形態では、図11の電流波形(a),(b)に示すように、モータ速度が高いほど閾値Th2を大きく設定することで誤診断を回避した。一方、第4の実施の形態では、図13に示すように期間R1でマイナス方向のリプル電流が生じていても、この期間R1(正常時に正方向の電流が流れる期間)において、閾値Th2Bがマイナス方向に大きく設定されているので誤診断を回避することができる。その結果、モータ速度の高低によらず安定したオープン故障診断を行うことができる。 In the third embodiment described above, as shown in the current waveforms (a) and (b) in Figure 11, the higher the motor speed, the higher the threshold value Th2 is set to avoid misdiagnosis. On the other hand, in the fourth embodiment, as shown in Figure 13, even if a negative ripple current occurs in period R1 (the period during which a positive current flows under normal conditions), the threshold value Th2B is set to a large negative value in this period R1, so that misdiagnosis can be avoided. As a result, stable open fault diagnosis can be performed regardless of whether the motor speed is high or low.

(第5の実施形態)
 図14,15を参照して、本発明の駆動装置の第5の実施形態について説明する。第5の実施形態においても、図1に示す車両1に搭載される駆動装置2を例に説明する。なお、駆動装置2の概略構成、駆動装置2の電力変換装置8に設けられた電力変換回路82の構成、および、電力変換装置8に設けられた制御回路80の構成は、上述した図2,3,4に示す構成と同様である。
Fifth Embodiment
A fifth embodiment of the drive device of the present invention will be described with reference to Figures 14 and 15. In the fifth embodiment, the drive device 2 mounted on the vehicle 1 shown in Figure 1 will also be described as an example. Note that the schematic configuration of the drive device 2, the configuration of the power conversion circuit 82 provided in the power conversion device 8 of the drive device 2, and the configuration of the control circuit 80 provided in the power conversion device 8 are similar to the configurations shown in Figures 2, 3, and 4 described above.

 図14は、診断部806により実行されるオープン故障診断処理の一例を示すフローチャートである。診断部806は、図14に示す一連の処理を一定の時間周期で繰り返し実行する。図14のフローチャートは、第1の実施形態の図5に示したフローチャートのステップS104,S106に代えてステップS600,S602を追加し、さらに、ステップS604を新たに加えたものである。以下では、上述した第1の実施形態と異なる部分を主に説明し、第1の実施形態と同一の部分については説明を省略する。また、ステップS101で開始される相単位のループ処理の内、U相に関する処理について説明する。 FIG. 14 is a flowchart showing an example of an open circuit fault diagnosis process executed by the diagnosis unit 806. The diagnosis unit 806 repeatedly executes the series of processes shown in FIG. 14 at a fixed time interval. The flowchart in FIG. 14 adds steps S600 and S602 instead of steps S104 and S106 in the flowchart shown in FIG. 5 of the first embodiment, and further adds a new step S604. The following mainly describes the parts that differ from the first embodiment described above, and omits a description of the parts that are the same as in the first embodiment. In addition, the process related to the U phase of the phase-by-phase loop process that starts in step S101 will be described.

 ステップS102において電流Iuの絶対値が閾値Th2よりも小さいと判定されると、ステップS600へ進んでU相の故障検知カウンタCに一定値の加算量を加算する。一方、ステップS102において電流Iuの絶対値が閾値Th2以上であると判定されると、ステップS602へ進んでU相の故障検知カウンタCから一定値の減算量を減算する。 If it is determined in step S102 that the absolute value of the current Iu is less than the threshold value Th2, the process proceeds to step S600, where a fixed value is added to the U-phase fault detection counter C. On the other hand, if it is determined in step S102 that the absolute value of the current Iu is greater than or equal to the threshold value Th2, the process proceeds to step S602, where a fixed value is subtracted from the U-phase fault detection counter C.

 ステップS604では、電流の周波数に応じた閾値Th3を設定する。詳細は後述するが、電流の周波数が高いほど閾値Th3を小さく設定する。前述した第1の実施形態で記載したように、電流の周波数はモータ速度に比例するので、モータ速度計算部805で算出されたモータ角速度ω0に基づいて閾値Th3を設定する。その場合、モータ角速度ω0から電流周波数を算出しても良いし、閾値Th3をモータ角速度ω0自体に比例した値としても良い。もちろん、入力された電流Iu,Iv,Iwから電流の周波数を算出するようにしても良い。 In step S604, a threshold value Th3 is set according to the current frequency. Details will be described later, but the higher the current frequency, the smaller the threshold value Th3 is set. As described in the first embodiment above, the current frequency is proportional to the motor speed, so the threshold value Th3 is set based on the motor angular velocity ω0 calculated by the motor speed calculation unit 805. In this case, the current frequency may be calculated from the motor angular velocity ω0, or the threshold value Th3 may be set to a value proportional to the motor angular velocity ω0 itself. Of course, the current frequency may also be calculated from the input currents Iu, Iv, and Iw.

 なお、ステップS108以降の処理は図5に示したフローチャートの場合と同様であり、説明を省略する。また、V相およびW相に関する処理も、U相の場合と同様に行われる。 The processing from step S108 onwards is the same as in the flowchart shown in FIG. 5, and so a description thereof will be omitted. Processing relating to the V and W phases is also performed in the same manner as in the case of the U phase.

 図15は、第1の実施形態の図6に相当するタイミングチャートである。信号波形(a),(b),(c)は図6に示した信号波形(a),(b),(c)と同一のものであり、信号波形(d)は図6の信号波形(d)と異なる。信号波形(a),(b)は電流Iuの周波数が低い場合の例を示したもので、信号波形(a)の実線は電流Iuの変化を示し、信号波形(b)の実線は故障検知カウンタCの変化を示す。一方、信号波形(c),(d)は電流Iuの周波数が高い場合の例を示したもので、信号波形(c)の実線は電流Iuの変化を示し、信号波形(d)の実線は故障検知カウンタCの変化を示す。 FIG. 15 is a timing chart corresponding to FIG. 6 of the first embodiment. Signal waveforms (a), (b), and (c) are the same as signal waveforms (a), (b), and (c) shown in FIG. 6, and signal waveform (d) is different from signal waveform (d) in FIG. 6. Signal waveforms (a) and (b) show an example when the frequency of current Iu is low, and the solid line of signal waveform (a) shows the change in current Iu, and the solid line of signal waveform (b) shows the change in fault detection counter C. On the other hand, signal waveforms (c) and (d) show an example when the frequency of current Iu is high, and the solid line of signal waveform (c) shows the change in current Iu, and the solid line of signal waveform (d) shows the change in fault detection counter C.

 第5の実施形態では、故障検知カウンタCの加算量および減算量を一定値に設定しているので、信号波形(b)における故障検知カウンタCのラインの傾きも、信号波形(d)における故障検知カウンタCのラインの傾きも同じになっている。一方、信号波形(a)と信号波形(c)とを比較すると、電流周波数が高い信号波形(c)の方が1周期当たりの故障検知カウンタCの加算期間および減算期間が短いので、その間の故障検知カウンタCの増加量および減少量も小さい。 In the fifth embodiment, the increment and decrement amounts of the fault detection counter C are set to constant values, so the slope of the line of the fault detection counter C in the signal waveform (b) is the same as the slope of the line of the fault detection counter C in the signal waveform (d). On the other hand, when comparing the signal waveform (a) with the signal waveform (c), the increment and decrement periods of the fault detection counter C per period are shorter in the signal waveform (c), which has a higher current frequency, and so the increment and decrement amounts of the fault detection counter C during that time are also smaller.

 そこで、電流周波数が低い場合は、正常時でも電流Iuの絶対値が閾値Th2の範囲内に入っている時間が長くなるので、誤診断を防止するために閾値Th3の値を大きく設定する。一方、電流周波数が高い場合では、オープン故障時に電流Iuが流れなくなる期間が短くなる。その場合でも故障検知が可能なように、閾値Th3の値を電流Iuの周波数が高い場合よりも小さく設定する。その際、加算量とオープン故障時における約1/2周期の期間内における加算回数とを考慮して、約1/2周期の期間内において故障検知カウンタCが閾値Th3に到達するように、閾値Th3の大きさを設定する。 Therefore, when the current frequency is low, the absolute value of the current Iu falls within the range of the threshold Th2 for a long period even under normal conditions, so the value of the threshold Th3 is set large to prevent misdiagnosis. On the other hand, when the current frequency is high, the period during which the current Iu stops flowing in the event of an open fault is short. To enable fault detection even in this case, the value of the threshold Th3 is set smaller than when the frequency of the current Iu is high. In this case, taking into account the amount of addition and the number of additions within a period of approximately 1/2 a cycle during an open fault, the magnitude of the threshold Th3 is set so that the fault detection counter C reaches the threshold Th3 within a period of approximately 1/2 a cycle.

 このように、加算量および減算量を一定値に設定する第5の実施形態では、閾値Th3の大きさを電流周波数に応じて変化させることで、モータ速度の大小(電流周波数の高低)に関わらずパワー半導体822のオープン故障を検知することができるとともに、正常時における誤検知を防止することができる。 In this way, in the fifth embodiment in which the addition amount and subtraction amount are set to constant values, the magnitude of the threshold value Th3 is changed according to the current frequency, making it possible to detect an open circuit failure in the power semiconductor 822 regardless of the motor speed (high or low current frequency) and to prevent erroneous detection during normal operation.

 前述した第1の実施形態では、電流周波数に応じて故障検知カウンタCの加算量・減算量を変化させることで、電流周波数の高低によらずオープン故障を検知することを可能とした。一方、第5の実施形態では、電流周波数に応じて閾値Th3の大きさを変化させることで、電流周波数の高低によらずオープン故障を検知することを可能とした。 In the first embodiment described above, it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the increment/decrement amount of the fault detection counter C according to the current frequency. On the other hand, in the fifth embodiment, it is possible to detect an open circuit fault regardless of whether the current frequency is high or low by changing the magnitude of the threshold value Th3 according to the current frequency.

 図16は、第1の実施形態と第5の実施形態とを比較するための信号波形を示したものである。図16において、信号波形(a)はモータ速度の変化を表し、信号波形(b)は正常時の電流波形を表し、信号波形(c)は第5の実施形態における故障検知カウンタCの変化を表し、信号波形(d)は第1の実施形態における故障検知カウンタCの変化を表す。信号波形(c),(d)においては、各実施形態における閾値Th3も示した。なお、図16に示す例では、モータ速度が低い状態で電流の絶対値が閾値Th2未満の状態が長時間継続し、その後、モータ速度が高くなり電流値が閾値Th2以上になった場合を示している。 FIG. 16 shows signal waveforms for comparing the first and fifth embodiments. In FIG. 16, signal waveform (a) represents the change in motor speed, signal waveform (b) represents the current waveform under normal conditions, signal waveform (c) represents the change in the fault detection counter C in the fifth embodiment, and signal waveform (d) represents the change in the fault detection counter C in the first embodiment. Signal waveforms (c) and (d) also show the threshold value Th3 in each embodiment. Note that the example shown in FIG. 16 shows a case where the absolute value of the current remains below the threshold value Th2 for a long period of time when the motor speed is low, and then the motor speed increases and the current value becomes equal to or greater than the threshold value Th2.

 第1の実施形態の場合には、モータ速度が低い状態で電流値が閾値Th2未満の状態が継続しても、信号波形(d)に示すように故障検知カウンタCは少しずつしか加算されない。一方、モータ速度が高くなると、閾値Th2以上になる期間は電流値が閾値Th2未満となる期間よりも長くなり、故障検知カウンタCが大きく減算される。そのため、故障検知カウンタは閾値Th3に到達せず、オープン故障と誤診断することは無い。 In the first embodiment, even if the current value remains below the threshold value Th2 while the motor speed is low, the fault detection counter C is incremented only little by little, as shown in signal waveform (d). On the other hand, when the motor speed increases, the period during which the current value is equal to or greater than the threshold value Th2 becomes longer than the period during which the current value is below the threshold value Th2, and the fault detection counter C is decremented by a large amount. As a result, the fault detection counter does not reach the threshold value Th3, and an open fault is not erroneously diagnosed.

 第5の実施形態の場合には、モータ速度が低い状態(電流周波数が低い状態)では閾値Th3が大きく設定され、モータ速度の増加に従って急激に減少している。また、電流値が閾値Th2未満の状態における故障検知カウンタCの増加は、加算量を低周波数では大きく設定する第1の実施形態に比べて大きい。電流振幅が閾値Th2を超える状態になると、故障検知カウンタCの減算期間は加算期間よりも長いので、大局的には故障検知カウンタCは減少傾向となる。 In the case of the fifth embodiment, when the motor speed is low (when the current frequency is low), the threshold value Th3 is set high and decreases rapidly as the motor speed increases. Also, the increase in the fault detection counter C when the current value is below the threshold value Th2 is greater than in the first embodiment, in which the addition amount is set high at low frequencies. When the current amplitude exceeds the threshold value Th2, the subtraction period of the fault detection counter C is longer than the addition period, so that the fault detection counter C generally tends to decrease.

 その場合、信号波形(c)に示すように、故障検知カウンタCは減少量よりも閾値Th3の減少量の方が大きい。そのため、モータ速度が増加すると故障検知カウンタCが閾値Th3よりも大きい状態となり、オープン故障と誤診断されてしまう。このように、第1の実施形態の診断方法の方が、第5の実施形態の診断方法と比べて、モータ速度が変化した場合の誤診断の発生を低く抑えることができる。 In that case, as shown in the signal waveform (c), the decrease in the fault detection counter C is greater than the decrease in the threshold value Th3. Therefore, when the motor speed increases, the fault detection counter C becomes greater than the threshold value Th3, resulting in a false diagnosis of an open fault. In this way, the diagnosis method of the first embodiment can reduce the occurrence of false diagnosis when the motor speed changes, compared to the diagnosis method of the fifth embodiment.

 以上説明した本発明の実施形態によれば、以下の作用効果を奏する。 The above-described embodiment of the present invention provides the following effects.

(C1)図2~6,14,15等に示すように、スイッチング素子(パワー半導体822)を備える三相インバータ回路(電力変換回路82)の各相の出力電流を検出する電流検出部(交流電流センサ84)と、各相の出力電流に基づいて、パワー半導体822のオープン故障を診断する故障診断部(診断部806)と、を備え、診断部806は、出力電流の値が所定範囲内(|電流|<閾値Th2)である場合に所定加算量を加算し、出力電流の値が所定範囲内でない場合に所定減算量を減算することで相毎の故障検知カウンタCを演算し、故障検知カウンタCが第1カウンタ閾値(閾値Th3)を超えた場合にオープン故障と診断する。そして、診断部806は、出力電流の周波数が低いほど所定加算量および所定減算量をより小さい値に設定、または、出力電流の周波数が低いほど第1カウンタ閾値(閾値Th3)をより大きい値に設定する。 (C1) As shown in Figs. 2 to 6, 14, 15, etc., a current detection unit (AC current sensor 84) that detects the output current of each phase of a three-phase inverter circuit (power conversion circuit 82) equipped with a switching element (power semiconductor 822), and a fault diagnosis unit (diagnosis unit 806) that diagnoses an open fault of the power semiconductor 822 based on the output current of each phase, and the diagnosis unit 806 calculates a fault detection counter C for each phase by adding a predetermined addition amount when the value of the output current is within a predetermined range (|current|<threshold Th2), and subtracting a predetermined subtraction amount when the value of the output current is not within the predetermined range, and diagnoses an open fault when the fault detection counter C exceeds a first counter threshold (threshold Th3). The diagnosis unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current is lower, or sets the first counter threshold (threshold Th3) to a larger value as the frequency of the output current is lower.

 上述した第1の実施形態のように、出力電流の周波数が低いほど所定加算量および所定減算量をより小さい値に設定することで、周波数の高低によらずオープン故障を検知することができる。また、第5の実施形態のように、出力電流の周波数が低いほど第1カウンタ閾値(閾値Th3)をより大きい値に設定することで、周波数の高低によらずオープン故障を検知することができる。さらに、出力電流の周波数(モータ回転速度)の高低によらず電流の約1/2周期の期間内でオープン故障の検知が可能となるので、素早い故障検知を行うことができる。 As in the first embodiment described above, the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to, making it possible to detect an open circuit failure regardless of whether the frequency is high or low. Also, as in the fifth embodiment, the lower the frequency of the output current, the larger the first counter threshold (threshold Th3) is set to, making it possible to detect an open circuit failure regardless of whether the frequency is high or low. Furthermore, since an open circuit failure can be detected within a period of approximately 1/2 the current cycle regardless of whether the frequency (motor rotation speed) of the output current is high or low, rapid failure detection can be performed.

(C2)上記(C1)において、図7~9等に示すように、診断部806は、出力電流の周波数が低いほど、所定加算量および所定減算量をより小さい値に設定し、故障検知カウンタCが所定のセット閾値(閾値Th3A)を上回る場合に故障フラグをセットし、前記故障検知カウンタが所定のリセット閾値(閾値Th3B)を下回る場合に故障フラグをリセットする。そして、診断部806は、故障フラグがセットされた状態ではデバウンスカウンタCdを加算し、故障フラグがリセットされた状態ではデバウンスカウンタCdを減算し、デバウンスカウンタCdが第2カウンタ閾値(閾値Th4)を超えた場合にオープン故障と診断する。 (C2) In the above (C1), as shown in Figures 7 to 9, the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current decreases, sets a fault flag when the fault detection counter C exceeds a predetermined set threshold (threshold Th3A), and resets the fault flag when the fault detection counter falls below a predetermined reset threshold (threshold Th3B). The diagnostic unit 806 then increments the debounce counter Cd when the fault flag is set, and decrements the debounce counter Cd when the fault flag is reset, and diagnoses an open fault when the debounce counter Cd exceeds a second counter threshold (threshold Th4).

 上述のような異常フラグに基づくデバウンスカウンタCdを導入することにより、ノイズなどの偶発的影響による誤検知の発生を回避して、オープン故障診断の安定性向上を図ることができる。 By introducing the debounce counter Cd based on the abnormality flag as described above, it is possible to avoid false positives caused by accidental influences such as noise, and improve the stability of open fault diagnosis.

(C3)上記(C1)において、図10,11等に示すように、診断部806は、出力電流の周波数が低いほど所定加算量および所定減算量をより小さい値に設定し、出力電流の周波数が高いほど所定範囲を、すなわち、図11のTh2から-Th2までの幅を、より広く設定する。 (C3) In (C1) above, as shown in Figures 10 and 11, the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values the lower the frequency of the output current, and sets the predetermined range, i.e., the width from Th2 to -Th2 in Figure 11, to a wider value the higher the frequency of the output current.

 出力電流の周波数(すなわち、モータ速度)が高い場合には、モータ9が発生する逆起電力の影響によりリプル電流が発生しやすい。そのため、モータ速度が高いほど閾値Th2を大きく設定することで誤診断を回避し、モータ速度の高低によらず安定したオープン故障診断を行うことができる。 When the frequency of the output current (i.e., the motor speed) is high, a ripple current is likely to occur due to the influence of the back electromotive force generated by the motor 9. Therefore, by setting the threshold value Th2 to a larger value as the motor speed increases, misdiagnosis can be avoided and a stable open fault diagnosis can be performed regardless of the motor speed.

(C4)なお、上記(C1)において、出力電流が入力される回転電機(モータ9)の回転速度(モータ速度)を検出する回転速度検出部(モータ角度センサ91)をさらに備え、回転速度が低いほど、所定加算量および所定減算量をより小さい値に設定し、回転速度が高いほど所定範囲の幅をより広く設定するようにしても良い。上述した(C3)の場合と同様の作用効果を奏することができる。 (C4) In addition, in the above (C1), a rotation speed detection unit (motor angle sensor 91) may be further provided to detect the rotation speed (motor speed) of the rotating electric machine (motor 9) to which the output current is input, and the predetermined addition amount and the predetermined subtraction amount may be set to smaller values as the rotation speed decreases, and the width of the predetermined range may be set to be wider as the rotation speed increases. This can achieve the same effect as in the above-mentioned case of (C3).

(5)上記(C1)において、図12,13等に示すように、診断部806は、出力電流の周波数が低いほど、所定加算量および所定減算量をより小さい値に設定し、交流電流センサ84で検出された出力電流に基づいて、オープン故障が生じていない正常な場合の電流の正負を推定する。そして、診断部806の推定結果が正の場合には、所定範囲(Th2B<所定範囲<Th2A)の内の負値側の範囲(Th2A~0)を正値側の範囲(0~Th2B)よりも大きく設定し、診断部806の推定結果が負の場合には、所定範囲(Th2B<所定範囲<Th2A)の内の正値側の範囲(0~Th2B)を負値側の範囲(Th2A~0)よりも大きく設定する。 (5) In the above (C1), as shown in Figures 12 and 13, the diagnostic unit 806 sets the predetermined addition amount and the predetermined subtraction amount to smaller values as the frequency of the output current decreases, and estimates the positive or negative of the current in a normal case where no open circuit fault occurs, based on the output current detected by the AC current sensor 84. If the estimation result of the diagnostic unit 806 is positive, the negative value range (Th2A to 0) within the predetermined range (Th2B < predetermined range < Th2A) is set to be larger than the positive value range (0 to Th2B), and if the estimation result of the diagnostic unit 806 is negative, the positive value range (0 to Th2B) within the predetermined range (Th2B < predetermined range < Th2A) is set to be larger than the negative value range (Th2A to 0).

 その結果、図13に示すように期間R1でマイナス方向のリプル電流が生じていても、この期間R1においては閾値Th2Bがマイナス方向に大きく設定されているので誤診断を回避することができる。その結果、モータ速度の高低(すなわち、出力電流の周波数の高低)によらず安定したオープン故障診断を行うことができる。 As a result, even if a negative ripple current occurs during period R1 as shown in Figure 13, erroneous diagnosis can be avoided because the threshold value Th2B is set to a large negative value during this period R1. As a result, stable open fault diagnosis can be performed regardless of whether the motor speed is high or low (i.e., whether the frequency of the output current is high or low).

 なお、本発明は上記した実施形態に限定されるものではなく、様々な変形例が含まれる。例えば、上記した実施形態は本発明を分かりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、ある実施形態の構成の一部を他の実施形態の構成に置き換えることが可能であり、また、ある実施形態の構成に他の実施形態の構成を加えることも可能である。また、各実施形態の構成の一部について、他の構成の追加、削除、置換をすることが可能である。 The present invention is not limited to the above-described embodiments, but includes various modified examples. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and are not necessarily limited to those having all of the configurations described. It is also possible to replace part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

 また、上記の各構成、機能、処理部、処理手段等は、それらの一部又は全部を、例えば集積回路で設計する等によりハードウェアで実現してもよい。また、上記の各構成、機能等は、プロセッサがそれぞれの機能を実現するプログラムを解釈し、実行することによりソフトウェアで実現してもよい。各機能を実現するプログラム、テーブル、ファイル等の情報は、メモリや、ハードディスク、SSD(Solid State Drive)等の記録装置、または、ICカード、DVD等の記録媒体に置くことができる。 Furthermore, the above-mentioned configurations, functions, processing units, processing means, etc. may be realized in hardware, in part or in whole, for example by designing them as integrated circuits. Further, the above-mentioned configurations, functions, etc. may be realized in software by a processor interpreting and executing a program that realizes each function. Information on the programs, tables, files, etc. that realize each function can be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card or DVD.

 1…車両、2…駆動装置、5…直流電源、6…制御装置、7…故障通知装置、8…電力変換装置、9…モータ、80…制御回路、81…ドライバ回路、82…電力変換回路、83…直流電圧センサ、84…交流電流センサ、91…モータ角度センサ、801…状態制御部、802…目標電流計算部、803…電流制御部、804…PWM信号生成部、805…モータ速度計算部、806…診断部、822…パワー半導体、Sf…故障通知信号、Sm…動作モード、θm…モータ角度センサ値、τs…目標トルク、ω0…モータ角速度 1...vehicle, 2...drive unit, 5...DC power supply, 6...control unit, 7...fault notification unit, 8...power conversion unit, 9...motor, 80...control circuit, 81...driver circuit, 82...power conversion circuit, 83...DC voltage sensor, 84...AC current sensor, 91...motor angle sensor, 801...state control unit, 802...target current calculation unit, 803...current control unit, 804...PWM signal generation unit, 805...motor speed calculation unit, 806...diagnosis unit, 822...power semiconductor, Sf...fault notification signal, Sm...operation mode, θm...motor angle sensor value, τs...target torque, ω0...motor angular speed

Claims (6)

 スイッチング素子を備える三相インバータ回路の各相の出力電流を検出する電流検出部と、
 各相の前記出力電流に基づいて、前記スイッチング素子のオープン故障を診断する故障診断部と、を備え、
 前記故障診断部は、
  前記出力電流の値が所定範囲内である場合に所定加算量を加算し、前記出力電流の値が前記所定範囲内でない場合に所定減算量を減算することで相毎の故障検知カウンタを演算すると共に、前記故障検知カウンタが第1カウンタ閾値を超えた場合に前記オープン故障と診断し、
  前記出力電流の周波数が低いほど、前記所定加算量および前記所定減算量をより小さい値に、または、前記第1カウンタ閾値をより大きい値に設定する、
電力変換装置。
a current detection unit that detects an output current of each phase of a three-phase inverter circuit having a switching element;
a fault diagnosis unit that diagnoses an open fault in the switching element based on the output current of each phase,
The fault diagnosis unit is
a predetermined addition amount is added when the value of the output current is within a predetermined range, and a predetermined subtraction amount is subtracted when the value of the output current is not within the predetermined range, thereby calculating a fault detection counter for each phase, and diagnosing the open fault when the fault detection counter exceeds a first counter threshold value;
the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set, or the first counter threshold value is set to a larger value.
Power conversion equipment.
 請求項1に記載の電力変換装置において、
 前記故障診断部は、
  前記出力電流の周波数が低いほど、前記所定加算量および前記所定減算量をより小さい値に設定し、
  前記故障検知カウンタが所定のセット閾値を上回る場合に故障フラグをセットし、前記故障検知カウンタが所定のリセット閾値を下回る場合に前記故障フラグをリセットし、
  前記故障フラグがセットされた状態ではデバウンスカウンタを加算し、前記故障フラグがリセットされた状態ではデバウンスカウンタを減算し、
  前記故障検知カウンタが前記第1カウンタ閾値を超えた場合に前記オープン故障と判定するのに代えて、前記デバウンスカウンタが第2カウンタ閾値を超えた場合に前記オープン故障と診断する、
電力変換装置。
2. The power conversion device according to claim 1,
The fault diagnosis unit is
the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to;
setting a fault flag when the fault detection counter exceeds a predetermined set threshold, and resetting the fault flag when the fault detection counter falls below a predetermined reset threshold;
Incrementing a debounce counter when the fault flag is set, and decrementing a debounce counter when the fault flag is reset;
Instead of determining that an open fault has occurred when the fault detection counter has exceeded the first counter threshold, diagnosing that an open fault has occurred when the debounce counter has exceeded a second counter threshold.
Power conversion equipment.
 請求項1に記載の電力変換装置において、
 前記故障診断部は、
  前記出力電流の周波数が低いほど、前記所定加算量および前記所定減算量をより小さい値に設定し、
  前記出力電流の周波数が高いほど前記所定範囲の幅をより広く設定する、
電力変換装置。
2. The power conversion device according to claim 1,
The fault diagnosis unit is
the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to;
The higher the frequency of the output current, the wider the width of the predetermined range is set.
Power conversion equipment.
 請求項1に記載の電力変換装置において、
 前記出力電流が入力される回転電機の回転速度を検出する回転速度検出部をさらに備え、
 前記故障診断部は、
  前記回転速度が低いほど、前記所定加算量および前記所定減算量をより小さい値に設定し、
  前記回転速度が高いほど前記所定範囲の幅をより広く設定する、
電力変換装置。
2. The power conversion device according to claim 1,
a rotation speed detection unit that detects the rotation speed of a rotating electric machine to which the output current is input,
The fault diagnosis unit is
the lower the rotation speed, the smaller the predetermined addition amount and the predetermined subtraction amount are set to;
The higher the rotation speed, the wider the width of the predetermined range is set.
Power conversion equipment.
 請求項1に記載の電力変換装置において、
 前記故障診断部は、
  前記出力電流の周波数が低いほど、前記所定加算量および前記所定減算量をより小さい値に設定し、
  前記電流検出部で検出された前記出力電流に基づいて、前記オープン故障が生じていない正常な場合の電流の正負を推定し、
  前記故障診断部の推定結果が正の場合には、前記所定範囲の内の負値側の範囲を正値側の範囲よりも大きく設定し、
  前記故障診断部の推定結果が負の場合には、前記所定範囲の内の正値側の範囲を負値側の範囲よりも大きく設定する、
電力変換装置。
2. The power conversion device according to claim 1,
The fault diagnosis unit is
the lower the frequency of the output current, the smaller the predetermined addition amount and the predetermined subtraction amount are set to;
estimating whether a current is positive or negative in a normal case in which no open circuit fault occurs, based on the output current detected by the current detection unit;
When the estimation result of the fault diagnosis unit is positive, a range on the negative value side of the predetermined range is set to be larger than a range on the positive value side,
When the estimation result of the fault diagnosis unit is negative, the range on the positive value side of the predetermined range is set to be larger than the range on the negative value side.
Power conversion equipment.
 請求項1に記載の電力変換装置と、
 前記電力変換装置の前記三相インバータ回路の前記出力電流が入力される回転電機と、を備える、駆動装置。
The power conversion device according to claim 1 ;
a rotating electric machine to which the output current of the three-phase inverter circuit of the power conversion device is input.
PCT/JP2024/019108 2023-06-09 2024-05-23 Power conversion device and drive device Ceased WO2024252949A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010246182A (en) * 2009-04-01 2010-10-28 Toyota Motor Corp Inverter failure detection device
JP2011019302A (en) * 2009-07-07 2011-01-27 Toyota Motor Corp Controller for motor driving system
CN113489344A (en) * 2021-07-04 2021-10-08 西北工业大学 Space power supply push-pull circuit and switching tube fault diagnosis and fault tolerance method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010246182A (en) * 2009-04-01 2010-10-28 Toyota Motor Corp Inverter failure detection device
JP2011019302A (en) * 2009-07-07 2011-01-27 Toyota Motor Corp Controller for motor driving system
CN113489344A (en) * 2021-07-04 2021-10-08 西北工业大学 Space power supply push-pull circuit and switching tube fault diagnosis and fault tolerance method

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