ATE122176T1 - Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur. - Google Patents
Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur.Info
- Publication number
- ATE122176T1 ATE122176T1 AT91304827T AT91304827T ATE122176T1 AT E122176 T1 ATE122176 T1 AT E122176T1 AT 91304827 T AT91304827 T AT 91304827T AT 91304827 T AT91304827 T AT 91304827T AT E122176 T1 ATE122176 T1 AT E122176T1
- Authority
- AT
- Austria
- Prior art keywords
- producing
- gate structure
- semiconductor arrangement
- electron donating
- main surface
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/605—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having significant overlap between the lightly-doped extensions and the gate electrode
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
Landscapes
- Junction Field-Effect Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14373490 | 1990-05-31 | ||
| JP14454390 | 1990-06-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE122176T1 true ATE122176T1 (de) | 1995-05-15 |
Family
ID=26475389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT91304827T ATE122176T1 (de) | 1990-05-31 | 1991-05-29 | Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur. |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5599741A (de) |
| EP (1) | EP0459770B1 (de) |
| AT (1) | ATE122176T1 (de) |
| DE (1) | DE69109366T2 (de) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69109366T2 (de) * | 1990-05-31 | 1995-10-19 | Canon Kk | Verfahren zur Herstellung einer Halbleiteranordnung mit Gatestruktur. |
| TW435820U (en) * | 1993-01-18 | 2001-05-16 | Semiconductor Energy Lab | MIS semiconductor device |
| KR950021242A (ko) * | 1993-12-28 | 1995-07-26 | 김광호 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
| US6159854A (en) * | 1994-08-22 | 2000-12-12 | Fujitsu Limited | Process of growing conductive layer from gas phase |
| JPH09102591A (ja) * | 1995-07-28 | 1997-04-15 | Toshiba Corp | 半導体装置及びその製造方法 |
| KR100203896B1 (ko) * | 1995-12-15 | 1999-06-15 | 김영환 | 게이트 전극 형성방법 |
| US5838176A (en) * | 1996-07-11 | 1998-11-17 | Foveonics, Inc. | Correlated double sampling circuit |
| JPH10214964A (ja) * | 1997-01-30 | 1998-08-11 | Oki Electric Ind Co Ltd | Mosfet及びその製造方法 |
| JPH11186194A (ja) * | 1997-12-19 | 1999-07-09 | Nec Corp | 半導体装置の製造方法 |
| US6211001B1 (en) * | 1998-07-24 | 2001-04-03 | Sharp Laboratories Of America, Inc. | Electrostatic discharge protection for salicided devices and method of making same |
| JP2000098116A (ja) * | 1998-09-18 | 2000-04-07 | Canon Inc | 素子又は素子作製用モールド型の作製方法 |
| US6617644B1 (en) * | 1998-11-09 | 2003-09-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of manufacturing the same |
| US6248638B1 (en) * | 1998-12-18 | 2001-06-19 | Texas Instruments Incorporated | Enhancements to polysilicon gate |
| JP2000195821A (ja) * | 1998-12-24 | 2000-07-14 | Nec Corp | 半導体製造方法及び装置 |
| JP3450758B2 (ja) * | 1999-09-29 | 2003-09-29 | 株式会社東芝 | 電界効果トランジスタの製造方法 |
| JP2001111040A (ja) * | 1999-10-13 | 2001-04-20 | Oki Electric Ind Co Ltd | 電界効果トランジスタの製造方法 |
| TW480576B (en) * | 2000-05-12 | 2002-03-21 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing same |
| TWI224806B (en) * | 2000-05-12 | 2004-12-01 | Semiconductor Energy Lab | Semiconductor device and manufacturing method thereof |
| KR100655441B1 (ko) * | 2005-09-01 | 2006-12-08 | 삼성전자주식회사 | 트랩형 비휘발성 메모리 장치의 제조 방법 |
| US7927950B2 (en) * | 2002-05-07 | 2011-04-19 | Samsung Electronics Co., Ltd. | Method of fabricating trap type nonvolatile memory device |
| JP2012242172A (ja) * | 2011-05-17 | 2012-12-10 | Canon Inc | ゲート電極が駆動する電界効果型トランジスタおよびそれを有するセンサデバイス |
| KR101521712B1 (ko) * | 2013-10-22 | 2015-05-19 | 삼성전기주식회사 | 압저항 감지모듈 및 이를 포함하는 mems 센서 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4356623A (en) * | 1980-09-15 | 1982-11-02 | Texas Instruments Incorporated | Fabrication of submicron semiconductor devices |
| US4570328A (en) * | 1983-03-07 | 1986-02-18 | Motorola, Inc. | Method of producing titanium nitride MOS device gate electrode |
| US4597824A (en) * | 1983-11-11 | 1986-07-01 | Kabushiki Kaisha Toshiba | Method of producing semiconductor device |
| JPS60245281A (ja) * | 1984-05-21 | 1985-12-05 | Matsushita Electronics Corp | 半導体装置の製造方法 |
| JPS61202467A (ja) * | 1985-03-05 | 1986-09-08 | Nec Corp | 半導体装置 |
| JPS61252776A (ja) * | 1985-05-01 | 1986-11-10 | Victor Co Of Japan Ltd | フイ−ルド判別信号記録再生装置 |
| US4722909A (en) * | 1985-09-26 | 1988-02-02 | Motorola, Inc. | Removable sidewall spacer for lightly doped drain formation using two mask levels |
| US4737828A (en) * | 1986-03-17 | 1988-04-12 | General Electric Company | Method for gate electrode fabrication and symmetrical and non-symmetrical self-aligned inlay transistors made therefrom |
| NL8601547A (nl) * | 1986-06-16 | 1988-01-18 | Philips Nv | Optisch litografische inrichting met verplaatsbaar lenzenstelsel en werkwijze voor het regelen van de afbeeldingseigenschappen van een lenzenstelsel in een dergelijke inrichting. |
| GB2195663B (en) * | 1986-08-15 | 1990-08-22 | Nippon Telegraph & Telephone | Chemical vapour deposition method and apparatus therefor |
| US4755478A (en) * | 1987-08-13 | 1988-07-05 | International Business Machines Corporation | Method of forming metal-strapped polysilicon gate electrode for FET device |
| JPH0734475B2 (ja) * | 1989-03-10 | 1995-04-12 | 株式会社東芝 | 半導体装置 |
| US4920403A (en) * | 1989-04-17 | 1990-04-24 | Hughes Aircraft Company | Selective tungsten interconnection for yield enhancement |
| US4908332A (en) * | 1989-05-04 | 1990-03-13 | Industrial Technology Research Institute | Process for making metal-polysilicon double-layered gate |
| JPH02304935A (ja) * | 1989-05-19 | 1990-12-18 | Nec Corp | 半導体集積回路の製造方法 |
| PT95232B (pt) * | 1989-09-09 | 1998-06-30 | Canon Kk | Processo de producao de uma pelicula de aluminio depositada |
| JPH03104235A (ja) * | 1989-09-19 | 1991-05-01 | Matsushita Electron Corp | Mis型トランジスタの製造方法 |
| US5010030A (en) * | 1989-10-30 | 1991-04-23 | Motorola, Inc. | Semiconductor process using selective deposition |
| US4975385A (en) * | 1990-04-06 | 1990-12-04 | Applied Materials, Inc. | Method of constructing lightly doped drain (LDD) integrated circuit structure |
| DE69109366T2 (de) * | 1990-05-31 | 1995-10-19 | Canon Kk | Verfahren zur Herstellung einer Halbleiteranordnung mit Gatestruktur. |
| JP2895166B2 (ja) * | 1990-05-31 | 1999-05-24 | キヤノン株式会社 | 半導体装置の製造方法 |
| US5116774A (en) * | 1991-03-22 | 1992-05-26 | Motorola, Inc. | Heterojunction method and structure |
-
1991
- 1991-05-29 DE DE69109366T patent/DE69109366T2/de not_active Expired - Fee Related
- 1991-05-29 EP EP91304827A patent/EP0459770B1/de not_active Expired - Lifetime
- 1991-05-29 AT AT91304827T patent/ATE122176T1/de active
-
1995
- 1995-06-07 US US08/479,385 patent/US5599741A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE69109366T2 (de) | 1995-10-19 |
| US5599741A (en) | 1997-02-04 |
| EP0459770B1 (de) | 1995-05-03 |
| DE69109366D1 (de) | 1995-06-08 |
| EP0459770A2 (de) | 1991-12-04 |
| EP0459770A3 (en) | 1992-01-22 |
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