ATE130111T1 - Modulare prüfstruktur für eine digitale fernsprechvermittlungssteuerung auf einem chip. - Google Patents

Modulare prüfstruktur für eine digitale fernsprechvermittlungssteuerung auf einem chip.

Info

Publication number
ATE130111T1
ATE130111T1 AT89309677T AT89309677T ATE130111T1 AT E130111 T1 ATE130111 T1 AT E130111T1 AT 89309677 T AT89309677 T AT 89309677T AT 89309677 T AT89309677 T AT 89309677T AT E130111 T1 ATE130111 T1 AT E130111T1
Authority
AT
Austria
Prior art keywords
functional blocks
test
logic circuitry
test structure
chip
Prior art date
Application number
AT89309677T
Other languages
English (en)
Inventor
Michael A Nix
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE130111T1 publication Critical patent/ATE130111T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2733—Test interface between tester and unit under test
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2736—Tester hardware, i.e. output processing circuits using a dedicated service processor for test
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored program control
    • H04Q11/0414—Details

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
AT89309677T 1988-09-30 1989-09-22 Modulare prüfstruktur für eine digitale fernsprechvermittlungssteuerung auf einem chip. ATE130111T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/251,309 US4926363A (en) 1988-09-30 1988-09-30 Modular test structure for single chip digital exchange controller

Publications (1)

Publication Number Publication Date
ATE130111T1 true ATE130111T1 (de) 1995-11-15

Family

ID=22951387

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89309677T ATE130111T1 (de) 1988-09-30 1989-09-22 Modulare prüfstruktur für eine digitale fernsprechvermittlungssteuerung auf einem chip.

Country Status (5)

Country Link
US (1) US4926363A (de)
EP (1) EP0361808B1 (de)
JP (1) JPH02154177A (de)
AT (1) ATE130111T1 (de)
DE (1) DE68924752T2 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317750A (en) * 1988-12-23 1994-05-31 Intel Corporation Microcontroller peripheral expansion bus for access to internal special function registers
JPH0682325B2 (ja) * 1990-05-29 1994-10-19 株式会社東芝 情報処理装置のテスト容易化回路
US5369643A (en) * 1990-10-12 1994-11-29 Intel Corporation Method and apparatus for mapping test signals of an integrated circuit
JP2643585B2 (ja) * 1990-11-05 1997-08-20 日本電気株式会社 集積回路
FR2675921B1 (fr) * 1991-04-24 1993-08-20 Hewlett Packard Co Procede et dispositif de test d'une carte d'un systeme informatique.
US5295079A (en) * 1991-07-18 1994-03-15 National Semiconductor Corporation Digital testing techniques for very high frequency phase-locked loops
JP2641816B2 (ja) * 1991-07-23 1997-08-20 三菱電機株式会社 半導体集積回路の測定方法
JP3319608B2 (ja) * 1991-10-18 2002-09-03 ソニー株式会社 電子機器
US5677912A (en) * 1992-01-28 1997-10-14 Rockwell International Corporation Diagnostic device for a communications switching system
US5359547A (en) * 1992-06-26 1994-10-25 Digital Equipment Corporation Method and apparatus for testing processor-based computer modules
US5638383A (en) * 1992-07-24 1997-06-10 Trw Inc. Advanced integrated avionics testing system
US5561761A (en) * 1993-03-31 1996-10-01 Ylsi Technology, Inc. Central processing unit data entering and interrogating device and method therefor
DE4400203C1 (de) * 1994-01-05 1995-08-03 Daimler Benz Ag Verfahren zur Überwachung von Fahrzeugfunktionskomponenten
US5477544A (en) * 1994-02-10 1995-12-19 The United States Of America As Represented By The Secretary Of The Navy Multi-port tester interface
US5538141A (en) * 1994-09-27 1996-07-23 Intel Corporation Test flow assurance using memory imprinting
US5909660A (en) * 1994-10-13 1999-06-01 National Instruments Corporation Signal conditioning module for sensing multiform field voltage signals
US5805471A (en) * 1994-11-01 1998-09-08 Pycon, Inc. Driver board apparatus having SRAM and burn-in system and method using host computer
US5909561A (en) * 1997-04-14 1999-06-01 International Business Machines Corporation Apparatus and method for separately layering cache and architectural specific functions in different operational controllers to facilitate design extension
US5937172A (en) * 1997-04-14 1999-08-10 International Business Machines Corporation Apparatus and method of layering cache and architectural specific functions to permit generic interface definition
US6032226A (en) * 1997-04-14 2000-02-29 International Business Machines Corporation Method and apparatus for layering cache and architectural specific functions to expedite multiple design
US6061755A (en) * 1997-04-14 2000-05-09 International Business Machines Corporation Method of layering cache and architectural specific functions to promote operation symmetry
JP3204450B2 (ja) 1998-04-15 2001-09-04 日本電気株式会社 アドレスデコード回路及びアドレスデコード方法
FR2812958B1 (fr) * 2000-08-11 2002-11-08 Thomson Csf Systeme de maintenance pour un ensemble d'equipements
JP2002367400A (ja) * 2001-06-08 2002-12-20 Mitsubishi Electric Corp 半導体集積回路装置
US7376876B2 (en) * 2004-12-23 2008-05-20 Honeywell International Inc. Test program set generation tool
US7386773B2 (en) * 2004-12-28 2008-06-10 Intel Corporation Method and system for testing distributed logic circuitry

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4069510A (en) * 1974-10-30 1978-01-17 Motorola, Inc. Interrupt status register for interface adaptor chip
US4393498A (en) * 1981-01-22 1983-07-12 The Boeing Company Method and apparatus for testing systems that communicate over digital buses by transmitting and receiving signals in the form of standardized multi-bit binary encoded words
US4402055A (en) * 1981-01-27 1983-08-30 Westinghouse Electric Corp. Automatic test system utilizing interchangeable test devices
US4656632A (en) * 1983-11-25 1987-04-07 Giordano Associates, Inc. System for automatic testing of circuits and systems
JPS6125230A (ja) * 1984-07-13 1986-02-04 Sony Corp Ｉｃ装置
US4718064A (en) * 1986-02-28 1988-01-05 Western Digital Corporation Automatic test system
JPS63108741A (ja) * 1986-10-27 1988-05-13 Nec Corp 半導体集積回路装置

Also Published As

Publication number Publication date
US4926363A (en) 1990-05-15
DE68924752T2 (de) 1996-07-11
EP0361808A2 (de) 1990-04-04
EP0361808B1 (de) 1995-11-08
EP0361808A3 (de) 1991-07-31
JPH02154177A (ja) 1990-06-13
DE68924752D1 (de) 1995-12-14

Similar Documents

Publication Publication Date Title
ATE130111T1 (de) Modulare prüfstruktur für eine digitale fernsprechvermittlungssteuerung auf einem chip.
DE69124170D1 (de) Automatisches Prüfausrüstungssystem, das eine Stiftscheibenarchitektur verwendet
EP0358376A3 (de) Integrierte Prüfschaltung
EP0358365A3 (de) Prüf-Puffer/Register
EP0419863A3 (en) Multiple i/o select memory
EP0264893A3 (de) Halbleiterspeicher
EP0268289A3 (en) Semiconductor memory device
DE68924639D1 (de) Matrixspeicher, der Standardblöcke, Standard-Unterblöcke, einen redundanten Block und redundante Unterblöcke beinhaltet, und integrierter Kreis, der eine Vielzahl solcher Matrixspeicher beinhaltet.
KR900006220B1 (en) Semiconductor memory device
US4868414A (en) Scan-path self-testing circuit for logic units
DE3784209D1 (de) Verfahren und anordnungen zum testen von mega-bit-speicherbausteinen mit beliebigen testmustern im multi-bit-testmodus.
WO1987003716A3 (en) Fault tolerant memory system
ATE68289T1 (de) Verfahren und schaltungsanordnung zum parallelen einschreiben von daten in einen halbleiterspeicher.
US3309793A (en) Digital computer trainer
DE3850547D1 (de) Speicher mit eingebautem Logik-LSI und Verfahren zum LSI-Prüfen.
EP0062547A3 (de) Speicherschaltung
EP0342875A3 (de) Speicher mit partiellem Direktzugriff
DE69021105D1 (de) Verfahren und Gerät zur Prüfung von integrierten Schaltungen mit hoher Geschwindigkeit.
JPH0564276A (ja) 時間スイツチ回路
DE3585579D1 (de) Datenuebertragungsverfahren ueber einen multiprozessorbus.
GB1460038A (en) Digital data-processing apparatus
GB1317510A (en) Computers
DE69605815D1 (de) Verfahren zum kodieren von informationen auf einem artikel
EP0308086A3 (de) Eingebaute Prüfausrüstung in Multiplexschaltung
JPS62237552A (ja) 試験アドレス制御方式

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties