ATE149742T1 - Verfahren zum herstellen eines substrates für integrierte mikrowellen-schaltungen - Google Patents
Verfahren zum herstellen eines substrates für integrierte mikrowellen-schaltungenInfo
- Publication number
- ATE149742T1 ATE149742T1 AT89830421T AT89830421T ATE149742T1 AT E149742 T1 ATE149742 T1 AT E149742T1 AT 89830421 T AT89830421 T AT 89830421T AT 89830421 T AT89830421 T AT 89830421T AT E149742 T1 ATE149742 T1 AT E149742T1
- Authority
- AT
- Austria
- Prior art keywords
- substrate
- producing
- microwave integrated
- integrated circuits
- holes
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/066—Transfer laminating of insulating material, e.g. resist as a whole layer, not as a pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
- Y10T428/24322—Composite web or sheet
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Waveguides (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/251,538 US4925723A (en) | 1988-09-29 | 1988-09-29 | Microwave integrated circuit substrate including metal filled via holes and method of manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE149742T1 true ATE149742T1 (de) | 1997-03-15 |
Family
ID=22952396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT89830421T ATE149742T1 (de) | 1988-09-29 | 1989-09-26 | Verfahren zum herstellen eines substrates für integrierte mikrowellen-schaltungen |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4925723A (de) |
| EP (1) | EP0362161B1 (de) |
| JP (1) | JPH02154497A (de) |
| AT (1) | ATE149742T1 (de) |
| DE (1) | DE68927815T2 (de) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5023993A (en) * | 1988-09-30 | 1991-06-18 | Grumman Aerospace Corporation | Method for manufacturing a high-performance package for monolithic microwave integrated circuits |
| US4942076A (en) * | 1988-11-03 | 1990-07-17 | Micro Substrates, Inc. | Ceramic substrate with metal filled via holes for hybrid microcircuits and method of making the same |
| US5379515A (en) * | 1989-12-11 | 1995-01-10 | Canon Kabushiki Kaisha | Process for preparing electrical connecting member |
| IT1238150B (it) * | 1990-01-31 | 1993-07-09 | Procedimento per l'accoppiamento a caldo di strutture sottili in materiale sintetico come tessuti, tessuti non tessuti, moquettes ed altro, a manufatti in materiale sintetico | |
| WO1992008606A1 (en) * | 1990-11-19 | 1992-05-29 | The Carborundum Company | Microelectronics package |
| US5055966A (en) * | 1990-12-17 | 1991-10-08 | Hughes Aircraft Company | Via capacitors within multi-layer, 3 dimensional structures/substrates |
| JP3166251B2 (ja) * | 1991-12-18 | 2001-05-14 | 株式会社村田製作所 | セラミック多層電子部品の製造方法 |
| JP2707903B2 (ja) * | 1992-01-28 | 1998-02-04 | 日本電気株式会社 | 多層プリント配線板の製造方法 |
| US5401913A (en) * | 1993-06-08 | 1995-03-28 | Minnesota Mining And Manufacturing Company | Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board |
| US5761803A (en) * | 1996-06-26 | 1998-06-09 | St. John; Frank | Method of forming plugs in vias of a circuit board by utilizing a porous membrane |
| JPH1032221A (ja) * | 1996-07-12 | 1998-02-03 | Nec Corp | プリント配線基板 |
| EP0948049A1 (de) * | 1998-03-03 | 1999-10-06 | Ching-Kuang Tzuang | Gehäuse für integrierte Mikrowellen- oder Millimeterwellen-Schaltung im Zweifachmodus |
| TW396462B (en) * | 1998-12-17 | 2000-07-01 | Eriston Technologies Pte Ltd | Bumpless flip chip assembly with solder via |
| US6284574B1 (en) | 1999-01-04 | 2001-09-04 | International Business Machines Corporation | Method of producing heat dissipating structure for semiconductor devices |
| EP1181239A1 (de) * | 1999-03-31 | 2002-02-27 | Siemens Aktiengesellschaft | Verfahren zur herstellung von freitragenden mikrostrukturen, von dünnen flachteilen oder von membranen und verwendung nach diesem verfahren hergestellter mikrostrukturen als widerstandsgitter in einer einrichtung zur messung schwacher gasströmungen |
| US6492715B1 (en) | 2000-09-13 | 2002-12-10 | International Business Machines Corporation | Integrated semiconductor package |
| DE10302104A1 (de) * | 2003-01-21 | 2004-08-05 | Friwo Gerätebau Gmbh | Verfahren zum Herstellen von Schaltungsträgern mit intergrierten passiven Bauelementen |
| EP1480500B1 (de) * | 2003-05-16 | 2007-05-16 | Friwo Mobile Power GmbH | Leistungsversorgungsschaltung mit dreidimensional angeordneten Schaltungsträgern sowie Herstellungsverfahren |
| US7166877B2 (en) * | 2004-07-30 | 2007-01-23 | Bae Systems Information And Electronic Systems Integration Inc. | High frequency via |
| US8362368B2 (en) * | 2009-04-27 | 2013-01-29 | Ultrasource, Inc. | Method and apparatus for an improved filled via |
| RU2472325C1 (ru) * | 2011-05-20 | 2013-01-10 | Игорь Валентинович Колядов | Способ изготовления металлизированных отверстий в печатной плате |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3205298A (en) * | 1963-03-25 | 1965-09-07 | Charles G Kalt | Printed circuit board |
| US3562009A (en) * | 1967-02-14 | 1971-02-09 | Western Electric Co | Method of providing electrically conductive substrate through-holes |
| IT8048031A0 (it) * | 1979-04-09 | 1980-02-28 | Raytheon Co | Perfezionamento nei dispositivi a semiconduttore ad effetto di campo |
| US4396467A (en) * | 1980-10-27 | 1983-08-02 | General Electric Company | Periodic reverse current pulsing to form uniformly sized feed through conductors |
| US4667219A (en) * | 1984-04-27 | 1987-05-19 | Trilogy Computer Development Partners, Ltd. | Semiconductor chip interface |
| US4700473A (en) * | 1986-01-03 | 1987-10-20 | Motorola Inc. | Method of making an ultra high density pad array chip carrier |
| US4731701A (en) * | 1987-05-12 | 1988-03-15 | Fairchild Semiconductor Corporation | Integrated circuit package with thermal path layers incorporating staggered thermal vias |
| US4926241A (en) * | 1988-02-19 | 1990-05-15 | Microelectronics And Computer Technology Corporation | Flip substrate for chip mount |
-
1988
- 1988-09-29 US US07/251,538 patent/US4925723A/en not_active Expired - Lifetime
-
1989
- 1989-09-26 DE DE68927815T patent/DE68927815T2/de not_active Expired - Fee Related
- 1989-09-26 JP JP1250382A patent/JPH02154497A/ja active Pending
- 1989-09-26 AT AT89830421T patent/ATE149742T1/de not_active IP Right Cessation
- 1989-09-26 EP EP89830421A patent/EP0362161B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0362161A2 (de) | 1990-04-04 |
| US4925723A (en) | 1990-05-15 |
| DE68927815T2 (de) | 1997-09-04 |
| DE68927815D1 (de) | 1997-04-10 |
| JPH02154497A (ja) | 1990-06-13 |
| EP0362161B1 (de) | 1997-03-05 |
| EP0362161A3 (de) | 1990-09-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE149742T1 (de) | Verfahren zum herstellen eines substrates für integrierte mikrowellen-schaltungen | |
| DE69031257D1 (de) | Integrierte Schaltung, die an der Oberfläche eines Halbleitersubstrats angeordnet ist, und Verfahren zur Herstellung derselben | |
| GB2097998B (en) | Mounting of integrated circuits | |
| GB2341277A (en) | An electronic component package with posts on the active surface | |
| EP0210520A3 (en) | Apparatus for making scribed circuit boards and circuit board modifications | |
| EP0471003A4 (de) | Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte. | |
| GB2146177B (en) | Substrates for interconnecting electronic components | |
| ATE93075T1 (de) | Verfahren zum montieren eines elektronischen bausteins und diesen verwendende speicherkarte. | |
| DE3781596D1 (de) | Verfahren zum montieren veredelter kontaktflaechen auf einem substrat sowie mit diesen kontaktflaechen versehenes substrat. | |
| EP0358350A3 (de) | Ausbilden eines vorgeschriebenen Musters auf einer Schicht eines Halbleiterelements | |
| DE68917695D1 (de) | Verfahren zum Herstellen von Leiterbahnen innerhalb eines isolierenden Substrates Isolierendensubstrat. | |
| ATE115335T1 (de) | Verbindungsartikel für hybrid-mikrochip. | |
| DE3752286D1 (de) | In einem tiefen Graben formierte Isolation mit Kontakt an der Oberfläche des Substrates | |
| GB8823537D0 (en) | Circuit board manufacture | |
| ATA288085A (de) | Verfahren zum an- und abätzen von kunststoffschichten in bohrungen von basismaterial für leiterplatten | |
| MY110093A (en) | Two-layer or multilayer printed circuit board | |
| JPS6413794A (en) | Forming method for circuit | |
| DE69029068D1 (de) | Verfahren zum Herstellen eines kontaktloches in einem integrierten Halbleiterstromkreis | |
| NO20013977D0 (no) | Fremgangsmate for avgivelse av klebemiddel pa en kretsplateborer og kretsplate dannet med fremgangsmaten | |
| AT378308B (de) | Verfahren zum herstellen von leiterplatten mit mindestens zwei leiterzugebenen | |
| IL105753A0 (en) | Printed circuit substrates | |
| FR2602629B1 (fr) | Circuit imprime souple a composants en surface, et procede pour le fabriquer | |
| FI900434A7 (fi) | Puolijohdekomponentin pinta-asennukseen soveltuva laite ja menetelmä komponentin pinta-asentamiseksi kannatinlevylle | |
| JPS6464392A (en) | Transcription sheet for circuit formation use and manufacture of circuit board using transcription sheet | |
| ES2040439T3 (es) | Procedimiento para la fabricacion de circuitos impresos provistos de superficies de contacto. |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |