ATE186155T1 - Verfahren zum planarisieren einer halbleitersubstratsoberfläche - Google Patents
Verfahren zum planarisieren einer halbleitersubstratsoberflächeInfo
- Publication number
- ATE186155T1 ATE186155T1 AT92110128T AT92110128T ATE186155T1 AT E186155 T1 ATE186155 T1 AT E186155T1 AT 92110128 T AT92110128 T AT 92110128T AT 92110128 T AT92110128 T AT 92110128T AT E186155 T1 ATE186155 T1 AT E186155T1
- Authority
- AT
- Austria
- Prior art keywords
- film
- substrate surface
- planarizing
- semiconductor substrate
- depositing
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
- H10P14/6506—Formation of intermediate materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6548—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/092—Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6923—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3149013A JP2538722B2 (ja) | 1991-06-20 | 1991-06-20 | 半導体装置の製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE186155T1 true ATE186155T1 (de) | 1999-11-15 |
Family
ID=15465768
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT92110128T ATE186155T1 (de) | 1991-06-20 | 1992-06-16 | Verfahren zum planarisieren einer halbleitersubstratsoberfläche |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5286681A (de) |
| EP (1) | EP0519393B1 (de) |
| JP (1) | JP2538722B2 (de) |
| AT (1) | ATE186155T1 (de) |
| DE (1) | DE69230197T2 (de) |
Families Citing this family (49)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5576247A (en) * | 1992-07-31 | 1996-11-19 | Matsushita Electric Industrial Co., Ltd. | Thin layer forming method wherein hydrophobic molecular layers preventing a BPSG layer from absorbing moisture |
| JP2809018B2 (ja) * | 1992-11-26 | 1998-10-08 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| US5448111A (en) * | 1993-09-20 | 1995-09-05 | Fujitsu Limited | Semiconductor device and method for fabricating the same |
| KR970006262B1 (ko) * | 1994-02-04 | 1997-04-25 | 금성일렉트론 주식회사 | 도우핑된 디스포저블층(disposable layer)을 이용한 모스트랜지스터의 제조방법 |
| US6489255B1 (en) * | 1995-06-05 | 2002-12-03 | International Business Machines Corporation | Low temperature/low dopant oxide glass film |
| KR100200297B1 (ko) * | 1995-06-30 | 1999-06-15 | 김영환 | 반도체 소자의 콘택홀 형성방법 |
| KR0172039B1 (ko) * | 1995-06-30 | 1999-03-30 | 김주용 | 보론 포스포러스 실리케이트 글래스막 형성방법 |
| US6040020A (en) * | 1995-08-07 | 2000-03-21 | Micron Technology, Inc. | Method of forming a film having enhanced reflow characteristics at low thermal budget |
| JP3979687B2 (ja) | 1995-10-26 | 2007-09-19 | アプライド マテリアルズ インコーポレイテッド | ハロゲンをドープした酸化珪素膜の膜安定性を改良する方法 |
| KR100262400B1 (ko) * | 1995-11-20 | 2000-09-01 | 김영환 | 반도체 소자의 평탄화방법 |
| US6169026B1 (en) | 1995-11-20 | 2001-01-02 | Hyundai Electronics Industries Co., Ltd. | Method for planarization of semiconductor device including pumping out dopants from planarization layer separately from flowing said layer |
| KR100214073B1 (ko) * | 1995-12-16 | 1999-08-02 | 김영환 | 비피에스지막 형성방법 |
| US5770469A (en) * | 1995-12-29 | 1998-06-23 | Lam Research Corporation | Method for forming semiconductor structure using modulation doped silicate glasses |
| US6489213B1 (en) | 1996-01-05 | 2002-12-03 | Integrated Device Technology, Inc. | Method for manufacturing semiconductor device containing a silicon-rich layer |
| KR100255659B1 (ko) * | 1996-03-30 | 2000-05-01 | 윤종용 | 반도체 장치의 sog층 처리 방법 |
| KR100211540B1 (ko) * | 1996-05-22 | 1999-08-02 | 김영환 | 반도체소자의 층간절연막 형성방법 |
| US5710079A (en) * | 1996-05-24 | 1998-01-20 | Lsi Logic Corporation | Method and apparatus for forming dielectric films |
| JPH09331033A (ja) * | 1996-06-05 | 1997-12-22 | Taiwan Moseki Denshi Kofun Yugenkoshi | 半導体コンデンサーの製造方法及びその構造 |
| KR100203134B1 (ko) * | 1996-06-27 | 1999-06-15 | 김영환 | 반도체 소자의 층간절연막 평탄화방법 |
| KR100230984B1 (ko) * | 1996-07-24 | 1999-11-15 | 김광호 | 반도체장치의 비피에스지에 포함된 불순물 측정시 이용되는 계측설비 설정값 보정용 기준 샘플 제조 방법 |
| US5990513A (en) * | 1996-10-08 | 1999-11-23 | Ramtron International Corporation | Yield enhancement technique for integrated circuit processing to reduce effects of undesired dielectric moisture retention and subsequent hydrogen out-diffusion |
| JP2937140B2 (ja) | 1996-10-09 | 1999-08-23 | 日本電気株式会社 | 半導体装置の製造方法 |
| GB2322734A (en) * | 1997-02-27 | 1998-09-02 | Nec Corp | Semiconductor device and a method of manufacturing the same |
| US6492282B1 (en) * | 1997-04-30 | 2002-12-10 | Siemens Aktiengesellschaft | Integrated circuits and manufacturing methods |
| JPH1126449A (ja) * | 1997-06-30 | 1999-01-29 | Sony Corp | 絶縁膜の成膜方法 |
| US6096654A (en) * | 1997-09-30 | 2000-08-01 | Siemens Aktiengesellschaft | Gapfill of semiconductor structure using doped silicate glasses |
| US5976900A (en) * | 1997-12-08 | 1999-11-02 | Cypress Semiconductor Corp. | Method of reducing impurity contamination in semiconductor process chambers |
| US6057250A (en) * | 1998-01-27 | 2000-05-02 | International Business Machines Corporation | Low temperature reflow dielectric-fluorinated BPSG |
| JP3208376B2 (ja) | 1998-05-20 | 2001-09-10 | 株式会社半導体プロセス研究所 | 成膜方法及び半導体装置の製造方法 |
| US6159870A (en) * | 1998-12-11 | 2000-12-12 | International Business Machines Corporation | Borophosphosilicate glass incorporated with fluorine for low thermal budget gap fill |
| US6165905A (en) * | 1999-01-20 | 2000-12-26 | Philips Electronics, North America Corp. | Methods for making reliable via structures having hydrophobic inner wall surfaces |
| US6261975B1 (en) | 1999-03-04 | 2001-07-17 | Applied Materials, Inc. | Method for depositing and planarizing fluorinated BPSG films |
| US6242299B1 (en) | 1999-04-01 | 2001-06-05 | Ramtron International Corporation | Barrier layer to protect a ferroelectric capacitor after contact has been made to the capacitor electrode |
| US6303496B1 (en) | 1999-04-27 | 2001-10-16 | Cypress Semiconductor Corporation | Methods of filling constrained spaces with insulating materials and/or of forming contact holes and/or contacts in an integrated circuit |
| US6511923B1 (en) * | 2000-05-19 | 2003-01-28 | Applied Materials, Inc. | Deposition of stable dielectric films |
| US6730619B2 (en) * | 2000-06-15 | 2004-05-04 | Samsung Electronics Co., Ltd. | Method of manufacturing insulating layer and semiconductor device including insulating layer |
| JP2002076342A (ja) | 2000-09-05 | 2002-03-15 | Fuji Electric Co Ltd | トレンチゲート型半導体装置 |
| KR100506054B1 (ko) * | 2000-12-28 | 2005-08-05 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
| US7351503B2 (en) * | 2001-01-22 | 2008-04-01 | Photronics, Inc. | Fused silica pellicle in intimate contact with the surface of a photomask |
| KR20030067379A (ko) * | 2002-02-08 | 2003-08-14 | 주식회사 하이닉스반도체 | 반도체 소자의 층간 절연막 평탄화 방법 |
| KR100478481B1 (ko) * | 2002-08-19 | 2005-03-28 | 동부아남반도체 주식회사 | 반도체 소자의 평탄화 방법 |
| KR100561301B1 (ko) * | 2004-11-04 | 2006-03-15 | 동부아남반도체 주식회사 | 반도체 제조 방법 |
| EP1886189A2 (de) * | 2005-06-02 | 2008-02-13 | Dow Corning Corporation | Verfahren zur nanostrukturierung, vewendung eines ausgehärteten resistsfilms dabei und artikel mit dem resistfilm |
| US9092582B2 (en) | 2010-07-09 | 2015-07-28 | Cypress Semiconductor Corporation | Low power, low pin count interface for an RFID transponder |
| US8723654B2 (en) | 2010-07-09 | 2014-05-13 | Cypress Semiconductor Corporation | Interrupt generation and acknowledgment for RFID |
| US9846664B2 (en) | 2010-07-09 | 2017-12-19 | Cypress Semiconductor Corporation | RFID interface and interrupt |
| JP6245723B2 (ja) * | 2012-04-27 | 2017-12-13 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
| JP7155634B2 (ja) * | 2018-06-12 | 2022-10-19 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
| CN110148555B (zh) * | 2019-06-05 | 2021-07-09 | 扬州扬杰电子科技股份有限公司 | 一种用于势垒前的氢氟酸雾清洗工艺 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS577939A (en) * | 1980-06-18 | 1982-01-16 | Toshiba Corp | Manufacture of semiconductor device |
| JPS58137233A (ja) * | 1982-02-09 | 1983-08-15 | Mitsubishi Electric Corp | 半導体装置 |
| US4985373A (en) * | 1982-04-23 | 1991-01-15 | At&T Bell Laboratories | Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures |
| US4474831A (en) * | 1982-08-27 | 1984-10-02 | Varian Associates, Inc. | Method for reflow of phosphosilicate glass |
| US4743564A (en) * | 1984-12-28 | 1988-05-10 | Kabushiki Kaisha Toshiba | Method for manufacturing a complementary MOS type semiconductor device |
| JPH0669039B2 (ja) * | 1985-04-12 | 1994-08-31 | 株式会社リコー | 半導体装置の製造方法 |
| JPS61237448A (ja) * | 1985-04-12 | 1986-10-22 | Ricoh Co Ltd | 半導体装置の製造方法 |
| US4966865A (en) * | 1987-02-05 | 1990-10-30 | Texas Instruments Incorporated | Method for planarization of a semiconductor device prior to metallization |
| JPH01114052A (ja) * | 1987-10-28 | 1989-05-02 | Hitachi Ltd | 半導体装置の製造方法 |
| IT1227245B (it) * | 1988-09-29 | 1991-03-27 | Sgs Thomson Microelectronics | Strato dielettrico di prima interconnessione per dispositivi elettronici a semiconduttore |
| JPH02229430A (ja) * | 1989-03-02 | 1990-09-12 | Rohm Co Ltd | 半導体装置の製造方法 |
| US4939105A (en) * | 1989-08-03 | 1990-07-03 | Micron Technology, Inc. | Planarizing contact etch |
| US5166101A (en) * | 1989-09-28 | 1992-11-24 | Applied Materials, Inc. | Method for forming a boron phosphorus silicate glass composite layer on a semiconductor wafer |
| DE69024578T2 (de) * | 1989-09-28 | 1996-09-19 | Applied Materials Inc | Integrierte Schaltungsstruktur mit einer zusammengesetzten Borphosphorsilikatglasschicht auf einer Halbleiterscheibe und verbesserte Herstellungsmethode dafür |
| US5132774A (en) * | 1990-02-05 | 1992-07-21 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including interlayer insulating film |
| US5094984A (en) * | 1990-10-12 | 1992-03-10 | Hewlett-Packard Company | Suppression of water vapor absorption in glass encapsulation |
-
1991
- 1991-06-20 JP JP3149013A patent/JP2538722B2/ja not_active Expired - Lifetime
-
1992
- 1992-06-16 AT AT92110128T patent/ATE186155T1/de not_active IP Right Cessation
- 1992-06-16 EP EP92110128A patent/EP0519393B1/de not_active Expired - Lifetime
- 1992-06-16 DE DE69230197T patent/DE69230197T2/de not_active Expired - Fee Related
- 1992-06-19 US US07/901,329 patent/US5286681A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0519393A3 (en) | 1993-02-03 |
| DE69230197D1 (de) | 1999-12-02 |
| JP2538722B2 (ja) | 1996-10-02 |
| EP0519393B1 (de) | 1999-10-27 |
| EP0519393A2 (de) | 1992-12-23 |
| US5286681A (en) | 1994-02-15 |
| DE69230197T2 (de) | 2000-05-25 |
| JPH0669192A (ja) | 1994-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |