ATE186155T1 - Verfahren zum planarisieren einer halbleitersubstratsoberfläche - Google Patents

Verfahren zum planarisieren einer halbleitersubstratsoberfläche

Info

Publication number
ATE186155T1
ATE186155T1 AT92110128T AT92110128T ATE186155T1 AT E186155 T1 ATE186155 T1 AT E186155T1 AT 92110128 T AT92110128 T AT 92110128T AT 92110128 T AT92110128 T AT 92110128T AT E186155 T1 ATE186155 T1 AT E186155T1
Authority
AT
Austria
Prior art keywords
film
substrate surface
planarizing
semiconductor substrate
depositing
Prior art date
Application number
AT92110128T
Other languages
English (en)
Inventor
Kazuo Maeda
Bunya Matsui
Yuko Nishimoto
Original Assignee
Semiconductor Process Lab Co
Alcan Tech Co Inc
Canon Sales Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Process Lab Co, Alcan Tech Co Inc, Canon Sales Co Inc filed Critical Semiconductor Process Lab Co
Application granted granted Critical
Publication of ATE186155T1 publication Critical patent/ATE186155T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6506Formation of intermediate materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6548Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/092Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6923Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Weting (AREA)
AT92110128T 1991-06-20 1992-06-16 Verfahren zum planarisieren einer halbleitersubstratsoberfläche ATE186155T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3149013A JP2538722B2 (ja) 1991-06-20 1991-06-20 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
ATE186155T1 true ATE186155T1 (de) 1999-11-15

Family

ID=15465768

Family Applications (1)

Application Number Title Priority Date Filing Date
AT92110128T ATE186155T1 (de) 1991-06-20 1992-06-16 Verfahren zum planarisieren einer halbleitersubstratsoberfläche

Country Status (5)

Country Link
US (1) US5286681A (de)
EP (1) EP0519393B1 (de)
JP (1) JP2538722B2 (de)
AT (1) ATE186155T1 (de)
DE (1) DE69230197T2 (de)

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US5990513A (en) * 1996-10-08 1999-11-23 Ramtron International Corporation Yield enhancement technique for integrated circuit processing to reduce effects of undesired dielectric moisture retention and subsequent hydrogen out-diffusion
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GB2322734A (en) * 1997-02-27 1998-09-02 Nec Corp Semiconductor device and a method of manufacturing the same
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KR100478481B1 (ko) * 2002-08-19 2005-03-28 동부아남반도체 주식회사 반도체 소자의 평탄화 방법
KR100561301B1 (ko) * 2004-11-04 2006-03-15 동부아남반도체 주식회사 반도체 제조 방법
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US9092582B2 (en) 2010-07-09 2015-07-28 Cypress Semiconductor Corporation Low power, low pin count interface for an RFID transponder
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Also Published As

Publication number Publication date
EP0519393A3 (en) 1993-02-03
DE69230197D1 (de) 1999-12-02
JP2538722B2 (ja) 1996-10-02
EP0519393B1 (de) 1999-10-27
EP0519393A2 (de) 1992-12-23
US5286681A (en) 1994-02-15
DE69230197T2 (de) 2000-05-25
JPH0669192A (ja) 1994-03-11

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