ATE195596T1 - Ein massiv multiplexierter, superskalarer prozessor mit harvard-architektur - Google Patents

Ein massiv multiplexierter, superskalarer prozessor mit harvard-architektur

Info

Publication number
ATE195596T1
ATE195596T1 AT95909225T AT95909225T ATE195596T1 AT E195596 T1 ATE195596 T1 AT E195596T1 AT 95909225 T AT95909225 T AT 95909225T AT 95909225 T AT95909225 T AT 95909225T AT E195596 T1 ATE195596 T1 AT E195596T1
Authority
AT
Austria
Prior art keywords
cpu
computational circuits
circuits
general purpose
computational
Prior art date
Application number
AT95909225T
Other languages
English (en)
Inventor
Wayne P Dupree
Stephen G Churchill
Jeffry R Gallant
Larry A Root
William J Bressette
Robert A Orr Iii
Srikala Ramaswamy
Jeffrey A Lucas
James A Bleck
Original Assignee
Dow Chemical Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Chemical Co filed Critical Dow Chemical Co
Application granted granted Critical
Publication of ATE195596T1 publication Critical patent/ATE195596T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
    • G06F15/7832—Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
  • Machine Translation (AREA)
AT95909225T 1994-01-10 1995-01-10 Ein massiv multiplexierter, superskalarer prozessor mit harvard-architektur ATE195596T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US17925694A 1994-01-10 1994-01-10
PCT/US1995/000341 WO1995019006A1 (en) 1994-01-10 1995-01-10 A massively miltiplexed superscalar harvard architecture computer

Publications (1)

Publication Number Publication Date
ATE195596T1 true ATE195596T1 (de) 2000-09-15

Family

ID=22655833

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95909225T ATE195596T1 (de) 1994-01-10 1995-01-10 Ein massiv multiplexierter, superskalarer prozessor mit harvard-architektur

Country Status (9)

Country Link
US (1) US5655133A (de)
EP (1) EP0739517B1 (de)
JP (1) JPH09507596A (de)
AT (1) ATE195596T1 (de)
CA (1) CA2180855A1 (de)
DE (1) DE69518403T2 (de)
ES (1) ES2148492T3 (de)
SG (1) SG44642A1 (de)
WO (1) WO1995019006A1 (de)

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Also Published As

Publication number Publication date
ES2148492T3 (es) 2000-10-16
DE69518403T2 (de) 2001-03-29
EP0739517A1 (de) 1996-10-30
US5655133A (en) 1997-08-05
SG44642A1 (en) 1997-12-19
WO1995019006A1 (en) 1995-07-13
CA2180855A1 (en) 1995-07-13
DE69518403D1 (de) 2000-09-21
JPH09507596A (ja) 1997-07-29
EP0739517B1 (de) 2000-08-16

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