ATE213095T1 - Verfahren zur herstellung von oxydschichten - Google Patents

Verfahren zur herstellung von oxydschichten

Info

Publication number
ATE213095T1
ATE213095T1 AT95303595T AT95303595T ATE213095T1 AT E213095 T1 ATE213095 T1 AT E213095T1 AT 95303595 T AT95303595 T AT 95303595T AT 95303595 T AT95303595 T AT 95303595T AT E213095 T1 ATE213095 T1 AT E213095T1
Authority
AT
Austria
Prior art keywords
oxide
semiconductor body
oxides
ambient
anneal
Prior art date
Application number
AT95303595T
Other languages
English (en)
Inventor
Dirk J Wristers
Dim-Lee Kwong
Jim H Fulford Jr
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE213095T1 publication Critical patent/ATE213095T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01344Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a nitrogen-containing ambient, e.g. N2O oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01346Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a gaseous ambient using an oxygen or a water vapour, e.g. oxidation through a layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/909Controlled atmosphere
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/954Making oxide-nitride-oxide device

Landscapes

  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Non-Volatile Memory (AREA)
  • Oxygen, Ozone, And Oxides In General (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
AT95303595T 1994-06-03 1995-05-26 Verfahren zur herstellung von oxydschichten ATE213095T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/253,771 US5591681A (en) 1994-06-03 1994-06-03 Method for achieving a highly reliable oxide film

Publications (1)

Publication Number Publication Date
ATE213095T1 true ATE213095T1 (de) 2002-02-15

Family

ID=22961632

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95303595T ATE213095T1 (de) 1994-06-03 1995-05-26 Verfahren zur herstellung von oxydschichten

Country Status (5)

Country Link
US (1) US5591681A (de)
EP (1) EP0690487B1 (de)
JP (1) JPH08167664A (de)
AT (1) ATE213095T1 (de)
DE (1) DE69525288T2 (de)

Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726087A (en) * 1992-04-30 1998-03-10 Motorola, Inc. Method of formation of semiconductor gate dielectric
US5840600A (en) * 1994-08-31 1998-11-24 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device and apparatus for treating semiconductor device
US6706572B1 (en) 1994-08-31 2004-03-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film transistor using a high pressure oxidation step
JPH0878693A (ja) * 1994-08-31 1996-03-22 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP3963961B2 (ja) * 1994-08-31 2007-08-22 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2871530B2 (ja) * 1995-05-10 1999-03-17 日本電気株式会社 半導体装置の製造方法
DE69528971D1 (de) * 1995-06-30 2003-01-09 St Microelectronics Srl Herstellungsverfahren eines Schaltkreises, der nichtflüchtige Speicherzellen und Randtransistoren von mindestens zwei unterschiedlichen Typen enthält, und entsprechender IC
US5880040A (en) * 1996-04-15 1999-03-09 Macronix International Co., Ltd. Gate dielectric based on oxynitride grown in N2 O and annealed in NO
KR980012639A (ko) * 1996-07-29 1998-04-30 윌리엄 비. 켐플러 초박 적층형 게이트 유전체 구조물
US5960274A (en) * 1996-08-19 1999-09-28 Advanced Micro Devices, Inc. Oxide formation process for manufacturing programmable logic device
US6033943A (en) * 1996-08-23 2000-03-07 Advanced Micro Devices, Inc. Dual gate oxide thickness integrated circuit and process for making same
US5854503A (en) * 1996-11-19 1998-12-29 Integrated Device Technology, Inc. Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit
US5923983A (en) * 1996-12-23 1999-07-13 Advanced Micro Devices, Inc. Integrated circuit gate conductor having a gate dielectric which is substantially resistant to hot carrier effects
US5744391A (en) * 1997-01-15 1998-04-28 Taiwan Semiconductor Manufacturing Company Ltd. Method to improve isolation between EEPROM devices via a field oxide anneal
US5904575A (en) * 1997-02-14 1999-05-18 Advanced Micro Devices, Inc. Method and apparatus incorporating nitrogen selectively for differential oxide growth
JP3949211B2 (ja) * 1997-03-06 2007-07-25 富士通株式会社 半導体装置の製造方法
US6461984B1 (en) * 1997-03-18 2002-10-08 Korea Advanced Institute Of Science & Technology Semiconductor device using N2O plasma oxide and a method of fabricating the same
US5786254A (en) * 1997-03-19 1998-07-28 Advanced Micro Devices, Inc. Hot-carrier reliability in submicron MOS devices by oxynitridation
US6130164A (en) * 1997-03-26 2000-10-10 Advanced Micro Devices, Inc. Semiconductor device having gate oxide formed by selective oxide removal and method of manufacture thereof
US6037224A (en) * 1997-05-02 2000-03-14 Advanced Micro Devices, Inc. Method for growing dual oxide thickness using nitrided oxides for oxidation suppression
US6051510A (en) * 1997-05-02 2000-04-18 Advanced Micro Devices, Inc. Method of using a hard mask to grow dielectrics with varying characteristics
TW423163B (en) * 1997-07-18 2001-02-21 Sanyo Electric Co Non volatile semiconductor device and its manufacturing process
US6020024A (en) * 1997-08-04 2000-02-01 Motorola, Inc. Method for forming high dielectric constant metal oxides
US5869370A (en) * 1997-12-29 1999-02-09 Taiwan Semiconductor Manufacturing Company Ltd. Ultra thin tunneling oxide using buffer CVD to improve edge thinning
US5989977A (en) * 1998-04-20 1999-11-23 Texas Instruments - Acer Incorporated Shallow trench isolation process
US6074917A (en) * 1998-06-16 2000-06-13 Advanced Micro Devices, Inc. LPCVD oxide and RTA for top oxide of ONO film to improve reliability for flash memory devices
US6063666A (en) * 1998-06-16 2000-05-16 Advanced Micro Devices, Inc. RTCVD oxide and N2 O anneal for top oxide of ONO film
US6271153B1 (en) 1998-07-22 2001-08-07 Micron Technology, Inc. Semiconductor processing method and trench isolation method
US6037235A (en) 1998-09-14 2000-03-14 Applied Materials, Inc. Hydrogen anneal for curing defects of silicon/nitride interfaces of semiconductor devices
US6911707B2 (en) * 1998-12-09 2005-06-28 Advanced Micro Devices, Inc. Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance
US6190973B1 (en) 1998-12-18 2001-02-20 Zilog Inc. Method of fabricating a high quality thin oxide
US6309927B1 (en) 1999-03-05 2001-10-30 Advanced Micro Devices, Inc. Method of forming high K tantalum pentoxide Ta2O5 instead of ONO stacked films to increase coupling ratio and improve reliability for flash memory devices
US6162684A (en) * 1999-03-11 2000-12-19 Advanced Micro Devices, Inc. Ammonia annealed and wet oxidized LPCVD oxide to replace ono films for high integrated flash memory devices
US6110780A (en) * 1999-04-01 2000-08-29 Taiwan Semiconductor Manufacturing Company Using NO or N2 O treatment to generate different oxide thicknesses in one oxidation step for single poly non-volatile memory
JP2000332237A (ja) * 1999-05-17 2000-11-30 Mitsubishi Electric Corp 半導体装置の製造方法
US6232630B1 (en) 1999-07-07 2001-05-15 Advanced Micro Devices, Inc. Light floating gate doping to improve tunnel oxide reliability
JP3472727B2 (ja) * 1999-08-13 2003-12-02 Necエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US6380033B1 (en) * 1999-09-20 2002-04-30 Advanced Micro Devices, Inc. Process to improve read disturb for NAND flash memory devices
US6509604B1 (en) * 2000-01-26 2003-01-21 Advanced Micro Devices, Inc. Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation
JP2002009282A (ja) * 2000-04-19 2002-01-11 Seiko Instruments Inc 半導体装置の製造方法
US6184155B1 (en) 2000-06-19 2001-02-06 Taiwan Semiconductor Manufacturing Company Method for forming a ultra-thin gate insulator layer
JP3746669B2 (ja) * 2000-10-17 2006-02-15 株式会社ルネサステクノロジ 半導体装置の製造方法
US6403425B1 (en) * 2001-11-27 2002-06-11 Chartered Semiconductor Manufacturing Ltd. Dual gate oxide process with reduced thermal distribution of thin-gate channel implant profiles due to thick-gate oxide
JP2004023008A (ja) * 2002-06-20 2004-01-22 Renesas Technology Corp 半導体集積回路装置およびその製造方法
KR100548550B1 (ko) * 2002-07-12 2006-02-02 주식회사 하이닉스반도체 반도체 소자의 옥사이드와 나이트라이드의 인시튜 형성방법
KR100512464B1 (ko) 2002-12-30 2005-09-07 동부아남반도체 주식회사 이이피롬 소자 제조방법
US7709403B2 (en) * 2003-10-09 2010-05-04 Panasonic Corporation Silicon carbide-oxide layered structure, production method thereof, and semiconductor device
KR100596484B1 (ko) * 2004-05-31 2006-07-03 삼성전자주식회사 유전막 형성 방법 및 이를 이용한 불휘발성 메모리 장치의제조방법
KR100644397B1 (ko) * 2005-04-07 2006-11-10 삼성전자주식회사 박막 처리방법 및 이를 이용한 불 휘발성 메모리 셀의제조방법
US7635651B2 (en) * 2005-08-23 2009-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method of smoothening dielectric layer
CN100428492C (zh) * 2005-09-20 2008-10-22 联华电子股份有限公司 超高压金属氧化物半导体晶体管元件
DE102006041424A1 (de) * 2006-09-04 2008-03-20 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur simultanen Dotierung und Oxidation von Halbleitersubstraten und dessen Verwendung
US7781289B1 (en) * 2007-05-03 2010-08-24 National Semiconductor Corporation Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits
JP5176428B2 (ja) * 2007-08-20 2013-04-03 富士通セミコンダクター株式会社 酸窒化処理装置及び方法、並びに半導体装置の製造方法
FR2924859B1 (fr) * 2007-12-05 2010-02-26 St Microelectronics Rousset Procede de fabrication d'une cellule memoire eeprom
FR2933684B1 (fr) * 2008-07-09 2011-05-06 Commissariat Energie Atomique Procede de purification d'un substrat en silicium cristallin et procede d'elaboration d'une cellule photovoltaique
DE102009047311B4 (de) * 2009-11-30 2016-06-02 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung von Gatestrukturen mit verbesserten Grenzflächeneigenschaften zwischen einer Kanalhalbleiterlegierung und einem Gatedielektrikum mittels eines Oxidationsprozesses
US8394688B2 (en) 2011-06-27 2013-03-12 United Microelectronics Corp. Process for forming repair layer and MOS transistor having repair layer
US8741784B2 (en) 2011-09-20 2014-06-03 United Microelectronics Corp. Process for fabricating semiconductor device and method of fabricating metal oxide semiconductor device
CN102412253A (zh) * 2011-11-30 2012-04-11 上海华力微电子有限公司 浮体效应存储器件用soi硅片及制造方法、存储器件
US9634083B2 (en) 2012-12-10 2017-04-25 United Microelectronics Corp. Semiconductor structure and process thereof
US10453678B2 (en) * 2017-04-13 2019-10-22 Applied Materials, Inc. Method and apparatus for deposition of low-k films
US10566446B2 (en) * 2018-05-30 2020-02-18 Globalfoundries Inc. Mitigation of hot carrier damage in field-effect transistors
TWI691019B (zh) 2019-03-19 2020-04-11 華邦電子股份有限公司 快閃記憶體裝置及其製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5662328A (en) * 1979-10-26 1981-05-28 Agency Of Ind Science & Technol Manufacturing of insulation membrane and insulation membrane-semiconductor interface
KR930008499B1 (ko) * 1980-12-20 1993-09-07 마쓰시다 덴기 산교 가부시기가이샤 반도체장치와 그 제조방법
JPS62158866A (ja) * 1986-01-06 1987-07-14 Semiconductor Energy Lab Co Ltd 酸化珪素作製方法
US4784975A (en) * 1986-10-23 1988-11-15 International Business Machines Corporation Post-oxidation anneal of silicon dioxide
JPH05299412A (ja) * 1992-04-23 1993-11-12 Kojundo Chem Lab Co Ltd 半導体装置のシリコン酸化膜の製造法
US5316981A (en) 1992-10-09 1994-05-31 Advanced Micro Devices, Inc. Method for achieving a high quality thin oxide using a sacrificial oxide anneal
US5296411A (en) * 1993-04-28 1994-03-22 Advanced Micro Devices, Inc. Method for achieving an ultra-reliable thin oxide using a nitrogen anneal
US5306658A (en) * 1993-05-27 1994-04-26 Texas Instruments Incorporated Method of making virtual ground memory cell array
US5382550A (en) * 1993-08-05 1995-01-17 Micron Semiconductor, Inc. Method of depositing SiO2 on a semiconductor substrate

Also Published As

Publication number Publication date
US5591681A (en) 1997-01-07
EP0690487A1 (de) 1996-01-03
EP0690487B1 (de) 2002-02-06
JPH08167664A (ja) 1996-06-25
DE69525288T2 (de) 2002-09-12
DE69525288D1 (de) 2002-03-21

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