ATE253799T1 - Programmierbare steuerung von videoformat - Google Patents

Programmierbare steuerung von videoformat

Info

Publication number
ATE253799T1
ATE253799T1 AT99951413T AT99951413T ATE253799T1 AT E253799 T1 ATE253799 T1 AT E253799T1 AT 99951413 T AT99951413 T AT 99951413T AT 99951413 T AT99951413 T AT 99951413T AT E253799 T1 ATE253799 T1 AT E253799T1
Authority
AT
Austria
Prior art keywords
rgb
video controller
video format
programmable control
video
Prior art date
Application number
AT99951413T
Other languages
English (en)
Inventor
Paul Gryskiewicz
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE253799T1 publication Critical patent/ATE253799T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/641—Multi-purpose receivers, e.g. for auxiliary information
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
    • G09G2340/125—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels wherein one of the images is motion video
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Television Receiver Circuits (AREA)
  • Studio Circuits (AREA)
  • Television Systems (AREA)
AT99951413T 1998-11-13 1999-09-09 Programmierbare steuerung von videoformat ATE253799T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/191,764 US6839093B1 (en) 1998-11-13 1998-11-13 Programmably controlling video formats
PCT/US1999/020622 WO2000030363A1 (en) 1998-11-13 1999-09-09 Programmably controlling video formats

Publications (1)

Publication Number Publication Date
ATE253799T1 true ATE253799T1 (de) 2003-11-15

Family

ID=22706847

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99951413T ATE253799T1 (de) 1998-11-13 1999-09-09 Programmierbare steuerung von videoformat

Country Status (9)

Country Link
US (2) US6839093B1 (de)
EP (1) EP1129581B1 (de)
JP (2) JP3803031B2 (de)
CN (1) CN1294765C (de)
AT (1) ATE253799T1 (de)
AU (1) AU6385599A (de)
DE (1) DE69912632T2 (de)
TW (1) TW451593B (de)
WO (1) WO2000030363A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6839093B1 (en) * 1998-11-13 2005-01-04 Intel Corporation Programmably controlling video formats
JP4491164B2 (ja) 2001-03-29 2010-06-30 株式会社日立製作所 映像信号送信機器及び映像信号受信機器
US7034887B2 (en) * 2002-07-15 2006-04-25 Seiko Epson Corporation Method and apparatus for flicker filtering interlaced display data
US7176878B2 (en) 2002-12-11 2007-02-13 Nvidia Corporation Backlight dimming and LCD amplitude boost
JP2007286082A (ja) * 2006-04-12 2007-11-01 Sony Computer Entertainment Inc 描画処理装置
US20080266459A1 (en) * 2007-04-26 2008-10-30 Mark Butterworth Multiple format video display
CN102349289B (zh) * 2009-03-11 2015-04-22 惠普开发有限公司 视频信号的色空间匹配
JP4969629B2 (ja) * 2009-10-02 2012-07-04 株式会社日立製作所 映像送信装置及び映像送信方法
JP4502076B2 (ja) * 2009-12-28 2010-07-14 株式会社日立製作所 映像信号送受信システム及び映像信号送受信方法
JP2010166601A (ja) * 2010-03-12 2010-07-29 Hitachi Ltd 映像信号送信機器及び映像信号受信機器

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4460918A (en) * 1982-07-14 1984-07-17 Zenith Electronics Corporation Automatic switching circuit for a dual mode television receiver
JPS6166493A (ja) 1984-09-10 1986-04-05 Hitachi Ltd 映像信号と文字図形信号の重畳表示装置
US4660073A (en) * 1984-12-18 1987-04-21 Eastman Kodak Company Video apparatus for selectively processing either composite or component color video signals
US4743958A (en) * 1986-10-06 1988-05-10 The Grass Valley Group, Inc. Multiple television standards input selector and convertor
JPH0715013Y2 (ja) * 1987-06-25 1995-04-10 三菱電機株式会社 カラ−デイスプレイ装置
JPH01156675U (de) * 1988-04-19 1989-10-27
AU618411B2 (en) * 1988-10-13 1991-12-19 Sony Corporation Flicker reduction apparatus
EP0404393A3 (de) 1989-06-19 1992-03-04 International Business Machines Corporation Videodigitalisierungs-/Anzeigeadapter
US5229852A (en) 1989-12-05 1993-07-20 Rasterops Corporation Real time video converter providing special effects
NL9000130A (nl) * 1990-01-19 1990-05-01 Philips Nv Videosysteem.
JP2842913B2 (ja) 1990-01-24 1999-01-06 株式会社日立製作所 ワイドテレビジョン信号処理回路
IT1259343B (it) 1992-03-17 1996-03-12 Sip Circuito di controllo video per applicazioni multimediali
JPH0898208A (ja) * 1994-09-27 1996-04-12 Aqueous Res:Kk 画像圧縮装置
EP0710016A3 (de) 1994-10-31 1997-06-11 Texas Instruments Inc Fernsehempfänger für Rundfunksignale mit verschiedenen Anzeigeformaten
US5796442A (en) 1994-11-02 1998-08-18 Texas Instruments Incorporated Multi-format television reciever
JP3033462B2 (ja) * 1995-02-15 2000-04-17 日本ビクター株式会社 ディスプレイ装置
JPH08314673A (ja) * 1995-05-23 1996-11-29 Fujitsu Ltd 画面合成制御装置
JP2951871B2 (ja) * 1995-07-11 1999-09-20 富士通株式会社 表示データ出力装置及び情報処理装置及び表示データ出力方法
JP4093599B2 (ja) * 1995-08-22 2008-06-04 ソニー株式会社 画像処理装置および方法
JP3417161B2 (ja) * 1995-09-29 2003-06-16 松下電器産業株式会社 デジタル放送受信機用オンスクリーン合成装置
JP3460428B2 (ja) * 1996-02-14 2003-10-27 松下電器産業株式会社 デジタル放送受信機用オンスクリーン合成装置
JPH09289645A (ja) * 1996-04-23 1997-11-04 Hitachi Ltd 撮像装置
TW376642B (en) 1996-05-07 1999-12-11 Matsushita Electric Industrial Co Ltd Video signal processing apparatus
US5790096A (en) 1996-09-03 1998-08-04 Allus Technology Corporation Automated flat panel display control system for accomodating broad range of video types and formats
US6839093B1 (en) * 1998-11-13 2005-01-04 Intel Corporation Programmably controlling video formats

Also Published As

Publication number Publication date
AU6385599A (en) 2000-06-05
CN1294765C (zh) 2007-01-10
JP4791202B2 (ja) 2011-10-12
US20050128352A1 (en) 2005-06-16
EP1129581A1 (de) 2001-09-05
JP2002530708A (ja) 2002-09-17
DE69912632D1 (de) 2003-12-11
EP1129581B1 (de) 2003-11-05
JP2006203918A (ja) 2006-08-03
CN1326642A (zh) 2001-12-12
TW451593B (en) 2001-08-21
US6839093B1 (en) 2005-01-04
WO2000030363A1 (en) 2000-05-25
JP3803031B2 (ja) 2006-08-02
US7372505B2 (en) 2008-05-13
DE69912632T2 (de) 2004-07-29

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties