ATE288104T1 - Schnittstelle von synchron zu asynchron zu synchron - Google Patents

Schnittstelle von synchron zu asynchron zu synchron

Info

Publication number
ATE288104T1
ATE288104T1 AT02700456T AT02700456T ATE288104T1 AT E288104 T1 ATE288104 T1 AT E288104T1 AT 02700456 T AT02700456 T AT 02700456T AT 02700456 T AT02700456 T AT 02700456T AT E288104 T1 ATE288104 T1 AT E288104T1
Authority
AT
Austria
Prior art keywords
synchronous
asynchronous
data transfer
stages
stage
Prior art date
Application number
AT02700456T
Other languages
English (en)
Inventor
Stanley Schuster
Peter Cook
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE288104T1 publication Critical patent/ATE288104T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3871—Asynchronous instruction pipeline, e.g. using handshake signals between stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Logic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
AT02700456T 2001-02-27 2002-02-20 Schnittstelle von synchron zu asynchron zu synchron ATE288104T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/794,467 US6848060B2 (en) 2001-02-27 2001-02-27 Synchronous to asynchronous to synchronous interface
PCT/GB2002/000752 WO2002069164A2 (en) 2001-02-27 2002-02-20 Synchronous to asynchronous to synchronous interface

Publications (1)

Publication Number Publication Date
ATE288104T1 true ATE288104T1 (de) 2005-02-15

Family

ID=25162698

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02700456T ATE288104T1 (de) 2001-02-27 2002-02-20 Schnittstelle von synchron zu asynchron zu synchron

Country Status (11)

Country Link
US (1) US6848060B2 (de)
EP (1) EP1366413B1 (de)
JP (1) JP3777160B2 (de)
KR (1) KR20030084923A (de)
CN (1) CN1270231C (de)
AT (1) ATE288104T1 (de)
AU (1) AU2002233528A1 (de)
CA (1) CA2436410A1 (de)
DE (1) DE60202749T2 (de)
TW (1) TW550473B (de)
WO (1) WO2002069164A2 (de)

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US7260753B2 (en) * 2003-07-14 2007-08-21 Fulcrum Microsystems, Inc. Methods and apparatus for providing test access to asynchronous circuits and systems
US7047468B2 (en) * 2003-09-25 2006-05-16 International Business Machines Corporation Method and apparatus for low overhead circuit scan
JP2007528550A (ja) * 2004-03-10 2007-10-11 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 電子回路
US20070260857A1 (en) * 2004-03-10 2007-11-08 Koninklijke Philips Electronics, N.V. Electronic Circuit
US7076682B2 (en) * 2004-05-04 2006-07-11 International Business Machines Corp. Synchronous pipeline with normally transparent pipeline stages
US20060041693A1 (en) * 2004-05-27 2006-02-23 Stmicroelectronics S.R.L. Asynchronous decoupler
US7676649B2 (en) * 2004-10-01 2010-03-09 Lockheed Martin Corporation Computing machine with redundancy and related systems and methods
US8055821B2 (en) * 2004-11-17 2011-11-08 International Business Machines Corporation Apparatus, system, and method for converting a synchronous interface into an asynchronous interface
JP4676888B2 (ja) * 2005-01-25 2011-04-27 パナソニック株式会社 データ処理装置
US7724027B2 (en) * 2005-03-31 2010-05-25 Rozas Guillermo J Method and system for elastic signal pipelining
US7639764B2 (en) * 2005-08-17 2009-12-29 Atmel Corporation Method and apparatus for synchronizing data between different clock domains in a memory controller
JP5354427B2 (ja) 2006-06-28 2013-11-27 アクロニクス セミコンダクター コーポレイション 集積回路のための再構成可能論理ファブリックおよび再構成可能論理ファブリックを構成するためのシステムおよび方法
US7899983B2 (en) 2007-08-31 2011-03-01 International Business Machines Corporation Buffered memory module supporting double the memory device data width in the same physical space as a conventional memory module
US7584308B2 (en) * 2007-08-31 2009-09-01 International Business Machines Corporation System for supporting partial cache line write operations to a memory module to reduce write data traffic on a memory channel
US7865674B2 (en) * 2007-08-31 2011-01-04 International Business Machines Corporation System for enhancing the memory bandwidth available through a memory module
US7840748B2 (en) * 2007-08-31 2010-11-23 International Business Machines Corporation Buffered memory module with multiple memory device data interface ports supporting double the memory capacity
US8086936B2 (en) * 2007-08-31 2011-12-27 International Business Machines Corporation Performing error correction at a memory device level that is transparent to a memory channel
US7818497B2 (en) * 2007-08-31 2010-10-19 International Business Machines Corporation Buffered memory module supporting two independent memory channels
US8082482B2 (en) * 2007-08-31 2011-12-20 International Business Machines Corporation System for performing error correction operations in a memory hub device of a memory module
US7861014B2 (en) * 2007-08-31 2010-12-28 International Business Machines Corporation System for supporting partial cache line read operations to a memory module to reduce read data traffic on a memory channel
US8019919B2 (en) * 2007-09-05 2011-09-13 International Business Machines Corporation Method for enhancing the memory bandwidth available through a memory module
US7558887B2 (en) * 2007-09-05 2009-07-07 International Business Machines Corporation Method for supporting partial cache line read and write operations to a memory module to reduce read and write data traffic on a memory channel
US8065647B2 (en) * 2007-10-19 2011-11-22 The University Of Utah Research Foundation Method and system for asynchronous chip design
US8527797B2 (en) 2007-12-26 2013-09-03 Qualcomm Incorporated System and method of leakage control in an asynchronous system
US7770077B2 (en) * 2008-01-24 2010-08-03 International Business Machines Corporation Using cache that is embedded in a memory hub to replace failed memory cells in a memory subsystem
US7925824B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to reduce latency by running a memory channel frequency fully asynchronous from a memory device frequency
US7930469B2 (en) 2008-01-24 2011-04-19 International Business Machines Corporation System to provide memory system power reduction without reducing overall memory system performance
US8140936B2 (en) * 2008-01-24 2012-03-20 International Business Machines Corporation System for a combined error correction code and cyclic redundancy check code for a memory channel
US7930470B2 (en) * 2008-01-24 2011-04-19 International Business Machines Corporation System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller
US7925825B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to support a full asynchronous interface within a memory hub device
US7925826B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to increase the overall bandwidth of a memory channel by allowing the memory channel to operate at a frequency independent from a memory device frequency
TWI407744B (zh) * 2008-02-04 2013-09-01 Realtek Semiconductor Corp 網路信號處理裝置
DE102009000698A1 (de) * 2009-02-06 2010-08-12 Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik Prüfschaltung zur Prüfung einer Durchführung eines Handshake-Protokolls und Verfahren zur Prüfung einer Durchführung eines Handshake-Protokolls
US7900078B1 (en) * 2009-09-14 2011-03-01 Achronix Semiconductor Corporation Asynchronous conversion circuitry apparatus, systems, and methods
US8928386B1 (en) * 2013-03-12 2015-01-06 Xilinx, Inc. Circuits for and methods of asychronously transmitting data in an integrated circuit
US10289186B1 (en) * 2013-10-31 2019-05-14 Maxim Integrated Products, Inc. Systems and methods to improve energy efficiency using adaptive mode switching
US9594395B2 (en) * 2014-01-21 2017-03-14 Apple Inc. Clock routing techniques
US20150341032A1 (en) * 2014-05-23 2015-11-26 Advanced Micro Devices, Inc. Locally asynchronous logic circuit and method therefor
CN108694146B (zh) * 2017-04-11 2021-03-12 华大恒芯科技有限公司 一种异步/同步接口电路
US11960898B2 (en) 2020-12-18 2024-04-16 Red Hat, Inc. Enabling asynchronous operations in synchronous processors
US20230169226A1 (en) * 2021-11-30 2023-06-01 Xilinx, Inc. Method and system for interfacing a testbench to circuit simulation
CN115048889B (zh) * 2022-08-16 2022-11-01 井芯微电子技术(天津)有限公司 基于后端时序收敛仿真的异步路径提取方法及系统
US12135668B2 (en) * 2022-11-16 2024-11-05 Stmicroelectronics S.R.L. Asynchronous controller for processing unit

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US4837740A (en) 1985-01-04 1989-06-06 Sutherland Ivan F Asynchronous first-in-first-out register structure
US5187800A (en) 1985-01-04 1993-02-16 Sun Microsystems, Inc. Asynchronous pipelined data processing system
GB9114513D0 (en) * 1991-07-04 1991-08-21 Univ Manchester Condition detection in asynchronous pipelines
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US6393579B1 (en) * 1999-12-21 2002-05-21 Intel Corporation Method and apparatus for saving power and improving performance in a collapsable pipeline using gated clocks
US6611920B1 (en) * 2000-01-21 2003-08-26 Intel Corporation Clock distribution system for selectively enabling clock signals to portions of a pipelined circuit

Also Published As

Publication number Publication date
DE60202749D1 (de) 2005-03-03
EP1366413A2 (de) 2003-12-03
KR20030084923A (ko) 2003-11-01
AU2002233528A1 (en) 2002-09-12
CA2436410A1 (en) 2002-09-06
US6848060B2 (en) 2005-01-25
WO2002069164A3 (en) 2002-11-21
CN1270231C (zh) 2006-08-16
DE60202749T2 (de) 2005-12-29
JP2004526241A (ja) 2004-08-26
JP3777160B2 (ja) 2006-05-24
EP1366413B1 (de) 2005-01-26
US20020120883A1 (en) 2002-08-29
WO2002069164A2 (en) 2002-09-06
TW550473B (en) 2003-09-01
CN1514968A (zh) 2004-07-21

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