ATE304747T1 - Eingangsschaltung für einen multiplexer mit einem dll phasendetector - Google Patents

Eingangsschaltung für einen multiplexer mit einem dll phasendetector

Info

Publication number
ATE304747T1
ATE304747T1 AT02360209T AT02360209T ATE304747T1 AT E304747 T1 ATE304747 T1 AT E304747T1 AT 02360209 T AT02360209 T AT 02360209T AT 02360209 T AT02360209 T AT 02360209T AT E304747 T1 ATE304747 T1 AT E304747T1
Authority
AT
Austria
Prior art keywords
flop
flip
multiplexer
signal
input circuit
Prior art date
Application number
AT02360209T
Other languages
English (en)
Inventor
Berthold Wedding
Original Assignee
Cit Alcatel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cit Alcatel filed Critical Cit Alcatel
Application granted granted Critical
Publication of ATE304747T1 publication Critical patent/ATE304747T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/04Distributors combined with modulators or demodulators
    • H04J3/047Distributors with transistors or integrated circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033Correction by delay
    • H04L7/0037Delay of clock signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Pulse Circuits (AREA)
AT02360209T 2002-07-12 2002-07-12 Eingangsschaltung für einen multiplexer mit einem dll phasendetector ATE304747T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02360209A EP1381153B1 (de) 2002-07-12 2002-07-12 Eingangsschaltung für einen Multiplexer mit einem DLL Phasendetector

Publications (1)

Publication Number Publication Date
ATE304747T1 true ATE304747T1 (de) 2005-09-15

Family

ID=29724586

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02360209T ATE304747T1 (de) 2002-07-12 2002-07-12 Eingangsschaltung für einen multiplexer mit einem dll phasendetector

Country Status (5)

Country Link
US (1) US20040008733A1 (de)
EP (1) EP1381153B1 (de)
CN (1) CN1472886A (de)
AT (1) ATE304747T1 (de)
DE (1) DE60206150T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3938917B2 (ja) * 2003-11-12 2007-06-27 沖電気工業株式会社 半導体集積回路装置
JP4271623B2 (ja) * 2004-06-17 2009-06-03 富士通株式会社 クロック調整装置および方法
US9859874B2 (en) 2015-10-30 2018-01-02 Sandisk Technologies Llc Loop delay optimization for multi-voltage self-synchronous systems
US10366383B2 (en) * 2016-03-31 2019-07-30 Square, Inc. Combined reliable and unreliable data transmission

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3805180A (en) * 1972-12-27 1974-04-16 A Widmer Binary-coded signal timing recovery circuit
JPH04260239A (ja) * 1991-02-15 1992-09-16 Nec Corp タイミング抽出回路
US5272390A (en) * 1991-09-23 1993-12-21 Digital Equipment Corporation Method and apparatus for clock skew reduction through absolute delay regulation
US5457718A (en) * 1992-03-02 1995-10-10 International Business Machines Corporation Compact phase recovery scheme using digital circuits
DE4229148A1 (de) * 1992-09-01 1994-03-03 Sel Alcatel Ag Digitaler Phasenkomparator und Phasenregelkreis
JPH06152556A (ja) * 1992-10-30 1994-05-31 Ando Electric Co Ltd データ多重回路
US5799048A (en) * 1996-04-17 1998-08-25 Sun Microsystems, Inc. Phase detector for clock synchronization and recovery
US6125157A (en) * 1997-02-06 2000-09-26 Rambus, Inc. Delay-locked loop circuitry for clock delay adjustment
GB2333916B (en) * 1998-01-09 2001-08-01 Plessey Semiconductors Ltd A phase detector
US20020085656A1 (en) * 2000-08-30 2002-07-04 Lee Sang-Hyun Data recovery using data eye tracking
US6759881B2 (en) * 2002-03-22 2004-07-06 Rambus Inc. System with phase jumping locked loop circuit

Also Published As

Publication number Publication date
DE60206150T2 (de) 2006-01-26
US20040008733A1 (en) 2004-01-15
EP1381153A1 (de) 2004-01-14
CN1472886A (zh) 2004-02-04
DE60206150D1 (de) 2005-10-20
EP1381153B1 (de) 2005-09-14

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Legal Events

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