ATE326768T1 - Verfahren zur herstellung von einem gatter- dielektrikum mit veränderlicher dielektrizitätskonstante - Google Patents

Verfahren zur herstellung von einem gatter- dielektrikum mit veränderlicher dielektrizitätskonstante

Info

Publication number
ATE326768T1
ATE326768T1 AT02368011T AT02368011T ATE326768T1 AT E326768 T1 ATE326768 T1 AT E326768T1 AT 02368011 T AT02368011 T AT 02368011T AT 02368011 T AT02368011 T AT 02368011T AT E326768 T1 ATE326768 T1 AT E326768T1
Authority
AT
Austria
Prior art keywords
dielectric layer
variable
producing
low
gate dielectric
Prior art date
Application number
AT02368011T
Other languages
English (en)
Inventor
Lap Chan
Elgin Quek
Ravi Sundaresan
Yang Pan
Meng Lee James Yong
Leung Ying Keung
Pradeep Ramachandramurthy
Zheng Jia Zhen
Original Assignee
Chartered Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chartered Semiconductor Mfg filed Critical Chartered Semiconductor Mfg
Application granted granted Critical
Publication of ATE326768T1 publication Critical patent/ATE326768T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Formation Of Insulating Films (AREA)
AT02368011T 2001-01-26 2002-01-25 Verfahren zur herstellung von einem gatter- dielektrikum mit veränderlicher dielektrizitätskonstante ATE326768T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/769,811 US6436774B1 (en) 2001-01-26 2001-01-26 Method for forming variable-K gate dielectric

Publications (1)

Publication Number Publication Date
ATE326768T1 true ATE326768T1 (de) 2006-06-15

Family

ID=25086569

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02368011T ATE326768T1 (de) 2001-01-26 2002-01-25 Verfahren zur herstellung von einem gatter- dielektrikum mit veränderlicher dielektrizitätskonstante

Country Status (7)

Country Link
US (2) US6436774B1 (de)
EP (1) EP1227513B1 (de)
JP (1) JP4255235B2 (de)
AT (1) ATE326768T1 (de)
DE (1) DE60211396T2 (de)
SG (2) SG137692A1 (de)
TW (1) TW510013B (de)

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JP2001291861A (ja) * 2000-04-05 2001-10-19 Nec Corp Ｍｏｓトランジスタ、トランジスタ製造方法
US6586791B1 (en) * 2000-07-19 2003-07-01 3M Innovative Properties Company Transistor insulator layer incorporating superfine ceramic particles
FR2849531A1 (fr) * 2002-12-27 2004-07-02 St Microelectronics Sa Procede de formation d'une region localisee d'un materiau difficilement gravable
US20050045961A1 (en) * 2003-08-29 2005-03-03 Barnak John P. Enhanced gate structure
US6885072B1 (en) * 2003-11-18 2005-04-26 Applied Intellectual Properties Co., Ltd. Nonvolatile memory with undercut trapping structure
KR100561998B1 (ko) * 2003-12-31 2006-03-22 동부아남반도체 주식회사 이미지 센서의 제조방법
US20050259467A1 (en) * 2004-05-18 2005-11-24 Micron Technology, Inc. Split gate flash memory cell with ballistic injection
US7196935B2 (en) * 2004-05-18 2007-03-27 Micron Technolnology, Inc. Ballistic injection NROM flash memory
US20060043462A1 (en) * 2004-08-27 2006-03-02 Micron Technology, Inc. Stepped gate configuration for non-volatile memory
DE102004044667A1 (de) * 2004-09-15 2006-03-16 Infineon Technologies Ag Halbleiterbauelement sowie zugehöriges Herstellungsverfahren
DE102005051417A1 (de) * 2005-10-27 2007-05-03 X-Fab Semiconductor Foundries Ag Simulations- bzw. Layoutverfahren für vertikale Leistungstransistoren mit variierbarer Kanalweite und variierbarer Gate-Drain-Kapazität
KR100707678B1 (ko) * 2005-12-29 2007-04-13 동부일렉트로닉스 주식회사 반도체 소자의 게이트 구조 및 그 제조 방법
DE102006035667B4 (de) * 2006-07-31 2010-10-21 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Verbessern der Lithographieeigenschaften während der Gateherstellung in Halbleitern mit einer ausgeprägten Oberflächentopographie
US8410554B2 (en) 2008-03-26 2013-04-02 International Business Machines Corporation Method, structure and design structure for customizing history effects of SOI circuits
US8420460B2 (en) * 2008-03-26 2013-04-16 International Business Machines Corporation Method, structure and design structure for customizing history effects of SOI circuits
JP4548521B2 (ja) 2008-07-09 2010-09-22 ソニー株式会社 半導体装置の製造方法及び半導体装置
US8629506B2 (en) * 2009-03-19 2014-01-14 International Business Machines Corporation Replacement gate CMOS
JP5616665B2 (ja) * 2010-03-30 2014-10-29 ローム株式会社 半導体装置
US9515164B2 (en) * 2014-03-06 2016-12-06 International Business Machines Corporation Methods and structure to form high K metal gate stack with single work-function metal
CN105655254B (zh) * 2014-11-13 2019-05-28 中芯国际集成电路制造(上海)有限公司 晶体管的形成方法
US9515158B1 (en) * 2015-10-20 2016-12-06 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure with insertion layer and method for manufacturing the same
EP3179514B1 (de) * 2015-12-11 2024-01-24 IMEC vzw Transistorvorrichtung mit einer reduzierten injektionswirkung von heissen ladungsträgern
US20180138307A1 (en) * 2016-11-17 2018-05-17 Globalfoundries Inc. Tunnel finfet with self-aligned gate
US10276679B2 (en) * 2017-05-30 2019-04-30 Vanguard International Semiconductor Corporation Semiconductor device and method for manufacturing the same
US11469307B2 (en) * 2020-09-29 2022-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device

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US5324683A (en) * 1993-06-02 1994-06-28 Motorola, Inc. Method of forming a semiconductor structure having an air region
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US6140691A (en) * 1997-12-19 2000-10-31 Advanced Micro Devices, Inc. Trench isolation structure having a low K dielectric material isolated from a silicon-based substrate
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JP4237332B2 (ja) * 1999-04-30 2009-03-11 株式会社東芝 半導体装置の製造方法
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Also Published As

Publication number Publication date
US6436774B1 (en) 2002-08-20
US20020100947A1 (en) 2002-08-01
SG137692A1 (en) 2007-12-28
SG108291A1 (en) 2005-01-28
DE60211396T2 (de) 2007-05-03
EP1227513A2 (de) 2002-07-31
EP1227513A3 (de) 2003-08-06
JP2002270835A (ja) 2002-09-20
US6709934B2 (en) 2004-03-23
US20020173106A1 (en) 2002-11-21
TW510013B (en) 2002-11-11
EP1227513B1 (de) 2006-05-17
JP4255235B2 (ja) 2009-04-15
DE60211396D1 (de) 2006-06-22

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