ATE339873T1 - Leiterplattensubstrat mit hoher dichte und herstellungsmethode - Google Patents

Leiterplattensubstrat mit hoher dichte und herstellungsmethode

Info

Publication number
ATE339873T1
ATE339873T1 AT99935896T AT99935896T ATE339873T1 AT E339873 T1 ATE339873 T1 AT E339873T1 AT 99935896 T AT99935896 T AT 99935896T AT 99935896 T AT99935896 T AT 99935896T AT E339873 T1 ATE339873 T1 AT E339873T1
Authority
AT
Austria
Prior art keywords
manufacturing
circuit board
high density
board substrate
density circuit
Prior art date
Application number
AT99935896T
Other languages
English (en)
Inventor
Richard J Pommer
Jeffrey T Gotro
Nancy M W Androff
Marc D Hein
Corey J Zarecki
Original Assignee
Isola Laminate Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Isola Laminate Systems Corp filed Critical Isola Laminate Systems Corp
Application granted granted Critical
Publication of ATE339873T1 publication Critical patent/ATE339873T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275—Fibers and reinforcement materials
    • H05K2201/029—Woven fibrous reinforcement or textile
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275—Fibers and reinforcement materials
    • H05K2201/0296—Fibers with a special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Battery Electrode And Active Subsutance (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
AT99935896T 1998-07-28 1999-07-22 Leiterplattensubstrat mit hoher dichte und herstellungsmethode ATE339873T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/123,952 US6242078B1 (en) 1998-07-28 1998-07-28 High density printed circuit substrate and method of fabrication

Publications (1)

Publication Number Publication Date
ATE339873T1 true ATE339873T1 (de) 2006-10-15

Family

ID=22411883

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99935896T ATE339873T1 (de) 1998-07-28 1999-07-22 Leiterplattensubstrat mit hoher dichte und herstellungsmethode

Country Status (11)

Country Link
US (1) US6242078B1 (de)
EP (1) EP1103168B1 (de)
JP (1) JP2002521835A (de)
KR (1) KR20010053614A (de)
CN (1) CN1314072A (de)
AT (1) ATE339873T1 (de)
AU (1) AU5127499A (de)
DE (1) DE69933225T2 (de)
ES (1) ES2274632T3 (de)
TW (1) TW507494B (de)
WO (1) WO2000007219A2 (de)

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KR100509058B1 (ko) * 2000-04-11 2005-08-18 엘지전자 주식회사 인쇄회로기판의 제조방법
JP4023076B2 (ja) * 2000-07-27 2007-12-19 富士通株式会社 表裏導通基板及びその製造方法
JP2002111185A (ja) * 2000-10-03 2002-04-12 Sony Chem Corp バンプ付き配線回路基板及びその製造方法
DE10109786A1 (de) * 2001-02-28 2002-12-12 Fractal Ag Verfahren zur Herstellung von Leiterplatten
TW560102B (en) * 2001-09-12 2003-11-01 Itn Energy Systems Inc Thin-film electrochemical devices on fibrous or ribbon-like substrates and methd for their manufacture and design
US7258819B2 (en) 2001-10-11 2007-08-21 Littelfuse, Inc. Voltage variable substrate material
WO2003088356A1 (en) * 2002-04-08 2003-10-23 Littelfuse, Inc. Voltage variable material for direct application and devices employing same
US7183891B2 (en) * 2002-04-08 2007-02-27 Littelfuse, Inc. Direct application voltage variable material, devices employing same and methods of manufacturing such devices
US7132922B2 (en) * 2002-04-08 2006-11-07 Littelfuse, Inc. Direct application voltage variable material, components thereof and devices employing same
US6596384B1 (en) * 2002-04-09 2003-07-22 International Business Machines Corporation Selectively roughening conductors for high frequency printed wiring boards
US7438969B2 (en) * 2002-07-10 2008-10-21 Ngk Spark Plug Co., Ltd. Filling material, multilayer wiring board, and process of producing multilayer wiring board
US7060364B2 (en) * 2002-12-26 2006-06-13 Mitsui Mining & Smelting Co., Ltd. Film carrier tape for mounting electronic devices thereon
US6960831B2 (en) * 2003-09-25 2005-11-01 International Business Machines Corporation Semiconductor device having a composite layer in addition to a barrier layer between copper wiring and aluminum bond pad
JP2005202382A (ja) * 2003-12-18 2005-07-28 Sumitomo Bakelite Co Ltd 光プリント回路基板、面実装型半導体パッケージ、及びマザーボード
US20060152334A1 (en) * 2005-01-10 2006-07-13 Nathaniel Maercklein Electrostatic discharge protection for embedded components
JP4520392B2 (ja) * 2005-05-12 2010-08-04 株式会社丸和製作所 プリント基板の製造方法
US8250751B2 (en) * 2007-02-20 2012-08-28 Ddi Global Corp. Method of manufacturing a printed circuit board
US20080318413A1 (en) * 2007-06-21 2008-12-25 General Electric Company Method for making an interconnect structure and interconnect component recovery process
EP2129199A1 (de) * 2008-05-28 2009-12-02 LG Electronics Inc. Verfahren zur Herstellung von flexibler Folie
DE102009028194B3 (de) * 2009-08-03 2011-03-24 Robert Bosch Gmbh Sensorelement mit Durchkontaktierloch
TWI405317B (zh) * 2010-03-04 2013-08-11 Unimicron Technology Corp 封裝基板及其製法
US8693203B2 (en) * 2011-01-14 2014-04-08 Harris Corporation Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices
JP6099453B2 (ja) * 2012-11-28 2017-03-22 Ｄｏｗａメタルテック株式会社 電子部品搭載基板およびその製造方法
TWI462672B (zh) * 2013-02-08 2014-11-21 Ichia Tech Inc 前驅基板、軟性印刷電路板及其製造方法
KR20170031187A (ko) * 2014-07-10 2017-03-20 아이솔라 유에스에이 코프 얇은 수지 필름들 및 레이업들에서의 그들의 사용
US10051746B2 (en) * 2014-12-16 2018-08-14 Amphenol Corporation High-speed interconnects for printed circuit boards
JP7449921B2 (ja) * 2019-03-27 2024-03-14 三井金属鉱業株式会社 プリント配線板用金属箔、キャリア付金属箔及び金属張積層板、並びにそれらを用いたプリント配線板の製造方法
AT523450B1 (de) * 2020-01-27 2025-04-15 Univ Linz Durchdringbares Element
CN112020232B (zh) * 2020-08-27 2021-12-28 湖南维胜科技电路板有限公司 一种pcb印制电路板的uv烘烤炉
JP7578071B2 (ja) * 2021-06-08 2024-11-06 新光電気工業株式会社 配線基板及びその製造方法

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Also Published As

Publication number Publication date
DE69933225T2 (de) 2007-09-20
WO2000007219A3 (en) 2000-05-11
AU5127499A (en) 2000-02-21
JP2002521835A (ja) 2002-07-16
WO2000007219A2 (en) 2000-02-10
EP1103168A2 (de) 2001-05-30
CN1314072A (zh) 2001-09-19
ES2274632T3 (es) 2007-05-16
TW507494B (en) 2002-10-21
US6242078B1 (en) 2001-06-05
DE69933225D1 (de) 2006-10-26
KR20010053614A (ko) 2001-06-25
EP1103168B1 (de) 2006-09-13

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