ATE353269T1 - Verfahren zur epiready-oberflächen-behandlung auf sic-dünnschichten - Google Patents

Verfahren zur epiready-oberflächen-behandlung auf sic-dünnschichten

Info

Publication number
ATE353269T1
ATE353269T1 AT04767750T AT04767750T ATE353269T1 AT E353269 T1 ATE353269 T1 AT E353269T1 AT 04767750 T AT04767750 T AT 04767750T AT 04767750 T AT04767750 T AT 04767750T AT E353269 T1 ATE353269 T1 AT E353269T1
Authority
AT
Austria
Prior art keywords
surface treatment
thin layers
sic thin
epiready
epiready surface
Prior art date
Application number
AT04767750T
Other languages
English (en)
Inventor
Claire Richtarch
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Application granted granted Critical
Publication of ATE353269T1 publication Critical patent/ATE353269T1/de

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/10—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/129—Preparing bulk and homogeneous wafers by polishing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2904—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2924—Structures
    • H10P14/2925—Surface structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/931—Silicon carbide semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Surface Treatment Of Glass (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
AT04767750T 2003-07-23 2004-07-22 Verfahren zur epiready-oberflächen-behandlung auf sic-dünnschichten ATE353269T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0308969A FR2857895B1 (fr) 2003-07-23 2003-07-23 Procede de preparation de surface epiready sur films minces de sic

Publications (1)

Publication Number Publication Date
ATE353269T1 true ATE353269T1 (de) 2007-02-15

Family

ID=33561010

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04767750T ATE353269T1 (de) 2003-07-23 2004-07-22 Verfahren zur epiready-oberflächen-behandlung auf sic-dünnschichten

Country Status (9)

Country Link
US (1) US7060620B2 (de)
EP (1) EP1646478B9 (de)
JP (1) JP4414433B2 (de)
KR (1) KR100792057B1 (de)
CN (1) CN100496893C (de)
AT (1) ATE353269T1 (de)
DE (1) DE602004004658T4 (de)
FR (1) FR2857895B1 (de)
WO (1) WO2005009684A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3881562B2 (ja) * 2002-02-22 2007-02-14 三井造船株式会社 ＳｉＣモニタウェハ製造方法
WO2005099388A2 (en) * 2004-04-08 2005-10-27 Ii-Vi Incorporated Chemical-mechanical polishing of sic surfaces using hydrogen peroixde or ozonated water solutions in combination with colloidal abrasive
WO2006047611A2 (en) * 2004-10-26 2006-05-04 Jayant Neogi Apparatus and method for polishing gemstones and the like
FR2884647B1 (fr) * 2005-04-15 2008-02-22 Soitec Silicon On Insulator Traitement de plaques de semi-conducteurs
US7528040B2 (en) * 2005-05-24 2009-05-05 Cree, Inc. Methods of fabricating silicon carbide devices having smooth channels
DE102005024073A1 (de) * 2005-05-25 2006-11-30 Siltronic Ag Halbleiter-Schichtstruktur und Verfahren zur Herstellung einer Halbleiter-Schichtstruktur
JP5277722B2 (ja) * 2008-05-21 2013-08-28 新日鐵住金株式会社 炭化珪素単結晶ウェハ表面の研磨方法
EP2172967A1 (de) 2008-08-04 2010-04-07 Siltronic AG Verfahren zur Herstellung von Siliciumcarbid
FR2954585B1 (fr) * 2009-12-23 2012-03-02 Soitec Silicon Insulator Technologies Procede de realisation d'une heterostructure avec minimisation de contrainte
JP5772635B2 (ja) * 2012-02-02 2015-09-02 三菱電機株式会社 炭化珪素単結晶基板の製造方法
JP5990444B2 (ja) * 2012-11-01 2016-09-14 昭和電工株式会社 炭化珪素半導体装置の製造方法
ES2869275T3 (es) 2015-04-24 2021-10-25 Int Flavors & Fragrances Inc Sistemas de suministro y procedimientos de preparación del mismo
CN116764558A (zh) 2016-09-16 2023-09-19 国际香料和香精公司 用粘度控制剂稳定的微胶囊组合物
EP4323099A1 (de) 2021-04-16 2024-02-21 International Flavors & Fragrances Inc. Hydrogelverkapselungen und verfahren zur herstellung davon
EP4561360A1 (de) 2022-07-26 2025-06-04 International Flavors & Fragrances Inc. Robuste geschmacksemulsionen

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5895583A (en) * 1996-11-20 1999-04-20 Northrop Grumman Corporation Method of preparing silicon carbide wafers for epitaxial growth
FR2761629B1 (fr) * 1997-04-07 1999-06-18 Hoechst France Nouveau procede de polissage mecano-chimique de couches de materiaux semi-conducteurs a base de polysilicium ou d'oxyde de silicium dope
US5877070A (en) * 1997-05-31 1999-03-02 Max-Planck Society Method for the transfer of thin layers of monocrystalline material to a desirable substrate
JP3085272B2 (ja) * 1997-12-19 2000-09-04 富士電機株式会社 炭化けい素半導体装置の熱酸化膜形成方法
JP3762144B2 (ja) * 1998-06-18 2006-04-05 キヤノン株式会社 Ｓｏｉ基板の作製方法
JP3975047B2 (ja) * 2000-04-21 2007-09-12 泰弘 谷 研磨方法
EP1303866B1 (de) * 2000-07-10 2009-12-09 TEL Epion Inc. Vorrichtung und verfahren zur verbesserung von dünnschichten mittels gas-cluster-ionenstrahlbearbeitung
JP3881562B2 (ja) * 2002-02-22 2007-02-14 三井造船株式会社 ＳｉＣモニタウェハ製造方法
FR2843061B1 (fr) 2002-08-02 2004-09-24 Soitec Silicon On Insulator Procede de polissage de tranche de materiau

Also Published As

Publication number Publication date
DE602004004658T2 (de) 2007-11-22
KR20060033806A (ko) 2006-04-19
DE602004004658D1 (de) 2007-03-22
JP2006528423A (ja) 2006-12-14
FR2857895B1 (fr) 2007-01-26
CN1826210A (zh) 2006-08-30
KR100792057B1 (ko) 2008-01-04
FR2857895A1 (fr) 2005-01-28
EP1646478B9 (de) 2008-07-16
JP4414433B2 (ja) 2010-02-10
EP1646478A1 (de) 2006-04-19
DE602004004658T4 (de) 2008-08-21
US20050020084A1 (en) 2005-01-27
EP1646478B1 (de) 2007-02-07
CN100496893C (zh) 2009-06-10
WO2005009684A1 (fr) 2005-02-03
US7060620B2 (en) 2006-06-13

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