ATE373318T1 - Integration bipolarer und cmos bauelemente für 0.1 mikrometer transistoren - Google Patents

Integration bipolarer und cmos bauelemente für 0.1 mikrometer transistoren

Info

Publication number
ATE373318T1
ATE373318T1 AT99480058T AT99480058T ATE373318T1 AT E373318 T1 ATE373318 T1 AT E373318T1 AT 99480058 T AT99480058 T AT 99480058T AT 99480058 T AT99480058 T AT 99480058T AT E373318 T1 ATE373318 T1 AT E373318T1
Authority
AT
Austria
Prior art keywords
emitter
substrate
mask
oxide layer
polysilicon layer
Prior art date
Application number
AT99480058T
Other languages
English (en)
Inventor
Yang Pan
Erzhuang Liu
Original Assignee
Chartered Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chartered Semiconductor Mfg filed Critical Chartered Semiconductor Mfg
Application granted granted Critical
Publication of ATE373318T1 publication Critical patent/ATE373318T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
AT99480058T 1999-02-18 1999-07-09 Integration bipolarer und cmos bauelemente für 0.1 mikrometer transistoren ATE373318T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/252,626 US6284581B1 (en) 1999-02-18 1999-02-18 Integration of bipolar and CMOS devices for sub-0.1 micrometer transistors

Publications (1)

Publication Number Publication Date
ATE373318T1 true ATE373318T1 (de) 2007-09-15

Family

ID=22956834

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99480058T ATE373318T1 (de) 1999-02-18 1999-07-09 Integration bipolarer und cmos bauelemente für 0.1 mikrometer transistoren

Country Status (6)

Country Link
US (2) US6284581B1 (de)
EP (1) EP1030363B1 (de)
JP (1) JP2000243859A (de)
AT (1) ATE373318T1 (de)
DE (1) DE69937098T2 (de)
SG (1) SG87811A1 (de)

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US6730610B1 (en) * 2002-12-20 2004-05-04 Taiwan Semiconductor Manufacturing Co., Ltd Multiple thickness hard mask method for optimizing laterally adjacent patterned layer linewidths
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KR100596880B1 (ko) * 2004-09-01 2006-07-05 동부일렉트로닉스 주식회사 반도체 소자의 게이트 형성 방법
DE102007034801B4 (de) * 2007-03-26 2010-10-28 X-Fab Semiconductor Foundries Ag BiMOS-Halbleiterbauelement mit Herstellverfahren mit Bipolarintegration ohne zusätzliche Maskenschritte
US9520486B2 (en) 2009-11-04 2016-12-13 Analog Devices, Inc. Electrostatic protection device
CN102376775B (zh) * 2010-08-26 2014-04-16 上海华虹宏力半导体制造有限公司 BiCMOS工艺中的寄生PIN器件及制造方法
CN102386183B (zh) * 2010-08-31 2014-04-16 上海华虹宏力半导体制造有限公司 BiCMOS工艺中的寄生PIN器件组合结构及制造方法
US10199482B2 (en) * 2010-11-29 2019-02-05 Analog Devices, Inc. Apparatus for electrostatic discharge protection
US8709894B2 (en) * 2011-09-16 2014-04-29 Micron Technology, Inc. 3D structured memory devices and methods for manufacturing thereof
US9087917B2 (en) 2013-09-10 2015-07-21 Texas Instruments Incorporated Inner L-spacer for replacement gate flow
CN105336681B (zh) * 2014-07-28 2018-05-04 中芯国际集成电路制造(上海)有限公司 半导体器件的制作方法及半导体器件
US9484739B2 (en) 2014-09-25 2016-11-01 Analog Devices Global Overvoltage protection device and method
US10181719B2 (en) 2015-03-16 2019-01-15 Analog Devices Global Overvoltage blocking protection device
CN108346659B (zh) * 2017-01-23 2021-02-23 中芯国际集成电路制造(上海)有限公司 一种可编程存储单元及电子装置
GB2561388B (en) * 2017-04-13 2019-11-06 Raytheon Systems Ltd Silicon carbide integrated circuit
US10319716B2 (en) * 2017-05-05 2019-06-11 Newport Fab, Llc Substrate isolation for low-loss radio frequency (RF) circuits
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KR102845847B1 (ko) 2019-09-20 2025-08-14 삼성전자주식회사 반도체 장치

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Also Published As

Publication number Publication date
EP1030363A2 (de) 2000-08-23
DE69937098D1 (de) 2007-10-25
EP1030363B1 (de) 2007-09-12
US6649982B2 (en) 2003-11-18
DE69937098T2 (de) 2008-06-19
EP1030363A3 (de) 2004-06-16
SG87811A1 (en) 2002-04-16
US6284581B1 (en) 2001-09-04
JP2000243859A (ja) 2000-09-08
US20010031521A1 (en) 2001-10-18

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