ATE400843T1 - Integrierte schaltung mit einem echten zufallszahlengenerator - Google Patents

Integrierte schaltung mit einem echten zufallszahlengenerator

Info

Publication number
ATE400843T1
ATE400843T1 AT05789809T AT05789809T ATE400843T1 AT E400843 T1 ATE400843 T1 AT E400843T1 AT 05789809 T AT05789809 T AT 05789809T AT 05789809 T AT05789809 T AT 05789809T AT E400843 T1 ATE400843 T1 AT E400843T1
Authority
AT
Austria
Prior art keywords
true random
random number
number generator
integrated circuit
devices
Prior art date
Application number
AT05789809T
Other languages
English (en)
Inventor
Ernst Haselsteiner
Pim Tuyls
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE400843T1 publication Critical patent/ATE400843T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • G06F7/588Random number generators, i.e. based on natural stochastic processes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0866Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Credit Cards Or The Like (AREA)
  • Slot Machines And Peripheral Devices (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT05789809T 2004-10-15 2005-10-10 Integrierte schaltung mit einem echten zufallszahlengenerator ATE400843T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04105081 2004-10-15

Publications (1)

Publication Number Publication Date
ATE400843T1 true ATE400843T1 (de) 2008-07-15

Family

ID=35470299

Family Applications (2)

Application Number Title Priority Date Filing Date
AT05789809T ATE400843T1 (de) 2004-10-15 2005-10-10 Integrierte schaltung mit einem echten zufallszahlengenerator
AT07121330T ATE483197T1 (de) 2004-10-15 2005-10-10 Integrierte schaltung mit einem echten zufallszahlengenerator

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT07121330T ATE483197T1 (de) 2004-10-15 2005-10-10 Integrierte schaltung mit einem echten zufallszahlengenerator

Country Status (7)

Country Link
US (1) US20090132624A1 (de)
EP (3) EP1887460A3 (de)
JP (1) JP2008517365A (de)
CN (1) CN101076775A (de)
AT (2) ATE400843T1 (de)
DE (2) DE602005008088D1 (de)
WO (1) WO2006040724A1 (de)

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Also Published As

Publication number Publication date
CN101076775A (zh) 2007-11-21
JP2008517365A (ja) 2008-05-22
EP1887459A2 (de) 2008-02-13
EP1887460A3 (de) 2008-06-04
DE602005008088D1 (de) 2008-08-21
ATE483197T1 (de) 2010-10-15
EP1803060A1 (de) 2007-07-04
DE602005023910D1 (de) 2010-11-11
WO2006040724A1 (en) 2006-04-20
US20090132624A1 (en) 2009-05-21
EP1887459B1 (de) 2010-09-29
EP1887459A3 (de) 2008-06-04
EP1887460A2 (de) 2008-02-13
EP1803060B1 (de) 2008-07-09

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