ATE403314T1 - Integrierte schaltung und verfahren zur zeitschlitz-zuteilung - Google Patents

Integrierte schaltung und verfahren zur zeitschlitz-zuteilung

Info

Publication number
ATE403314T1
ATE403314T1 AT05709078T AT05709078T ATE403314T1 AT E403314 T1 ATE403314 T1 AT E403314T1 AT 05709078 T AT05709078 T AT 05709078T AT 05709078 T AT05709078 T AT 05709078T AT E403314 T1 ATE403314 T1 AT E403314T1
Authority
AT
Austria
Prior art keywords
network
link
connection path
integrated circuit
connection
Prior art date
Application number
AT05709078T
Other languages
English (en)
Inventor
Andrei Radulescu
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE403314T1 publication Critical patent/ATE403314T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/12—Shortest path evaluation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/22—Alternate routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/30—Routing of multiclass traffic
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
AT05709078T 2004-04-05 2005-03-23 Integrierte schaltung und verfahren zur zeitschlitz-zuteilung ATE403314T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04101400 2004-04-05

Publications (1)

Publication Number Publication Date
ATE403314T1 true ATE403314T1 (de) 2008-08-15

Family

ID=34962008

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05709078T ATE403314T1 (de) 2004-04-05 2005-03-23 Integrierte schaltung und verfahren zur zeitschlitz-zuteilung

Country Status (8)

Country Link
US (1) US7564865B2 (de)
EP (1) EP1735966B1 (de)
JP (1) JP4686539B2 (de)
KR (1) KR101125647B1 (de)
CN (1) CN1947387B (de)
AT (1) ATE403314T1 (de)
DE (1) DE602005008573D1 (de)
WO (1) WO2005099187A1 (de)

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JP4820466B2 (ja) * 2010-01-25 2011-11-24 パナソニック株式会社 半導体システム、中継器およびチップ回路
JP5375661B2 (ja) * 2010-02-24 2013-12-25 富士通株式会社 経路割当装置および経路割当方法
US9304782B2 (en) * 2010-05-03 2016-04-05 Pluribus Networks, Inc. Network switch, systems, and servers implementing boot image delivery
US8885510B2 (en) 2012-10-09 2014-11-11 Netspeed Systems Heterogeneous channel capacities in an interconnect
US9007920B2 (en) * 2013-01-18 2015-04-14 Netspeed Systems QoS in heterogeneous NoC by assigning weights to NoC node channels and using weighted arbitration at NoC nodes
US9571402B2 (en) * 2013-05-03 2017-02-14 Netspeed Systems Congestion control and QoS in NoC by regulating the injection traffic
US9456444B2 (en) * 2013-07-17 2016-09-27 Cisco Technology, Inc. OAM and time slot control in a deterministic ARC chain topology network
US9471726B2 (en) 2013-07-25 2016-10-18 Netspeed Systems System level simulation in network on chip architecture
US9473388B2 (en) 2013-08-07 2016-10-18 Netspeed Systems Supporting multicast in NOC interconnect
US9699079B2 (en) 2013-12-30 2017-07-04 Netspeed Systems Streaming bridge design with host interfaces and network on chip (NoC) layers
US9473415B2 (en) 2014-02-20 2016-10-18 Netspeed Systems QoS in a system with end-to-end flow control and QoS aware buffer allocation
US9742630B2 (en) 2014-09-22 2017-08-22 Netspeed Systems Configurable router for a network on chip (NoC)
US9571341B1 (en) 2014-10-01 2017-02-14 Netspeed Systems Clock gating for system-on-chip elements
US9660942B2 (en) 2015-02-03 2017-05-23 Netspeed Systems Automatic buffer sizing for optimal network-on-chip design
US9444702B1 (en) 2015-02-06 2016-09-13 Netspeed Systems System and method for visualization of NoC performance based on simulation output
US9568970B1 (en) 2015-02-12 2017-02-14 Netspeed Systems, Inc. Hardware and software enabled implementation of power profile management instructions in system on chip
US9928204B2 (en) 2015-02-12 2018-03-27 Netspeed Systems, Inc. Transaction expansion for NoC simulation and NoC design
US10348563B2 (en) 2015-02-18 2019-07-09 Netspeed Systems, Inc. System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology
US10050843B2 (en) 2015-02-18 2018-08-14 Netspeed Systems Generation of network-on-chip layout based on user specified topological constraints
US9864728B2 (en) 2015-05-29 2018-01-09 Netspeed Systems, Inc. Automatic generation of physically aware aggregation/distribution networks
US9825809B2 (en) 2015-05-29 2017-11-21 Netspeed Systems Dynamically configuring store-and-forward channels and cut-through channels in a network-on-chip
US10218580B2 (en) 2015-06-18 2019-02-26 Netspeed Systems Generating physically aware network-on-chip design from a physical system-on-chip specification
US10666578B2 (en) * 2016-09-06 2020-05-26 Taiwan Semiconductor Manufacturing Company Limited Network-on-chip system and a method of generating the same
US10452124B2 (en) 2016-09-12 2019-10-22 Netspeed Systems, Inc. Systems and methods for facilitating low power on a network-on-chip
US20180159786A1 (en) 2016-12-02 2018-06-07 Netspeed Systems, Inc. Interface virtualization and fast path for network on chip
US10313269B2 (en) 2016-12-26 2019-06-04 Netspeed Systems, Inc. System and method for network on chip construction through machine learning
US10063496B2 (en) 2017-01-10 2018-08-28 Netspeed Systems Inc. Buffer sizing of a NoC through machine learning
US10084725B2 (en) 2017-01-11 2018-09-25 Netspeed Systems, Inc. Extracting features from a NoC for machine learning construction
US10469337B2 (en) 2017-02-01 2019-11-05 Netspeed Systems, Inc. Cost management against requirements for the generation of a NoC
US10298485B2 (en) 2017-02-06 2019-05-21 Netspeed Systems, Inc. Systems and methods for NoC construction
US10983910B2 (en) * 2018-02-22 2021-04-20 Netspeed Systems, Inc. Bandwidth weighting mechanism based network-on-chip (NoC) configuration
US11144457B2 (en) 2018-02-22 2021-10-12 Netspeed Systems, Inc. Enhanced page locality in network-on-chip (NoC) architectures
US10547514B2 (en) 2018-02-22 2020-01-28 Netspeed Systems, Inc. Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation
US10896476B2 (en) 2018-02-22 2021-01-19 Netspeed Systems, Inc. Repository of integration description of hardware intellectual property for NoC construction and SoC integration
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US11023377B2 (en) 2018-02-23 2021-06-01 Netspeed Systems, Inc. Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA)
JP7710957B2 (ja) * 2021-10-14 2025-07-22 株式会社東芝 通信装置、通信方法、プログラムおよび通信システム

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Also Published As

Publication number Publication date
WO2005099187A1 (en) 2005-10-20
CN1947387A (zh) 2007-04-11
US20070195748A1 (en) 2007-08-23
KR101125647B1 (ko) 2012-03-27
EP1735966A1 (de) 2006-12-27
EP1735966B1 (de) 2008-07-30
KR20070023678A (ko) 2007-02-28
DE602005008573D1 (de) 2008-09-11
JP4686539B2 (ja) 2011-05-25
US7564865B2 (en) 2009-07-21
JP2007532075A (ja) 2007-11-08
CN1947387B (zh) 2010-04-14

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