ATE404975T1 - Verfahren zum lesen von multibit rom-zellen - Google Patents
Verfahren zum lesen von multibit rom-zellenInfo
- Publication number
- ATE404975T1 ATE404975T1 AT05251525T AT05251525T ATE404975T1 AT E404975 T1 ATE404975 T1 AT E404975T1 AT 05251525 T AT05251525 T AT 05251525T AT 05251525 T AT05251525 T AT 05251525T AT E404975 T1 ATE404975 T1 AT E404975T1
- Authority
- AT
- Austria
- Prior art keywords
- switch
- row
- reading
- reading data
- multibit
- Prior art date
Links
- 230000001419 dependent effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0406038.0A GB0406038D0 (en) | 2004-03-17 | 2004-03-17 | Method for reading rom cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE404975T1 true ATE404975T1 (de) | 2008-08-15 |
Family
ID=32117901
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05251525T ATE404975T1 (de) | 2004-03-17 | 2005-03-14 | Verfahren zum lesen von multibit rom-zellen |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7411808B2 (de) |
| EP (1) | EP1577898B1 (de) |
| AT (1) | ATE404975T1 (de) |
| DE (1) | DE602005008788D1 (de) |
| GB (1) | GB0406038D0 (de) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7324364B2 (en) * | 2006-02-27 | 2008-01-29 | Agere Systems Inc. | Layout techniques for memory circuitry |
| US7301828B2 (en) * | 2006-02-27 | 2007-11-27 | Agere Systems Inc. | Decoding techniques for read-only memory |
| FR2915019B1 (fr) * | 2007-04-13 | 2009-07-17 | Dolphin Integration Sa | Memoire rom multibit |
| US7816875B2 (en) * | 2008-01-24 | 2010-10-19 | Viking Access Systems, Llc | High torque gearless actuation at low speeds for swing gate, roll-up gate, slide gate, and vehicular barrier operators |
| JP2010010369A (ja) * | 2008-06-26 | 2010-01-14 | Panasonic Corp | 混載メモリ装置及び半導体装置 |
| JP6122801B2 (ja) * | 2014-03-13 | 2017-04-26 | 株式会社東芝 | 半導体記憶装置 |
| US11152060B2 (en) * | 2019-06-21 | 2021-10-19 | Intel Corporation | Multi-bit read-only memory device |
| CN114300028B (zh) * | 2021-12-14 | 2023-06-16 | 成都海光微电子技术有限公司 | Rom存储单元及rom存储单元存储信息的读取方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5870326A (en) * | 1997-08-12 | 1999-02-09 | Intel Corporation | Information encoding by multiple line selection |
| US6002607A (en) * | 1998-02-24 | 1999-12-14 | National Semiconductor Corporation | Read-only-memory (ROM) having a memory cell that stores a plurality of bits of information |
| FR2794895B1 (fr) * | 1999-06-11 | 2001-09-14 | St Microelectronics Sa | Dispositif semiconducteur integre de memoire morte |
| US6355550B1 (en) * | 2000-05-19 | 2002-03-12 | Motorola, Inc. | Ultra-late programming ROM and method of manufacture |
| FR2826170B1 (fr) * | 2001-06-15 | 2003-12-12 | Dolphin Integration Sa | Memoire rom a points memoire multibit |
| US6590797B1 (en) * | 2002-01-09 | 2003-07-08 | Tower Semiconductor Ltd. | Multi-bit programmable memory cell having multiple anti-fuse elements |
-
2004
- 2004-03-17 GB GBGB0406038.0A patent/GB0406038D0/en not_active Ceased
-
2005
- 2005-03-14 EP EP05251525A patent/EP1577898B1/de not_active Expired - Lifetime
- 2005-03-14 AT AT05251525T patent/ATE404975T1/de not_active IP Right Cessation
- 2005-03-14 DE DE602005008788T patent/DE602005008788D1/de not_active Expired - Lifetime
- 2005-03-16 US US11/080,493 patent/US7411808B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP1577898A2 (de) | 2005-09-21 |
| EP1577898B1 (de) | 2008-08-13 |
| EP1577898A3 (de) | 2006-08-30 |
| GB0406038D0 (en) | 2004-04-21 |
| US7411808B2 (en) | 2008-08-12 |
| DE602005008788D1 (de) | 2008-09-25 |
| US20050213362A1 (en) | 2005-09-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |