ATE405073T1 - System und verfahren zur formatierung von daten - Google Patents

System und verfahren zur formatierung von daten

Info

Publication number
ATE405073T1
ATE405073T1 AT04753995T AT04753995T ATE405073T1 AT E405073 T1 ATE405073 T1 AT E405073T1 AT 04753995 T AT04753995 T AT 04753995T AT 04753995 T AT04753995 T AT 04753995T AT E405073 T1 ATE405073 T1 AT E405073T1
Authority
AT
Austria
Prior art keywords
data
cell
serial
formatting data
converting
Prior art date
Application number
AT04753995T
Other languages
English (en)
Inventor
Hamed Eshraghian
Original Assignee
Starent Networks Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Starent Networks Corp filed Critical Starent Networks Corp
Application granted granted Critical
Publication of ATE405073T1 publication Critical patent/ATE405073T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
AT04753995T 2003-06-03 2004-06-03 System und verfahren zur formatierung von daten ATE405073T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US47552103P 2003-06-03 2003-06-03

Publications (1)

Publication Number Publication Date
ATE405073T1 true ATE405073T1 (de) 2008-08-15

Family

ID=33511688

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04753995T ATE405073T1 (de) 2003-06-03 2004-06-03 System und verfahren zur formatierung von daten

Country Status (8)

Country Link
US (1) US7903685B2 (de)
EP (1) EP1636951B1 (de)
JP (1) JP4594930B2 (de)
CN (1) CN1817011A (de)
AT (1) ATE405073T1 (de)
CA (1) CA2528051C (de)
DE (1) DE602004015792D1 (de)
WO (1) WO2004109997A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1855783B (zh) * 2005-04-21 2011-05-04 华为技术有限公司 大容量时分多路复用交换芯片的数据处理方法
US9164942B2 (en) * 2011-10-11 2015-10-20 Etron Technology, Inc. High speed memory chip module and electronics system device with a high speed memory chip module
US9201834B2 (en) 2011-10-11 2015-12-01 Etron Technology, Inc. Reconfigurable high speed memory chip module and electronic device with a reconfigurable high speed memory chip module
US11889590B2 (en) * 2013-06-04 2024-01-30 Attobahn, Inc. System and method for a viral molecular network utilizing mobile devices
US10021735B2 (en) * 2013-06-04 2018-07-10 Attobahn, Inc. Viral molecular network architecture and design

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5058051A (en) * 1988-07-29 1991-10-15 Texas Medical Instruments, Inc. Address register processor system
JPH0738592B2 (ja) * 1988-08-12 1995-04-26 沖電気工業株式会社 変換回路
DE68928543T2 (de) * 1988-10-06 1998-04-23 Gpt Ltd Asynchrone Zeitvielfachvermittlungsanordnung und Verfahren zum Betrieb der Anordnung
JPH0783339B2 (ja) * 1989-03-01 1995-09-06 富士通株式会社 多重同期回路
JPH04124995A (ja) * 1990-09-17 1992-04-24 Hitachi Ltd 2ポートメモリ及びその基本メモリセル並びにそれを用いた直並列変換器及び時間スイッチ
JPH06275069A (ja) 1993-03-20 1994-09-30 Hitachi Ltd シリアルメモリ
CA2100729C (en) * 1993-07-16 2001-01-16 Simon Skierszkan Serial bit rate converter embedded in a switching matrix
KR100230230B1 (ko) * 1993-12-24 1999-11-15 윤종용 메모리 어드레싱 방법 및 장치
US5841771A (en) * 1995-07-07 1998-11-24 Northern Telecom Limited Telecommunications switch apparatus and method for time switching
AU2188897A (en) * 1996-02-13 1997-09-02 Roger F. Atkinson Multiple application switching platform and method
US5878045A (en) * 1996-04-26 1999-03-02 Motorola, Inc. Method and apparatus for converting data streams in a cell based communications system
US5796733A (en) * 1996-07-03 1998-08-18 General Signal Corporation Time division switching system
US6529510B1 (en) * 1997-12-19 2003-03-04 Lg Information & Communications, Ltd. ATM switching apparatus and method thereof
EP1121759B1 (de) * 1998-10-23 2005-07-20 Polycom, Inc. Seriell-parallel- und parallel-seriell-umwandlungsvorrichtung
JP3344401B2 (ja) * 2000-03-03 2002-11-11 日本電気株式会社 ゆらぎバッファ制御装置
US7593432B2 (en) * 2001-03-31 2009-09-22 Redback Networks Inc. Method and apparatus for deframing signals
US7181485B1 (en) * 2001-11-26 2007-02-20 Integrated Device Technology, Inc. Variably delayable transmission of packets between independently clocked source, intermediate, and destination circuits while maintaining orderly and timely processing in one or both of the intermediate and destination circuits
CA2366397A1 (en) * 2001-12-31 2003-06-30 Tropic Networks Inc. An interface for data transfer between integrated circuits

Also Published As

Publication number Publication date
JP4594930B2 (ja) 2010-12-08
JP2007526656A (ja) 2007-09-13
US20050030982A1 (en) 2005-02-10
EP1636951A1 (de) 2006-03-22
US7903685B2 (en) 2011-03-08
DE602004015792D1 (de) 2008-09-25
EP1636951B1 (de) 2008-08-13
CA2528051A1 (en) 2004-12-16
CN1817011A (zh) 2006-08-09
WO2004109997A1 (en) 2004-12-16
CA2528051C (en) 2013-01-22

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties