ATE419582T1 - Verfahren, system und programm zum speicherbasierten datentransfer - Google Patents

Verfahren, system und programm zum speicherbasierten datentransfer

Info

Publication number
ATE419582T1
ATE419582T1 AT03765858T AT03765858T ATE419582T1 AT E419582 T1 ATE419582 T1 AT E419582T1 AT 03765858 T AT03765858 T AT 03765858T AT 03765858 T AT03765858 T AT 03765858T AT E419582 T1 ATE419582 T1 AT E419582T1
Authority
AT
Austria
Prior art keywords
program
memory
data transfer
based data
memory address
Prior art date
Application number
AT03765858T
Other languages
English (en)
Inventor
David Smith
Sailesh Bissessur
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE419582T1 publication Critical patent/ATE419582T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20Employing a main memory using a specific memory technology
    • G06F2212/206Memory mapped I/O

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Information Transfer Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Information Transfer Between Computers (AREA)
AT03765858T 2002-07-24 2003-07-17 Verfahren, system und programm zum speicherbasierten datentransfer ATE419582T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/205,546 US6807600B2 (en) 2002-07-24 2002-07-24 Method, system, and program for memory based data transfer

Publications (1)

Publication Number Publication Date
ATE419582T1 true ATE419582T1 (de) 2009-01-15

Family

ID=30770092

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03765858T ATE419582T1 (de) 2002-07-24 2003-07-17 Verfahren, system und programm zum speicherbasierten datentransfer

Country Status (8)

Country Link
US (1) US6807600B2 (de)
EP (1) EP1532533B1 (de)
CN (1) CN100339836C (de)
AT (1) ATE419582T1 (de)
AU (1) AU2003259191A1 (de)
DE (1) DE60325605D1 (de)
TW (1) TWI280483B (de)
WO (1) WO2004010314A2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6931457B2 (en) * 2002-07-24 2005-08-16 Intel Corporation Method, system, and program for controlling multiple storage devices
US6928509B2 (en) * 2002-08-01 2005-08-09 International Business Machines Corporation Method and apparatus for enhancing reliability and scalability of serial storage devices
TWI221225B (en) * 2002-08-29 2004-09-21 Via Tech Inc Physical layer structure adapted to provide parallel and serial ATA interfaces
KR100487539B1 (ko) * 2002-09-02 2005-05-03 삼성전자주식회사 직렬 에이티에이 케이블과 연결되는 불휘발성 반도체메모리 장치
GB2395302B (en) * 2002-11-13 2005-12-28 Advanced Risc Mach Ltd Hardware driven state save/restore in a data processing system
US8149862B1 (en) * 2002-11-15 2012-04-03 Netlogic Microsystems, Inc. Multi-protocol communication circuit
US7107369B2 (en) * 2002-12-19 2006-09-12 Intel Corporation Connecting storage devices to a processor-based device
US7058749B2 (en) * 2003-11-13 2006-06-06 Dell Products L.P. System and method for communications in serial attached SCSI storage network
TWI254858B (en) * 2004-04-14 2006-05-11 Mediatek Inc Multitask data transfer system on ATA bus
US7496695B2 (en) 2005-09-29 2009-02-24 P.A. Semi, Inc. Unified DMA
US7620746B2 (en) 2005-09-29 2009-11-17 Apple Inc. Functional DMA performing operation on DMA data and writing result of operation
US20070214277A1 (en) * 2006-03-07 2007-09-13 Ahmed Ali U Peer-to-peer network communications using SATA/SAS technology
US8065454B1 (en) * 2009-08-20 2011-11-22 Qlogic, Corporation System and method for mapping functions to and from network devices using configuration compatible with an adapter by remapping plurality of logical ports of adapter
US9558143B2 (en) 2014-05-09 2017-01-31 Micron Technology, Inc. Interconnect systems and methods using hybrid memory cube links to send packetized data over different endpoints of a data handling device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4535404A (en) 1982-04-29 1985-08-13 Honeywell Information Systems Inc. Method and apparatus for addressing a peripheral interface by mapping into memory address space
US5838932A (en) 1996-12-23 1998-11-17 Compaq Computer Corporation Transparent PCI to PCI bridge with dynamic memory and I/O map programming
US6094699A (en) * 1998-02-13 2000-07-25 Mylex Corporation Apparatus and method for coupling devices to a PCI-to-PCI bridge in an intelligent I/O controller
US6233641B1 (en) 1998-06-08 2001-05-15 International Business Machines Corporation Apparatus and method of PCI routing in a bridge configuration
US6275876B1 (en) 1999-05-21 2001-08-14 International Business Machines Corporation Specifying wrap register for storing memory address to store completion status of instruction to external device
US6710620B2 (en) 2001-03-13 2004-03-23 Adc Telecommunications Israel, Ltd. Bus interface for I/O device with memory
US6931457B2 (en) * 2002-07-24 2005-08-16 Intel Corporation Method, system, and program for controlling multiple storage devices

Also Published As

Publication number Publication date
US20040019707A1 (en) 2004-01-29
WO2004010314A2 (en) 2004-01-29
EP1532533A2 (de) 2005-05-25
CN1685318A (zh) 2005-10-19
TWI280483B (en) 2007-05-01
DE60325605D1 (de) 2009-02-12
AU2003259191A1 (en) 2004-02-09
TW200408958A (en) 2004-06-01
CN100339836C (zh) 2007-09-26
EP1532533B1 (de) 2008-12-31
US6807600B2 (en) 2004-10-19
WO2004010314A3 (en) 2004-04-08
AU2003259191A8 (en) 2004-02-09

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Legal Events

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