ATE426920T1 - Logikgatterzelle - Google Patents
LogikgatterzelleInfo
- Publication number
- ATE426920T1 ATE426920T1 AT99201920T AT99201920T ATE426920T1 AT E426920 T1 ATE426920 T1 AT E426920T1 AT 99201920 T AT99201920 T AT 99201920T AT 99201920 T AT99201920 T AT 99201920T AT E426920 T1 ATE426920 T1 AT E426920T1
- Authority
- AT
- Austria
- Prior art keywords
- logic gate
- inverting logic
- diffusion regions
- gate cell
- step diffusion
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20851398 | 1998-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE426920T1 true ATE426920T1 (de) | 2009-04-15 |
Family
ID=16557419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT99201920T ATE426920T1 (de) | 1998-06-18 | 1999-06-16 | Logikgatterzelle |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6329845B1 (de) |
| EP (1) | EP0966041B1 (de) |
| JP (1) | JP3110422B2 (de) |
| AT (1) | ATE426920T1 (de) |
| DE (1) | DE69940625D1 (de) |
| TW (1) | TW469628B (de) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4334660B2 (ja) * | 1999-04-05 | 2009-09-30 | パナソニック株式会社 | ラッチアップ検証方法及び検証装置 |
| US6624656B1 (en) * | 1999-10-15 | 2003-09-23 | Triscend Corporation | Input/output circuit with user programmable functions |
| JP4366914B2 (ja) * | 2002-09-25 | 2009-11-18 | 日本電気株式会社 | 表示装置用駆動回路及びそれを用いた表示装置 |
| JP4412893B2 (ja) * | 2002-11-25 | 2010-02-10 | シャープ株式会社 | 半導体集積回路およびその製造方法 |
| KR20050099259A (ko) * | 2004-04-09 | 2005-10-13 | 삼성전자주식회사 | 고속 플립플롭들 및 이를 이용한 복합 게이트들 |
| JP4149980B2 (ja) * | 2004-09-17 | 2008-09-17 | シャープ株式会社 | 半導体製造装置の製造方法 |
| US20070013425A1 (en) * | 2005-06-30 | 2007-01-18 | Burr James B | Lower minimum retention voltage storage elements |
| JP2010129843A (ja) * | 2008-11-28 | 2010-06-10 | Renesas Electronics Corp | 半導体集積回路におけるセルデータ生成方法、及び、半導体集積回路の設計方法 |
| US20110018602A1 (en) * | 2009-07-24 | 2011-01-27 | Texas Instruments Incorporated | Edge-sensitive feedback-controlled pulse generator |
| JP2013172155A (ja) | 2012-02-17 | 2013-09-02 | Renesas Electronics Corp | 半導体装置 |
| TWI656622B (zh) * | 2014-09-23 | 2019-04-11 | 聯華電子股份有限公司 | 積體電路佈局結構 |
| US9577635B2 (en) * | 2015-01-15 | 2017-02-21 | Qualcomm Incorporated | Clock-gating cell with low area, low power, and low setup time |
| KR102497218B1 (ko) * | 2016-04-29 | 2023-02-07 | 삼성전자 주식회사 | 복합 논리 셀을 포함하는 집적 회로 |
| US10402529B2 (en) | 2016-11-18 | 2019-09-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and layout of an integrated circuit |
| US11055463B1 (en) * | 2020-04-01 | 2021-07-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Systems and methods for gate array with partial common inputs |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58111347A (ja) | 1981-12-24 | 1983-07-02 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JPS62189739A (ja) * | 1986-02-17 | 1987-08-19 | Hitachi Ltd | 半導体集積回路装置 |
| JP2632420B2 (ja) * | 1989-02-23 | 1997-07-23 | 三菱電機株式会社 | 半導体集積回路 |
| JPH0382140A (ja) | 1989-08-25 | 1991-04-08 | Hitachi Ltd | 半導体集積回路装置 |
| JP3079599B2 (ja) * | 1990-04-20 | 2000-08-21 | セイコーエプソン株式会社 | 半導体集積回路及びその製造方法 |
| US5764533A (en) * | 1995-08-01 | 1998-06-09 | Sun Microsystems, Inc. | Apparatus and methods for generating cell layouts |
| US5903174A (en) * | 1995-12-20 | 1999-05-11 | Cypress Semiconductor Corp. | Method and apparatus for reducing skew among input signals within an integrated circuit |
| JP3100568B2 (ja) | 1997-09-09 | 2000-10-16 | エイ・アイ・エル株式会社 | 小面積伝送ゲートセル |
-
1999
- 1999-05-21 JP JP11141221A patent/JP3110422B2/ja not_active Expired - Fee Related
- 1999-06-15 US US09/333,456 patent/US6329845B1/en not_active Expired - Fee Related
- 1999-06-16 DE DE69940625T patent/DE69940625D1/de not_active Expired - Lifetime
- 1999-06-16 AT AT99201920T patent/ATE426920T1/de not_active IP Right Cessation
- 1999-06-16 EP EP99201920A patent/EP0966041B1/de not_active Expired - Lifetime
- 1999-12-06 TW TW088121286A patent/TW469628B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0966041A2 (de) | 1999-12-22 |
| US6329845B1 (en) | 2001-12-11 |
| DE69940625D1 (de) | 2009-05-07 |
| EP0966041B1 (de) | 2009-03-25 |
| JP2000077635A (ja) | 2000-03-14 |
| US20020000833A1 (en) | 2002-01-03 |
| EP0966041A3 (de) | 2000-10-25 |
| TW469628B (en) | 2001-12-21 |
| JP3110422B2 (ja) | 2000-11-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |