ATE436089T1 - Verfahren zur herstellung von halbleiteranordnungen mit graben-gate - Google Patents
Verfahren zur herstellung von halbleiteranordnungen mit graben-gateInfo
- Publication number
- ATE436089T1 ATE436089T1 AT02734870T AT02734870T ATE436089T1 AT E436089 T1 ATE436089 T1 AT E436089T1 AT 02734870 T AT02734870 T AT 02734870T AT 02734870 T AT02734870 T AT 02734870T AT E436089 T1 ATE436089 T1 AT E436089T1
- Authority
- AT
- Austria
- Prior art keywords
- mask
- trench
- gate
- semiconductor devices
- gate semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 125000006850 spacer group Chemical group 0.000 abstract 2
- 239000011810 insulating material Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0293—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using formation of insulating sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
- H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0295—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the source electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
- Thyristors (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0101695.5A GB0101695D0 (en) | 2001-01-23 | 2001-01-23 | Manufacture of trench-gate semiconductor devices |
| PCT/IB2002/000048 WO2002059957A1 (en) | 2001-01-23 | 2002-01-10 | Manufacture of trench-gate semiconductor devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE436089T1 true ATE436089T1 (de) | 2009-07-15 |
Family
ID=9907321
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT02734870T ATE436089T1 (de) | 2001-01-23 | 2002-01-10 | Verfahren zur herstellung von halbleiteranordnungen mit graben-gate |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US6521498B2 (de) |
| EP (1) | EP1356506B1 (de) |
| JP (1) | JP4198465B2 (de) |
| KR (1) | KR100834269B1 (de) |
| AT (1) | ATE436089T1 (de) |
| DE (1) | DE60232855D1 (de) |
| GB (1) | GB0101695D0 (de) |
| TW (1) | TW541630B (de) |
| WO (1) | WO2002059957A1 (de) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4932088B2 (ja) | 2001-02-19 | 2012-05-16 | ルネサスエレクトロニクス株式会社 | 絶縁ゲート型半導体装置の製造方法 |
| JP2004055803A (ja) * | 2002-07-19 | 2004-02-19 | Renesas Technology Corp | 半導体装置 |
| US6753228B2 (en) * | 2002-10-15 | 2004-06-22 | Semiconductor Components Industries, L.L.C. | Method of forming a low resistance semiconductor device and structure therefor |
| US6873003B2 (en) * | 2003-03-06 | 2005-03-29 | Infineon Technologies Aktiengesellschaft | Nonvolatile memory cell |
| US7393081B2 (en) * | 2003-06-30 | 2008-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Droplet jetting device and method of manufacturing pattern |
| US6913977B2 (en) * | 2003-09-08 | 2005-07-05 | Siliconix Incorporated | Triple-diffused trench MOSFET and method of fabricating the same |
| KR100500473B1 (ko) * | 2003-10-22 | 2005-07-12 | 삼성전자주식회사 | 반도체 소자에서의 리세스 게이트 트랜지스터 구조 및형성방법 |
| US7786531B2 (en) * | 2005-03-18 | 2010-08-31 | Alpha & Omega Semiconductor Ltd. | MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification |
| JP2008098593A (ja) * | 2006-09-15 | 2008-04-24 | Ricoh Co Ltd | 半導体装置及びその製造方法 |
| KR100861174B1 (ko) * | 2006-10-31 | 2008-09-30 | 주식회사 하이닉스반도체 | 노광 마스크 및 이를 이용한 반도체 소자의 제조 방법 |
| JP2008218711A (ja) * | 2007-03-05 | 2008-09-18 | Renesas Technology Corp | 半導体装置およびその製造方法、ならびに電源装置 |
| US7902017B2 (en) * | 2008-12-17 | 2011-03-08 | Semiconductor Components Industries, Llc | Process of forming an electronic device including a trench and a conductive structure therein |
| US8426275B2 (en) * | 2009-01-09 | 2013-04-23 | Niko Semiconductor Co., Ltd. | Fabrication method of trenched power MOSFET |
| KR101649967B1 (ko) | 2010-05-04 | 2016-08-23 | 삼성전자주식회사 | 이-퓨즈 구조체를 포함하는 반도체 소자 및 그 제조 방법 |
| US8377813B2 (en) * | 2010-08-27 | 2013-02-19 | Rexchip Electronics Corporation | Split word line fabrication process |
| CN116779664A (zh) * | 2023-08-22 | 2023-09-19 | 深圳芯能半导体技术有限公司 | 一种具电极间电容结构的igbt芯片及其制作方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9306895D0 (en) * | 1993-04-01 | 1993-05-26 | Philips Electronics Uk Ltd | A method of manufacturing a semiconductor device comprising an insulated gate field effect device |
| JP3155894B2 (ja) * | 1994-09-29 | 2001-04-16 | 株式会社東芝 | 半導体装置およびその製造方法 |
| DE19545903C2 (de) * | 1995-12-08 | 1997-09-18 | Siemens Ag | Festwertspeicherzellenanordnung und Verfahren zu deren Herstellung |
| DE19600422C1 (de) * | 1996-01-08 | 1997-08-21 | Siemens Ag | Elektrisch programmierbare Speicherzellenanordnung und Verfahren zu deren Herstellung |
| JP4077529B2 (ja) * | 1996-05-22 | 2008-04-16 | フェアチャイルドコリア半導体株式会社 | トレンチ拡散mosトランジスタの製造方法 |
| US5972741A (en) * | 1996-10-31 | 1999-10-26 | Sanyo Electric Co., Ltd. | Method of manufacturing semiconductor device |
| DE19646419C1 (de) * | 1996-11-11 | 1998-04-30 | Siemens Ag | Verfahren zur Herstellung einer elektrisch schreib- und löschbaren Festwertspeicherzellenanordnung |
| US6096608A (en) * | 1997-06-30 | 2000-08-01 | Siliconix Incorporated | Bidirectional trench gated power mosfet with submerged body bus extending underneath gate trench |
| US6177299B1 (en) * | 1998-01-15 | 2001-01-23 | International Business Machines Corporation | Transistor having substantially isolated body and method of making the same |
-
2001
- 2001-01-23 GB GBGB0101695.5A patent/GB0101695D0/en not_active Ceased
-
2002
- 2002-01-10 EP EP02734870A patent/EP1356506B1/de not_active Expired - Lifetime
- 2002-01-10 WO PCT/IB2002/000048 patent/WO2002059957A1/en not_active Ceased
- 2002-01-10 AT AT02734870T patent/ATE436089T1/de not_active IP Right Cessation
- 2002-01-10 JP JP2002560187A patent/JP4198465B2/ja not_active Expired - Fee Related
- 2002-01-10 KR KR1020027012359A patent/KR100834269B1/ko not_active Expired - Fee Related
- 2002-01-10 DE DE60232855T patent/DE60232855D1/de not_active Expired - Lifetime
- 2002-01-23 TW TW091101050A patent/TW541630B/zh not_active IP Right Cessation
- 2002-06-04 US US10/055,350 patent/US6521498B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| GB0101695D0 (en) | 2001-03-07 |
| EP1356506B1 (de) | 2009-07-08 |
| KR20020092391A (ko) | 2002-12-11 |
| EP1356506A1 (de) | 2003-10-29 |
| KR100834269B1 (ko) | 2008-05-30 |
| US20020137291A1 (en) | 2002-09-26 |
| JP4198465B2 (ja) | 2008-12-17 |
| DE60232855D1 (de) | 2009-08-20 |
| JP2004518292A (ja) | 2004-06-17 |
| TW541630B (en) | 2003-07-11 |
| US6521498B2 (en) | 2003-02-18 |
| WO2002059957A1 (en) | 2002-08-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |