ATE440320T1 - Arithmetische schaltung und arithmetisches verfahren - Google Patents

Arithmetische schaltung und arithmetisches verfahren

Info

Publication number
ATE440320T1
ATE440320T1 AT01128119T AT01128119T ATE440320T1 AT E440320 T1 ATE440320 T1 AT E440320T1 AT 01128119 T AT01128119 T AT 01128119T AT 01128119 T AT01128119 T AT 01128119T AT E440320 T1 ATE440320 T1 AT E440320T1
Authority
AT
Austria
Prior art keywords
memory
arithmetic
variables
read
memories
Prior art date
Application number
AT01128119T
Other languages
English (en)
Inventor
Kohji Takano
Akashi Satoh
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE440320T1 publication Critical patent/ATE440320T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/40—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using contact-making devices, e.g. electromagnetic relay
    • G06F7/44—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Electromagnetism (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Memory System (AREA)
AT01128119T 2000-12-19 2001-11-27 Arithmetische schaltung und arithmetisches verfahren ATE440320T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000386069A JP3709553B2 (ja) 2000-12-19 2000-12-19 演算回路および演算方法

Publications (1)

Publication Number Publication Date
ATE440320T1 true ATE440320T1 (de) 2009-09-15

Family

ID=18853225

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01128119T ATE440320T1 (de) 2000-12-19 2001-11-27 Arithmetische schaltung und arithmetisches verfahren

Country Status (8)

Country Link
US (1) US6772942B2 (de)
EP (1) EP1217512B1 (de)
JP (1) JP3709553B2 (de)
KR (1) KR100441036B1 (de)
CN (1) CN1221891C (de)
AT (1) ATE440320T1 (de)
DE (1) DE60139597D1 (de)
TW (1) TW530260B (de)

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JP4544870B2 (ja) 2004-01-26 2010-09-15 富士通セミコンダクター株式会社 演算回路装置
JP4408712B2 (ja) * 2004-01-26 2010-02-03 富士通マイクロエレクトロニクス株式会社 多倍長データ積和演算処理回路及びモンゴメリ積和剰余演算回路
JP4663421B2 (ja) * 2005-06-24 2011-04-06 日本電信電話株式会社 離散対数演算装置、方法及びプログラム
US8028015B2 (en) * 2007-08-10 2011-09-27 Inside Contactless S.A. Method and system for large number multiplication
JP5097138B2 (ja) * 2009-01-15 2012-12-12 シャープ株式会社 モンゴメリ乗算のための演算回路及び暗号回路
CN101751242B (zh) * 2009-12-22 2013-08-21 无锡中星微电子有限公司 一种数据处理方法及系统
TW201217993A (en) * 2010-10-20 2012-05-01 Huafan University employing operation on decomposed matrices to reduce operation amount for single matrix per unit time for light-weighting matrix operation process in simpler operation circuit
CN102360281B (zh) * 2011-10-31 2014-04-02 中国人民解放军国防科学技术大学 用于微处理器的多功能定点乘加单元mac运算装置
CN102999313B (zh) * 2012-12-24 2016-01-20 飞天诚信科技股份有限公司 一种基于蒙哥马利模乘的数据处理方法
KR101633960B1 (ko) 2013-08-27 2016-06-27 배종훈 유아 세정보조기구
JP6193699B2 (ja) * 2013-09-27 2017-09-06 株式会社ソシオネクスト 演算回路
TWI549090B (zh) * 2014-08-29 2016-09-11 華梵大學 Portable sensing operation device
CN106156614B (zh) * 2015-03-25 2018-12-28 北京南瑞智芯微电子科技有限公司 一种抵抗故障攻击的防护方法和装置
IL239880B (en) * 2015-07-09 2018-08-30 Kaluzhny Uri Simplified montgomery multiplication
TWI575924B (zh) * 2015-10-06 2017-03-21 瑞昱半導體股份有限公司 解密裝置、方法及電路
TWI580243B (zh) * 2015-10-06 2017-04-21 瑞昱半導體股份有限公司 解密裝置、方法及電路
US10534836B2 (en) 2016-12-06 2020-01-14 Gsi Technology Inc. Four steps associative full adder
CN109814838B (zh) * 2019-03-28 2024-04-12 贵州华芯半导体技术有限公司 获取加解密运算中的中间结果组的方法、硬件装置和系统
TWI817742B (zh) * 2022-09-27 2023-10-01 熵碼科技股份有限公司 數值轉換方法及數值轉換系統

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Also Published As

Publication number Publication date
JP2002207589A (ja) 2002-07-26
EP1217512A3 (de) 2008-03-05
TW530260B (en) 2003-05-01
EP1217512B1 (de) 2009-08-19
KR20020050105A (ko) 2002-06-26
JP3709553B2 (ja) 2005-10-26
EP1217512A2 (de) 2002-06-26
CN1221891C (zh) 2005-10-05
US6772942B2 (en) 2004-08-10
KR100441036B1 (ko) 2004-07-21
CN1366234A (zh) 2002-08-28
DE60139597D1 (de) 2009-10-01
US20020074391A1 (en) 2002-06-20

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