ATE443375T1 - Boost-logik zur energierückgewinnung - Google Patents

Boost-logik zur energierückgewinnung

Info

Publication number
ATE443375T1
ATE443375T1 AT05773123T AT05773123T ATE443375T1 AT E443375 T1 ATE443375 T1 AT E443375T1 AT 05773123 T AT05773123 T AT 05773123T AT 05773123 T AT05773123 T AT 05773123T AT E443375 T1 ATE443375 T1 AT E443375T1
Authority
AT
Austria
Prior art keywords
energy recovery
boost logic
transistors
voltage
clock signal
Prior art date
Application number
AT05773123T
Other languages
English (en)
Inventor
Marios Papefthymiou
Visvesh Sathe
Conrad Ziesler
Original Assignee
Univ Michigan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Michigan filed Critical Univ Michigan
Application granted granted Critical
Publication of ATE443375T1 publication Critical patent/ATE443375T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0019—Arrangements for reducing power consumption by energy recovery or adiabatic operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dc-Dc Converters (AREA)
  • Generation Of Surge Voltage And Current (AREA)
  • Luminescent Compositions (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
AT05773123T 2004-06-15 2005-06-15 Boost-logik zur energierückgewinnung ATE443375T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US57971104P 2004-06-15 2004-06-15
PCT/US2005/021073 WO2006002075A1 (en) 2004-06-15 2005-06-15 Energy recovery boost logic

Publications (1)

Publication Number Publication Date
ATE443375T1 true ATE443375T1 (de) 2009-10-15

Family

ID=35262157

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05773123T ATE443375T1 (de) 2004-06-15 2005-06-15 Boost-logik zur energierückgewinnung

Country Status (7)

Country Link
US (1) US7355454B2 (de)
EP (1) EP1776760B1 (de)
JP (1) JP5107033B2 (de)
KR (1) KR101221776B1 (de)
AT (1) ATE443375T1 (de)
DE (1) DE602005016688D1 (de)
WO (1) WO2006002075A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7355905B2 (en) * 2005-07-01 2008-04-08 P.A. Semi, Inc. Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage
US7973565B2 (en) * 2007-05-23 2011-07-05 Cyclos Semiconductor, Inc. Resonant clock and interconnect architecture for digital devices with multiple clock networks
WO2011046979A2 (en) * 2009-10-12 2011-04-21 Cyclos Semiconductor, Inc. Method for selecting natural frequency in resonant clock distribution networks with no inductor overhead
US8633731B1 (en) * 2011-08-09 2014-01-21 Altera Corporation Programmable integrated circuit with thin-oxide passgates
TWI539749B (zh) 2015-03-31 2016-06-21 國立交通大學 能量回收系統及其回收方法
US9612614B2 (en) 2015-07-31 2017-04-04 International Business Machines Corporation Pulse-drive resonant clock with on-the-fly mode change
US9634654B2 (en) 2015-08-07 2017-04-25 International Business Machines Corporation Sequenced pulse-width adjustment in a resonant clocking circuit
US9568548B1 (en) 2015-10-14 2017-02-14 International Business Machines Corporation Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency stepping

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994002993A1 (en) * 1992-07-17 1994-02-03 Massachusetts Institute Of Technology Recovered energy logic circuits
CA2151850A1 (en) * 1994-07-18 1996-01-19 Thaddeus John Gabara Hot-clock adiabatic gate using multiple clock signals with different phases
US5504441A (en) * 1994-08-19 1996-04-02 International Business Machines Corporation Two-phase overlapping clocking technique for digital dynamic circuits
JP3313276B2 (ja) * 1995-03-15 2002-08-12 株式会社東芝 Ｍｏｓゲート回路及びその電源供給方法
KR100300050B1 (ko) * 1998-09-01 2001-09-06 김영환 비동기센싱차동로직회로
US5859548A (en) * 1996-07-24 1999-01-12 Lg Semicon Co., Ltd. Charge recycling differential logic (CRDL) circuit and devices using the same
JP3241619B2 (ja) * 1996-12-25 2001-12-25 シャープ株式会社 Ｃｍｏｓ論理回路
US5841299A (en) * 1997-02-06 1998-11-24 Intel Corporation Method and apparatus for implementing an adiabatic logic family
US5986476A (en) * 1997-08-08 1999-11-16 Intel Corporation Method and apparatus for implementing a dynamic adiabatic logic family
JPH11112297A (ja) * 1997-10-06 1999-04-23 Nec Corp ラッチ回路及びこのラッチ回路を有する半導体集積回路
JP4120082B2 (ja) * 1999-02-01 2008-07-16 ソニー株式会社 レベルシフト回路、これを用いたシフトレジスタおよびこれを搭載した液晶表示装置
JP4030213B2 (ja) * 1999-02-22 2008-01-09 株式会社ルネサステクノロジ 半導体回路装置
US7005893B1 (en) * 1999-07-19 2006-02-28 University Of Southern California High-performance clock-powered logic
US6777992B2 (en) 2002-04-04 2004-08-17 The Regents Of The University Of Michigan Low-power CMOS flip-flop

Also Published As

Publication number Publication date
US7355454B2 (en) 2008-04-08
KR20070020508A (ko) 2007-02-21
JP5107033B2 (ja) 2012-12-26
WO2006002075A1 (en) 2006-01-05
EP1776760B1 (de) 2009-09-16
KR101221776B1 (ko) 2013-01-11
DE602005016688D1 (de) 2009-10-29
JP2008503165A (ja) 2008-01-31
EP1776760A1 (de) 2007-04-25
US20060082387A1 (en) 2006-04-20

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