ATE468603T1 - Verfahren zur herstellung aufgerauhter platinschichten, und verfahren zur kondensatoren- herstellung, die diese aufgerauhten platinschichten enthalten - Google Patents

Verfahren zur herstellung aufgerauhter platinschichten, und verfahren zur kondensatoren- herstellung, die diese aufgerauhten platinschichten enthalten

Info

Publication number
ATE468603T1
ATE468603T1 AT99942541T AT99942541T ATE468603T1 AT E468603 T1 ATE468603 T1 AT E468603T1 AT 99942541 T AT99942541 T AT 99942541T AT 99942541 T AT99942541 T AT 99942541T AT E468603 T1 ATE468603 T1 AT E468603T1
Authority
AT
Austria
Prior art keywords
platinum
roughed
producing
platinum layers
substrate
Prior art date
Application number
AT99942541T
Other languages
English (en)
Inventor
Eugene Marsh
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE468603T1 publication Critical patent/ATE468603T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/694—Electrodes comprising noble metals or noble metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4432—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4432—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H10W20/4435—Noble-metal alloys
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/964—Roughened surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
AT99942541T 1998-08-27 1999-08-27 Verfahren zur herstellung aufgerauhter platinschichten, und verfahren zur kondensatoren- herstellung, die diese aufgerauhten platinschichten enthalten ATE468603T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/141,840 US6583022B1 (en) 1998-08-27 1998-08-27 Methods of forming roughened layers of platinum and methods of forming capacitors
PCT/US1999/019814 WO2000013216A1 (en) 1998-08-27 1999-08-27 Capacitors comprising roughened platinum layers, methods of forming roughened layers of platinum and methods of forming capacitors

Publications (1)

Publication Number Publication Date
ATE468603T1 true ATE468603T1 (de) 2010-06-15

Family

ID=22497502

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99942541T ATE468603T1 (de) 1998-08-27 1999-08-27 Verfahren zur herstellung aufgerauhter platinschichten, und verfahren zur kondensatoren- herstellung, die diese aufgerauhten platinschichten enthalten

Country Status (8)

Country Link
US (3) US6583022B1 (de)
EP (1) EP1108267B1 (de)
JP (1) JP3550361B2 (de)
KR (3) KR20030078967A (de)
AT (1) ATE468603T1 (de)
AU (1) AU5589699A (de)
DE (1) DE69942392D1 (de)
WO (1) WO2000013216A1 (de)

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US7098503B1 (en) 1998-08-27 2006-08-29 Micron Technology, Inc. Circuitry and capacitors comprising roughened platinum layers
US6284655B1 (en) 1998-09-03 2001-09-04 Micron Technology, Inc. Method for producing low carbon/oxygen conductive layers
US6323081B1 (en) 1998-09-03 2001-11-27 Micron Technology, Inc. Diffusion barrier layers and methods of forming same
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US6329286B1 (en) * 1999-04-27 2001-12-11 Micron Technology, Inc. Methods for forming conformal iridium layers on substrates
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US6429127B1 (en) * 2000-06-08 2002-08-06 Micron Technology, Inc. Methods for forming rough ruthenium-containing layers and structures/methods using same
US6660631B1 (en) 2000-08-31 2003-12-09 Micron Technology, Inc. Devices containing platinum-iridium films and methods of preparing such films and devices
US6642567B1 (en) * 2000-08-31 2003-11-04 Micron Technology, Inc. Devices containing zirconium-platinum-containing materials and methods for preparing such materials and devices
US7217615B1 (en) * 2000-08-31 2007-05-15 Micron Technology, Inc. Capacitor fabrication methods including forming a conductive layer
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US7700454B2 (en) 2001-07-24 2010-04-20 Samsung Electronics Co., Ltd. Methods of forming integrated circuit electrodes and capacitors by wrinkling a layer that includes a high percentage of impurities
US6576538B2 (en) * 2001-08-30 2003-06-10 Micron Technology, Inc. Technique for high efficiency metalorganic chemical vapor deposition
US6918960B2 (en) * 2001-11-28 2005-07-19 Micron Technology, Inc. CVD of PtRh with good adhesion and morphology
US6794704B2 (en) * 2002-01-16 2004-09-21 Micron Technology, Inc. Method for enhancing electrode surface area in DRAM cell capacitors
US7105065B2 (en) * 2002-04-25 2006-09-12 Micron Technology, Inc. Metal layer forming methods and capacitor electrode forming methods
US6881260B2 (en) * 2002-06-25 2005-04-19 Micron Technology, Inc. Process for direct deposition of ALD RhO2
KR100509161B1 (ko) * 2002-07-11 2005-08-23 주식회사 성진케미칼 도전성 고무패드층 및 폴리이미드층을 구비한 유리섬유 패드
US20040036129A1 (en) * 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
WO2004018091A1 (de) * 2002-08-23 2004-03-04 Hartmut Presting Mikrostrukturierter katalysatorkörper und verfahren zu dessen herstellung
US6830983B2 (en) * 2002-08-29 2004-12-14 Micron Technology, Inc. Method of making an oxygen diffusion barrier for semiconductor devices using platinum, rhodium, or iridium stuffed with silicon oxide
US6861355B2 (en) 2002-08-29 2005-03-01 Micron Technology, Inc. Metal plating using seed film
US6884691B2 (en) 2003-03-18 2005-04-26 Micron Technology, Inc. Method of forming a substrate having a surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms
US6855647B2 (en) * 2003-04-02 2005-02-15 Hewlett-Packard Development Company, L.P. Custom electrodes for molecular memory and logic devices
US7067454B2 (en) * 2003-04-09 2006-06-27 Honeywell International Inc. Low cost quick response catalyst system
US6737313B1 (en) * 2003-04-16 2004-05-18 Micron Technology, Inc. Surface treatment of an oxide layer to enhance adhesion of a ruthenium metal layer
US6838339B2 (en) * 2003-06-05 2005-01-04 Infineon Technologies Ag Area-efficient stack capacitor
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US7968488B2 (en) * 2006-04-18 2011-06-28 Southwest Research Institute Two-dimensional composite particle adapted for use as a catalyst and method of making same
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Also Published As

Publication number Publication date
EP1108267A1 (de) 2001-06-20
AU5589699A (en) 2000-03-21
JP2002524655A (ja) 2002-08-06
EP1108267B1 (de) 2010-05-19
KR20030078967A (ko) 2003-10-08
US6583022B1 (en) 2003-06-24
US6281161B1 (en) 2001-08-28
US5990559A (en) 1999-11-23
JP3550361B2 (ja) 2004-08-04
KR100451486B1 (ko) 2004-10-08
DE69942392D1 (de) 2010-07-01
KR20010053624A (ko) 2001-06-25
KR100432177B1 (ko) 2004-05-22
KR20030083748A (ko) 2003-10-30
WO2000013216A1 (en) 2000-03-09

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