ATE515059T1 - Verfahren zur vergrösserung des gütefaktors einer induktivität in einer halbleiteranordnung - Google Patents

Verfahren zur vergrösserung des gütefaktors einer induktivität in einer halbleiteranordnung

Info

Publication number
ATE515059T1
ATE515059T1 AT07735905T AT07735905T ATE515059T1 AT E515059 T1 ATE515059 T1 AT E515059T1 AT 07735905 T AT07735905 T AT 07735905T AT 07735905 T AT07735905 T AT 07735905T AT E515059 T1 ATE515059 T1 AT E515059T1
Authority
AT
Austria
Prior art keywords
inductivity
increase
quality factor
semiconductor arrangement
layer
Prior art date
Application number
AT07735905T
Other languages
English (en)
Inventor
Sebastien Jacqueline
Original Assignee
Ipdia
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ipdia filed Critical Ipdia
Application granted granted Critical
Publication of ATE515059T1 publication Critical patent/ATE515059T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/20—Inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks

Landscapes

  • Semiconductor Integrated Circuits (AREA)
AT07735905T 2006-05-18 2007-05-15 Verfahren zur vergrösserung des gütefaktors einer induktivität in einer halbleiteranordnung ATE515059T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP06300487 2006-05-18
PCT/IB2007/051835 WO2007135620A1 (en) 2006-05-18 2007-05-15 Method of increasing the quality factor of an inductor in a semiconductor device

Publications (1)

Publication Number Publication Date
ATE515059T1 true ATE515059T1 (de) 2011-07-15

Family

ID=38537538

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07735905T ATE515059T1 (de) 2006-05-18 2007-05-15 Verfahren zur vergrösserung des gütefaktors einer induktivität in einer halbleiteranordnung

Country Status (6)

Country Link
US (1) US20090267182A1 (de)
EP (1) EP2024990B1 (de)
JP (1) JP2009537980A (de)
CN (1) CN101449362B (de)
AT (1) ATE515059T1 (de)
WO (1) WO2007135620A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101101686B1 (ko) * 2010-01-07 2011-12-30 삼성전기주식회사 고주파 반도체 소자 및 그 제조방법
US8735986B2 (en) 2011-12-06 2014-05-27 International Business Machines Corporation Forming structures on resistive substrates
WO2015005934A1 (en) * 2013-07-12 2015-01-15 Hewlett-Packard Development Company, L.P. Thermal inkjet printhead stack with amorphous metal resistor
CN103426729A (zh) * 2013-08-29 2013-12-04 上海宏力半导体制造有限公司 提高整合被动器件电感器q值的方法
CN104517803A (zh) * 2013-09-27 2015-04-15 中芯国际集成电路制造(上海)有限公司 一种集成无源器件中去耦合电容结构及其制备方法
CN103956362A (zh) * 2014-05-20 2014-07-30 中国工程物理研究院电子工程研究所 基于图形化高能离子注入的低衬底损耗硅基集成电路及其制作方法
CN103972053A (zh) * 2014-05-29 2014-08-06 中国工程物理研究院电子工程研究所 一种图形化高能重离子注入的低损耗硅基射频无源器件的制作方法
US11501908B2 (en) * 2016-10-04 2022-11-15 Nanohenry, Inc. Miniature inductors and related circuit components and methods of making same
EP3327806B1 (de) * 2016-11-24 2021-07-21 Murata Integrated Passive Solutions Integriertes elektronisches bauteil für breitbandige vorspannung
US11289474B2 (en) 2020-04-20 2022-03-29 Globalfoundries U.S. Inc. Passive devices over polycrystalline semiconductor fins

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5650532A (en) * 1979-10-01 1981-05-07 Hitachi Ltd Manufacture of semiconductor device
JPH0358430A (ja) * 1989-07-27 1991-03-13 Toshiba Corp 半導体装置及びその製造方法
US5514902A (en) * 1993-09-16 1996-05-07 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having MOS transistor
US6093936A (en) * 1995-06-07 2000-07-25 Lsi Logic Corporation Integrated circuit with isolation of field oxidation by noble gas implantation
KR100205320B1 (ko) * 1996-10-25 1999-07-01 구본준 모스펫 및 그 제조방법
KR100232206B1 (ko) * 1996-12-26 1999-12-01 김영환 반도체 소자의 제조방법
JP3132439B2 (ja) * 1997-09-29 2001-02-05 日本電気株式会社 半導体装置の製造方法
US6046109A (en) * 1997-12-29 2000-04-04 Industrial Technology Research Institute Creation of local semi-insulating regions on semiconductor substrates
US6258688B1 (en) * 2000-03-15 2001-07-10 Taiwan Semiconductor Manufacturing Company Method to form a high Q inductor
US6534406B1 (en) * 2000-09-22 2003-03-18 Newport Fab, Llc Method for increasing inductance of on-chip inductors and related structure
JP2003078136A (ja) * 2001-09-05 2003-03-14 Sanyo Electric Co Ltd 半導体装置の製造方法
JP4671600B2 (ja) * 2002-12-27 2011-04-20 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7230316B2 (en) * 2002-12-27 2007-06-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having transferred integrated circuit
US7259077B2 (en) * 2004-04-29 2007-08-21 Sychip Inc. Integrated passive devices
JP5026257B2 (ja) * 2004-05-06 2012-09-12 エヌエックスピー ビー ヴィ 電子装置
JP4768972B2 (ja) * 2004-05-31 2011-09-07 ルネサスエレクトロニクス株式会社 インダクタ

Also Published As

Publication number Publication date
WO2007135620A1 (en) 2007-11-29
CN101449362A (zh) 2009-06-03
EP2024990A1 (de) 2009-02-18
EP2024990B1 (de) 2011-06-29
CN101449362B (zh) 2012-03-28
US20090267182A1 (en) 2009-10-29
JP2009537980A (ja) 2009-10-29

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