ATE530980T1 - Verfahren und vorrichtung zum multiplizieren von dezimalzahlen unter verwendung von hardware für binäre operationen - Google Patents

Verfahren und vorrichtung zum multiplizieren von dezimalzahlen unter verwendung von hardware für binäre operationen

Info

Publication number
ATE530980T1
ATE530980T1 AT07251933T AT07251933T ATE530980T1 AT E530980 T1 ATE530980 T1 AT E530980T1 AT 07251933 T AT07251933 T AT 07251933T AT 07251933 T AT07251933 T AT 07251933T AT E530980 T1 ATE530980 T1 AT E530980T1
Authority
AT
Austria
Prior art keywords
hardware
decimal
software
multiplying
carried out
Prior art date
Application number
AT07251933T
Other languages
English (en)
Inventor
Marius Cornea-Hasegan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE530980T1 publication Critical patent/ATE530980T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4915—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/4911—Decimal floating-point representation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
AT07251933T 2006-05-11 2007-05-10 Verfahren und vorrichtung zum multiplizieren von dezimalzahlen unter verwendung von hardware für binäre operationen ATE530980T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/432,813 US7912890B2 (en) 2006-05-11 2006-05-11 Method and apparatus for decimal number multiplication using hardware for binary number operations

Publications (1)

Publication Number Publication Date
ATE530980T1 true ATE530980T1 (de) 2011-11-15

Family

ID=38328456

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07251933T ATE530980T1 (de) 2006-05-11 2007-05-10 Verfahren und vorrichtung zum multiplizieren von dezimalzahlen unter verwendung von hardware für binäre operationen

Country Status (4)

Country Link
US (1) US7912890B2 (de)
EP (1) EP1857925B1 (de)
AT (1) ATE530980T1 (de)
ES (1) ES2373576T3 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7707233B2 (en) * 2005-05-19 2010-04-27 Intel Corporation Coverting a number from a first base to a second base
US7814138B2 (en) * 2006-05-11 2010-10-12 Intel Corporation Method and apparatus for decimal number addition using hardware for binary number operations
US8051117B2 (en) 2007-04-26 2011-11-01 International Business Machines Corporation Shift significand of decimal floating point data
US20080270495A1 (en) * 2007-04-26 2008-10-30 International Business Machines Corporation Insert/extract biased exponent of decimal floating point data
US8190664B2 (en) * 2007-04-26 2012-05-29 International Business Machines Corporation Employing a mask field of an instruction to encode a sign of a result of the instruction
US8572141B2 (en) * 2008-03-19 2013-10-29 International Business Machines Corporation Execution of fixed point instructions using a decimal floating point unit
US20100023569A1 (en) * 2008-07-22 2010-01-28 Daw Shien Scientific Research & Development, Inc. Method for computerized arithmetic operations
US8311213B2 (en) * 2009-12-07 2012-11-13 Mitsubishi Electric Research Laboratories, Inc. Method for determining functions applied to signals
US8416955B2 (en) * 2009-12-07 2013-04-09 Mitsubishi Electric Research Laboratories, Inc. Method for determining functions applied to signals
US9128759B2 (en) 2012-11-27 2015-09-08 International Business Machines Corporation Decimal multi-precision overflow and tininess detection
US10109014B1 (en) 2013-03-15 2018-10-23 Allstate Insurance Company Pre-calculated insurance premiums with wildcarding
US10241757B2 (en) 2016-09-30 2019-03-26 International Business Machines Corporation Decimal shift and divide instruction
US10127015B2 (en) 2016-09-30 2018-11-13 International Business Machines Corporation Decimal multiply and shift instruction
US10310815B1 (en) 2017-11-30 2019-06-04 International Business Machines Corporation Parallel decimal multiplication hardware with a 3X generator
CN111260070B (zh) * 2018-11-30 2022-11-29 上海寒武纪信息科技有限公司 运算方法、装置及相关产品
CN111258641B (zh) * 2018-11-30 2022-12-09 上海寒武纪信息科技有限公司 运算方法、装置及相关产品
JP7304295B2 (ja) * 2020-01-09 2023-07-06 日立Astemo株式会社 演算装置、認識装置および制御装置
CN112506935B (zh) * 2020-12-21 2023-08-29 北京百度网讯科技有限公司 数据处理方法、装置、电子设备、存储介质及程序产品
US12578925B2 (en) * 2022-02-25 2026-03-17 International Business Machines Corporation Dynamic algorithm selection

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001042907A2 (en) * 1999-12-10 2001-06-14 Broadcom Corporation Apparatus and method for reducing precision of data
US7395297B2 (en) * 2001-05-25 2008-07-01 Sun Microsystems, Inc. Floating point system that represents status flag information within a floating point operand
US7069289B2 (en) * 2001-05-25 2006-06-27 Sun Microsystems, Inc. Floating point unit for detecting and representing inexact computations without flags or traps
US7546328B2 (en) * 2004-08-31 2009-06-09 Wisconsin Alumni Research Foundation Decimal floating-point adder
US7519647B2 (en) * 2005-02-09 2009-04-14 International Business Machines Corporation System and method for providing a decimal multiply algorithm using a double adder
US7519645B2 (en) 2005-02-10 2009-04-14 International Business Machines Corporation System and method for performing decimal floating point addition
US7747669B2 (en) * 2006-03-31 2010-06-29 Intel Corporation Rounding of binary integers
US7814138B2 (en) 2006-05-11 2010-10-12 Intel Corporation Method and apparatus for decimal number addition using hardware for binary number operations

Also Published As

Publication number Publication date
EP1857925B1 (de) 2011-10-26
US7912890B2 (en) 2011-03-22
EP1857925A2 (de) 2007-11-21
US20070266072A1 (en) 2007-11-15
EP1857925A3 (de) 2008-12-10
ES2373576T3 (es) 2012-02-06

Similar Documents

Publication Publication Date Title
EP1857925A3 (de) Verfahren und Vorrichtung zum Multiplizieren von Dezimalzahlen unter Verwendung von Hardware für binäre Operationen
ATE522857T1 (de) Verfahren, vorrichtung, server, system und computerprogrammprodukt zur verwendung mit prädiktiver texteingabe
ATE323988T1 (de) Verfahren,vorrichtung und computerprogramme zur erzeugung und/oder verwendungkonditionaler elektronischer signaturen zur meldung von statusänderungen
WO2019083737A8 (en) System and method for analyzing binary code for malware classification using artificial neural network techniques
DE60238757D1 (de) Verfahren und vorrichtung zum berechnen der signalkorrelation
ATE513275T1 (de) Produkt-summen-operations-schaltung und verfahren
ATE339728T1 (de) Vorrichtung und verfahren zum umsetzen in eine transformierte darstellung oder zum inversen umsetzen der transformierten darstellung
ATE357016T1 (de) Verfahren und vorrichtung zum modularen multiplizieren und rechenwerk zum modularen multiplizieren
WO2007082272A3 (en) Transforms with common factors
ATE401568T1 (de) Verfahren zur identifizierung von objekten mittels eines optisches spektrometers und eines transportsystems
GB2574542A (en) Automated document analysis for varying natural languages
TW200736989A (en) Pre-saturating fixed-point multiplier
ATE552550T1 (de) Vorrichtung und verfahren zur durchführung einer betragsdetektion für arithmetische operationen
MX2007006388A (es) Sistema y metodo de etiquetado basado en el mercado.
DE50201579D1 (de) Verfahren und vorrichtung zum verarbeiten von zeitdiskreten audio-abtastwerten
WO2020239910A3 (en) An intelligent computer aided decision support system
DE602006012292D1 (de) Verfahren zur datenverarbeitung mit modularer potenzierung und dazugehörige vorrichtung
EP4162389C0 (de) Elektronische vorrichtung zur umwandlung von handschrift in text und verfahren dafür
ATE427904T1 (de) Verfahren zum positionieren von plattenfírmigen gegenstanden in einer verarbeitungsmaschine
ATE416409T1 (de) Verfahren und vorrichtung zum fliegen eines sich aufbäumenden flugzeugs
DE602008002994D1 (de) Verfahren und Vorrichtung zur Aktivierung und Deaktivierung eines Sperrmodus auf einem tragbaren elektronischen Gerät
ATE467207T1 (de) Vervahren zum erzeugen eines abdrucks eines audiosignals
ATE553473T1 (de) Verfahren und vorrichtung zur sinusförmigen audiocodierung
GB2423385B (en) Data processing apparatus and method for determining an initial estimate of a result value of a reciprocal operation
ATE423411T1 (de) Vorrichtung und verfahren zum bestimmen eines korrelationswertes

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties