ATE531077T1 - Belastungsfreies zusammengesetztes substrat und verfahren zur herstellung eines solchen zusammengesetzten substrats - Google Patents
Belastungsfreies zusammengesetztes substrat und verfahren zur herstellung eines solchen zusammengesetzten substratsInfo
- Publication number
- ATE531077T1 ATE531077T1 AT03772538T AT03772538T ATE531077T1 AT E531077 T1 ATE531077 T1 AT E531077T1 AT 03772538 T AT03772538 T AT 03772538T AT 03772538 T AT03772538 T AT 03772538T AT E531077 T1 ATE531077 T1 AT E531077T1
- Authority
- AT
- Austria
- Prior art keywords
- composite substrate
- stress
- producing
- carrier
- free
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1922—Preparing SOI wafers using silicon etch back techniques, e.g. BESOI or ELTRAN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Landscapes
- Element Separation (AREA)
- Thin Film Transistor (AREA)
- Laminated Bodies (AREA)
- Recrystallisation Techniques (AREA)
- Compositions Of Oxide Ceramics (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP02080620 | 2002-12-19 | ||
| PCT/IB2003/005409 WO2004057663A1 (en) | 2002-12-19 | 2003-11-20 | Stress-free composite substrate and method of manufacturing such a composite substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE531077T1 true ATE531077T1 (de) | 2011-11-15 |
Family
ID=32668873
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT03772538T ATE531077T1 (de) | 2002-12-19 | 2003-11-20 | Belastungsfreies zusammengesetztes substrat und verfahren zur herstellung eines solchen zusammengesetzten substrats |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20060118817A1 (de) |
| EP (1) | EP1576662B1 (de) |
| JP (1) | JP2006511075A (de) |
| KR (1) | KR20050084450A (de) |
| AT (1) | ATE531077T1 (de) |
| AU (1) | AU2003280168A1 (de) |
| TW (1) | TW200421422A (de) |
| WO (1) | WO2004057663A1 (de) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7253125B1 (en) | 2004-04-16 | 2007-08-07 | Novellus Systems, Inc. | Method to improve mechanical strength of low-k dielectric film using modulated UV exposure |
| US9659769B1 (en) | 2004-10-22 | 2017-05-23 | Novellus Systems, Inc. | Tensile dielectric films using UV curing |
| US7790633B1 (en) | 2004-10-26 | 2010-09-07 | Novellus Systems, Inc. | Sequential deposition/anneal film densification method |
| KR100664986B1 (ko) | 2004-10-29 | 2007-01-09 | 삼성전기주식회사 | 나노로드를 이용한 질화물계 반도체 소자 및 그 제조 방법 |
| US20060157898A1 (en) * | 2005-01-18 | 2006-07-20 | International Business Machines Corporation | Imprint reference template for multilayer or multipattern registration and method therefor |
| US7510982B1 (en) | 2005-01-31 | 2009-03-31 | Novellus Systems, Inc. | Creation of porosity in low-k films by photo-disassociation of imbedded nanoparticles |
| TWI345082B (en) * | 2005-03-18 | 2011-07-11 | Hon Hai Prec Ind Co Ltd | Method for manufacturing color filter |
| US8889233B1 (en) | 2005-04-26 | 2014-11-18 | Novellus Systems, Inc. | Method for reducing stress in porous dielectric films |
| US8454750B1 (en) | 2005-04-26 | 2013-06-04 | Novellus Systems, Inc. | Multi-station sequential curing of dielectric films |
| US8282768B1 (en) | 2005-04-26 | 2012-10-09 | Novellus Systems, Inc. | Purging of porogen from UV cure chamber |
| US8137465B1 (en) | 2005-04-26 | 2012-03-20 | Novellus Systems, Inc. | Single-chamber sequential curing of semiconductor wafers |
| US8980769B1 (en) | 2005-04-26 | 2015-03-17 | Novellus Systems, Inc. | Multi-station sequential curing of dielectric films |
| US8946674B2 (en) | 2005-08-31 | 2015-02-03 | University Of Florida Research Foundation, Inc. | Group III-nitrides on Si substrates using a nanostructured interlayer |
| US8222057B2 (en) | 2006-08-29 | 2012-07-17 | University Of Florida Research Foundation, Inc. | Crack free multilayered devices, methods of manufacture thereof and articles comprising the same |
| US7851232B2 (en) | 2006-10-30 | 2010-12-14 | Novellus Systems, Inc. | UV treatment for carbon-containing low-k dielectric repair in semiconductor processing |
| US8465991B2 (en) | 2006-10-30 | 2013-06-18 | Novellus Systems, Inc. | Carbon containing low-k dielectric constant recovery using UV treatment |
| US10037905B2 (en) | 2009-11-12 | 2018-07-31 | Novellus Systems, Inc. | UV and reducing treatment for K recovery and surface clean in semiconductor processing |
| US7906174B1 (en) | 2006-12-07 | 2011-03-15 | Novellus Systems, Inc. | PECVD methods for producing ultra low-k dielectric films using UV treatment |
| KR100840785B1 (ko) * | 2007-02-16 | 2008-06-23 | 삼성전자주식회사 | 스택형 반도체 소자에서 단결정 실리콘 패턴 형성 방법. |
| FR2914493B1 (fr) * | 2007-03-28 | 2009-08-07 | Soitec Silicon On Insulator | Substrat demontable. |
| US8242028B1 (en) | 2007-04-03 | 2012-08-14 | Novellus Systems, Inc. | UV treatment of etch stop and hard mask films for selectivity and hermeticity enhancement |
| US7622162B1 (en) * | 2007-06-07 | 2009-11-24 | Novellus Systems, Inc. | UV treatment of STI films for increasing tensile stress |
| US8211510B1 (en) | 2007-08-31 | 2012-07-03 | Novellus Systems, Inc. | Cascaded cure approach to fabricate highly tensile silicon nitride films |
| JP5496453B2 (ja) * | 2007-11-28 | 2014-05-21 | ケイ・エス・ティ・ワ−ルド株式会社 | 複数個の空洞を有する積層構造ウエーハ及びその製造方法 |
| JP5201967B2 (ja) * | 2007-12-10 | 2013-06-05 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法および半導体装置の作製方法 |
| US9050623B1 (en) | 2008-09-12 | 2015-06-09 | Novellus Systems, Inc. | Progressive UV cure |
| US9847221B1 (en) | 2016-09-29 | 2017-12-19 | Lam Research Corporation | Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing |
| FR3076292B1 (fr) * | 2017-12-28 | 2020-01-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de transfert d'une couche utile sur un substrat support |
| KR102555986B1 (ko) * | 2018-10-29 | 2023-07-14 | 삼성디스플레이 주식회사 | 윈도우 기판 및 이를 포함하는 플렉서블 표시 장치 |
| FR3091032B1 (fr) * | 2018-12-20 | 2020-12-11 | Soitec Silicon On Insulator | Procédé de transfert d’une couche superficielle sur des cavités |
| TWI749928B (zh) * | 2020-12-01 | 2021-12-11 | 合晶科技股份有限公司 | 複合基板結構及其製造方法 |
| US11829077B2 (en) * | 2020-12-11 | 2023-11-28 | Kla Corporation | System and method for determining post bonding overlay |
| GB2637765A (en) * | 2024-02-02 | 2025-08-06 | Ligentec Sa | Fabrication method |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5552345A (en) * | 1993-09-22 | 1996-09-03 | Harris Corporation | Die separation method for silicon on diamond circuit structures |
| US5949144A (en) * | 1996-05-20 | 1999-09-07 | Harris Corporation | Pre-bond cavity air bridge |
| DE19840421C2 (de) * | 1998-06-22 | 2000-05-31 | Fraunhofer Ges Forschung | Verfahren zur Fertigung von dünnen Substratschichten und eine dafür geeignete Substratanordnung |
| JP4200626B2 (ja) * | 2000-02-28 | 2008-12-24 | 株式会社デンソー | 絶縁ゲート型パワー素子の製造方法 |
| JP3957038B2 (ja) * | 2000-11-28 | 2007-08-08 | シャープ株式会社 | 半導体基板及びその作製方法 |
| US6544863B1 (en) * | 2001-08-21 | 2003-04-08 | Calient Networks, Inc. | Method of fabricating semiconductor wafers having multiple height subsurface layers |
-
2003
- 2003-11-20 AU AU2003280168A patent/AU2003280168A1/en not_active Abandoned
- 2003-11-20 EP EP03772538A patent/EP1576662B1/de not_active Expired - Lifetime
- 2003-11-20 US US10/539,260 patent/US20060118817A1/en not_active Abandoned
- 2003-11-20 JP JP2004561754A patent/JP2006511075A/ja not_active Withdrawn
- 2003-11-20 KR KR1020057011643A patent/KR20050084450A/ko not_active Ceased
- 2003-11-20 AT AT03772538T patent/ATE531077T1/de not_active IP Right Cessation
- 2003-11-20 WO PCT/IB2003/005409 patent/WO2004057663A1/en not_active Ceased
- 2003-12-16 TW TW092135574A patent/TW200421422A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006511075A (ja) | 2006-03-30 |
| WO2004057663A1 (en) | 2004-07-08 |
| EP1576662B1 (de) | 2011-10-26 |
| AU2003280168A1 (en) | 2004-07-14 |
| KR20050084450A (ko) | 2005-08-26 |
| US20060118817A1 (en) | 2006-06-08 |
| TW200421422A (en) | 2004-10-16 |
| EP1576662A1 (de) | 2005-09-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |