ATE534759T1 - Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial - Google Patents

Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial

Info

Publication number
ATE534759T1
ATE534759T1 AT03702513T AT03702513T ATE534759T1 AT E534759 T1 ATE534759 T1 AT E534759T1 AT 03702513 T AT03702513 T AT 03702513T AT 03702513 T AT03702513 T AT 03702513T AT E534759 T1 ATE534759 T1 AT E534759T1
Authority
AT
Austria
Prior art keywords
substrate
free
nucleation layer
epitaxial growth
growth temperature
Prior art date
Application number
AT03702513T
Other languages
English (en)
Inventor
Bruno Ghyselen
Fabrice Letertre
Carlos Mazure
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Application granted granted Critical
Publication of ATE534759T1 publication Critical patent/ATE534759T1/de

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
AT03702513T 2002-01-22 2003-01-21 Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial ATE534759T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0200762A FR2835096B1 (fr) 2002-01-22 2002-01-22 Procede de fabrication d'un substrat auto-porte en materiau semi-conducteur monocristallin
PCT/EP2003/000693 WO2003062507A2 (en) 2002-01-22 2003-01-21 Method for manufacturing a free-standing substrate made of monocrystalline semi-conductor material

Publications (1)

Publication Number Publication Date
ATE534759T1 true ATE534759T1 (de) 2011-12-15

Family

ID=27589549

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03702513T ATE534759T1 (de) 2002-01-22 2003-01-21 Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial

Country Status (9)

Country Link
US (1) US6964914B2 (de)
EP (1) EP1468128B1 (de)
JP (1) JP2005515150A (de)
KR (1) KR100760066B1 (de)
CN (1) CN100343424C (de)
AT (1) ATE534759T1 (de)
FR (1) FR2835096B1 (de)
TW (1) TWI259221B (de)
WO (1) WO2003062507A2 (de)

Cited By (4)

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US8436363B2 (en) 2011-02-03 2013-05-07 Soitec Metallic carrier for layer transfer and methods for forming the same
US8916483B2 (en) 2012-03-09 2014-12-23 Soitec Methods of forming semiconductor structures including III-V semiconductor material using substrates comprising molybdenum
US9082948B2 (en) 2011-02-03 2015-07-14 Soitec Methods of fabricating semiconductor structures using thermal spray processes, and semiconductor structures fabricated using such methods
US9142412B2 (en) 2011-02-03 2015-09-22 Soitec Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods

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FR2857983B1 (fr) * 2003-07-24 2005-09-02 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
US7538010B2 (en) * 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
FR2858461B1 (fr) * 2003-07-30 2005-11-04 Soitec Silicon On Insulator Realisation d'une structure comprenant une couche protegeant contre des traitements chimiques
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DE10355600B4 (de) 2003-11-28 2021-06-24 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Halbleiterchip und Verfahren zur Herstellung von Halbleiterchips
US7033912B2 (en) * 2004-01-22 2006-04-25 Cree, Inc. Silicon carbide on diamond substrates and related devices and methods
US7612390B2 (en) * 2004-02-05 2009-11-03 Cree, Inc. Heterojunction transistors including energy barriers
FR2867310B1 (fr) * 2004-03-05 2006-05-26 Soitec Silicon On Insulator Technique d'amelioration de la qualite d'une couche mince prelevee
FR2868204B1 (fr) * 2004-03-25 2006-06-16 Commissariat Energie Atomique Substrat de type semi-conducteur sur isolant comportant une couche enterree en carbone diamant
US7332365B2 (en) * 2004-05-18 2008-02-19 Cree, Inc. Method for fabricating group-III nitride devices and devices fabricated using method
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US20060163584A1 (en) * 2005-01-26 2006-07-27 Robert Linares Boron-doped diamond semiconductor
FR2883659B1 (fr) * 2005-03-24 2007-06-22 Soitec Silicon On Insulator Procede de fabrication d'une hetero-structure comportant au moins une couche epaisse de materiau semi-conducteur
US7422634B2 (en) * 2005-04-07 2008-09-09 Cree, Inc. Three inch silicon carbide wafer with low warp, bow, and TTV
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US7605055B2 (en) * 2005-06-02 2009-10-20 S.O.I.Tec Silicon On Insulator Technologies Wafer with diamond layer
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US7601271B2 (en) * 2005-11-28 2009-10-13 S.O.I.Tec Silicon On Insulator Technologies Process and equipment for bonding by molecular adhesion
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US7592211B2 (en) * 2006-01-17 2009-09-22 Cree, Inc. Methods of fabricating transistors including supported gate electrodes
US7709269B2 (en) 2006-01-17 2010-05-04 Cree, Inc. Methods of fabricating transistors including dielectrically-supported gate electrodes
JP5042506B2 (ja) * 2006-02-16 2012-10-03 信越化学工業株式会社 半導体基板の製造方法
JP2007227415A (ja) 2006-02-21 2007-09-06 Shin Etsu Chem Co Ltd 貼り合わせ基板の製造方法および貼り合わせ基板
TW200802544A (en) * 2006-04-25 2008-01-01 Osram Opto Semiconductors Gmbh Composite substrate and method for making the same
TWI334164B (en) * 2006-06-07 2010-12-01 Ind Tech Res Inst Method of manufacturing nitride semiconductor substrate and composite material substrate
CN100505164C (zh) * 2006-06-28 2009-06-24 财团法人工业技术研究院 氮化物半导体衬底的制造方法及复合材料衬底
FR2905799B1 (fr) 2006-09-12 2008-12-26 Soitec Silicon On Insulator Realisation d'un substrat en gan
CN100505165C (zh) * 2006-12-01 2009-06-24 东莞市中镓半导体科技有限公司 一种制备氮化镓单晶衬底的方法
US7943485B2 (en) * 2007-01-22 2011-05-17 Group4 Labs, Llc Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof
JP4290745B2 (ja) * 2007-03-16 2009-07-08 豊田合成株式会社 Ｉｉｉ−ｖ族半導体素子の製造方法
FR2914494A1 (fr) * 2007-03-28 2008-10-03 Soitec Silicon On Insulator Procede de report d'une couche mince de materiau
TWI437696B (zh) 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
KR101460086B1 (ko) 2009-12-15 2014-11-10 소이텍 기판의 재활용 공정
FR2961948B1 (fr) * 2010-06-23 2012-08-03 Soitec Silicon On Insulator Procede de traitement d'une piece en materiau compose
FR2975222A1 (fr) * 2011-05-10 2012-11-16 Soitec Silicon On Insulator Procede de fabrication d'un substrat semiconducteur
FR2977069B1 (fr) 2011-06-23 2014-02-07 Soitec Silicon On Insulator Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire
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KR101420265B1 (ko) * 2011-10-21 2014-07-21 주식회사루미지엔테크 기판 제조 방법
FR2985601B1 (fr) * 2012-01-06 2016-06-03 Soitec Silicon On Insulator Procede de fabrication d'un substrat et structure semiconducteur
FR3027250B1 (fr) * 2014-10-17 2019-05-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de collage direct via des couches metalliques peu rugueuses
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JP6544166B2 (ja) 2015-09-14 2019-07-17 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
JP6515757B2 (ja) 2015-09-15 2019-05-22 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
JP6582779B2 (ja) 2015-09-15 2019-10-02 信越化学工業株式会社 ＳｉＣ複合基板の製造方法
US10186630B2 (en) * 2016-08-02 2019-01-22 QMAT, Inc. Seed wafer for GaN thickening using gas- or liquid-phase epitaxy
CN106783998A (zh) * 2016-12-16 2017-05-31 中国电子科技集团公司第五十五研究所 一种基于金刚石衬底的氮化镓高电子迁移率晶体管及其制备方法
IL253085B (en) * 2017-06-20 2021-06-30 Elta Systems Ltd Gallium nitride semiconductor structure and process for fabricating thereof
US10692752B2 (en) 2017-06-20 2020-06-23 Elta Systems Ltd. Gallium nitride semiconductor structure and process for fabricating thereof
FR3079531B1 (fr) 2018-03-28 2022-03-18 Soitec Silicon On Insulator Procede de fabrication d'une couche monocristalline de materiau pzt et substrat pour croissance par epitaxie d'une couche monocristalline de materiau pzt
FR3079532B1 (fr) * 2018-03-28 2022-03-25 Soitec Silicon On Insulator Procede de fabrication d'une couche monocristalline de materiau ain et substrat pour croissance par epitaxie d'une couche monocristalline de materiau ain
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8436363B2 (en) 2011-02-03 2013-05-07 Soitec Metallic carrier for layer transfer and methods for forming the same
US9082948B2 (en) 2011-02-03 2015-07-14 Soitec Methods of fabricating semiconductor structures using thermal spray processes, and semiconductor structures fabricated using such methods
US9142412B2 (en) 2011-02-03 2015-09-22 Soitec Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods
US9202741B2 (en) 2011-02-03 2015-12-01 Soitec Metallic carrier for layer transfer and methods for forming the same
US8916483B2 (en) 2012-03-09 2014-12-23 Soitec Methods of forming semiconductor structures including III-V semiconductor material using substrates comprising molybdenum
US9716148B2 (en) 2012-03-09 2017-07-25 Soitec Methods of forming semiconductor structures including III-V semiconductor material using substrates comprising molybdenum, and structures formed by such methods

Also Published As

Publication number Publication date
KR20040077773A (ko) 2004-09-06
EP1468128B1 (de) 2011-11-23
CN1636087A (zh) 2005-07-06
JP2005515150A (ja) 2005-05-26
TW200409837A (en) 2004-06-16
US6964914B2 (en) 2005-11-15
CN100343424C (zh) 2007-10-17
KR100760066B1 (ko) 2007-09-18
US20040023468A1 (en) 2004-02-05
FR2835096B1 (fr) 2005-02-18
FR2835096A1 (fr) 2003-07-25
EP1468128A2 (de) 2004-10-20
WO2003062507A2 (en) 2003-07-31
WO2003062507A3 (en) 2004-01-15
TWI259221B (en) 2006-08-01

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