ATE542237T1 - Verfahren zur übertragung mit einem ferroelektrischen substrat - Google Patents

Verfahren zur übertragung mit einem ferroelektrischen substrat

Info

Publication number
ATE542237T1
ATE542237T1 AT09731294T AT09731294T ATE542237T1 AT E542237 T1 ATE542237 T1 AT E542237T1 AT 09731294 T AT09731294 T AT 09731294T AT 09731294 T AT09731294 T AT 09731294T AT E542237 T1 ATE542237 T1 AT E542237T1
Authority
AT
Austria
Prior art keywords
substrate
components
transmission
layer
ferroelectric substrate
Prior art date
Application number
AT09731294T
Other languages
English (en)
Inventor
Jean-Sebastien Moulet
Cioccio Lea Di
Marion Migette
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Application granted granted Critical
Publication of ATE542237T1 publication Critical patent/ATE542237T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/141—Associated with semiconductor wafer handling includes means for gripping wafer

Landscapes

  • Semiconductor Memories (AREA)
  • Laminated Bodies (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Inorganic Insulating Materials (AREA)
AT09731294T 2008-04-07 2009-04-03 Verfahren zur übertragung mit einem ferroelektrischen substrat ATE542237T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0852302A FR2929758B1 (fr) 2008-04-07 2008-04-07 Procede de transfert a l'aide d'un substrat ferroelectrique
PCT/EP2009/054007 WO2009124886A1 (fr) 2008-04-07 2009-04-03 Procede de transfert a l'aide d'un substrat ferroelectrique

Publications (1)

Publication Number Publication Date
ATE542237T1 true ATE542237T1 (de) 2012-02-15

Family

ID=40118822

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09731294T ATE542237T1 (de) 2008-04-07 2009-04-03 Verfahren zur übertragung mit einem ferroelektrischen substrat

Country Status (6)

Country Link
US (1) US8951809B2 (de)
EP (1) EP2263251B1 (de)
JP (2) JP2011517103A (de)
AT (1) ATE542237T1 (de)
FR (1) FR2929758B1 (de)
WO (1) WO2009124886A1 (de)

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FR3078822B1 (fr) * 2018-03-12 2020-02-28 Soitec Procede de preparation d’une couche mince de materiau ferroelectrique a base d’alcalin
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FR3160509B1 (fr) * 2024-03-22 2026-03-20 Soitec Silicon On Insulator Procédé de fabrication d’une couche ferroélectrique reportée sur un substrat et de polarisation à homogénéité améliorée

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Also Published As

Publication number Publication date
EP2263251B1 (de) 2012-01-18
FR2929758A1 (fr) 2009-10-09
WO2009124886A1 (fr) 2009-10-15
JP2011517103A (ja) 2011-05-26
US20110104829A1 (en) 2011-05-05
FR2929758B1 (fr) 2011-02-11
JP2015092632A (ja) 2015-05-14
EP2263251A1 (de) 2010-12-22
US8951809B2 (en) 2015-02-10

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