ATE542300T1 - Zeit-digital-wandler und vollständig digitaler phasenregelkreis - Google Patents

Zeit-digital-wandler und vollständig digitaler phasenregelkreis

Info

Publication number
ATE542300T1
ATE542300T1 AT09177425T AT09177425T ATE542300T1 AT E542300 T1 ATE542300 T1 AT E542300T1 AT 09177425 T AT09177425 T AT 09177425T AT 09177425 T AT09177425 T AT 09177425T AT E542300 T1 ATE542300 T1 AT E542300T1
Authority
AT
Austria
Prior art keywords
signal
phase
converter
digital
locked loop
Prior art date
Application number
AT09177425T
Other languages
English (en)
Inventor
Do-Hwan Oh
Kyo-Jin Choo
Deog-Kyoon Jeong
Original Assignee
Samsung Electronics Co Ltd
Univ Seoul Nat R & Db Found
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd, Univ Seoul Nat R & Db Found filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of ATE542300T1 publication Critical patent/ATE542300T1/de

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
AT09177425T 2008-12-01 2009-11-30 Zeit-digital-wandler und vollständig digitaler phasenregelkreis ATE542300T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11869308P 2008-12-01 2008-12-01
KR1020090076780A KR101632657B1 (ko) 2008-12-01 2009-08-19 타임투디지털 컨버터 및 디지털 위상 고정 루프

Publications (1)

Publication Number Publication Date
ATE542300T1 true ATE542300T1 (de) 2012-02-15

Family

ID=42363092

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09177425T ATE542300T1 (de) 2008-12-01 2009-11-30 Zeit-digital-wandler und vollständig digitaler phasenregelkreis

Country Status (3)

Country Link
KR (1) KR101632657B1 (de)
CN (1) CN101753142B (de)
AT (1) ATE542300T1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8193963B2 (en) * 2010-09-02 2012-06-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for time to digital conversion with calibration and correction loops
KR101300828B1 (ko) * 2010-12-23 2013-08-29 건국대학교 산학협력단 Ｓａｒ 기법을 이용한 타임-투-디지털 컨버터 및 그 방법
CN102832943B (zh) * 2011-06-15 2015-06-03 联发科技（新加坡）私人有限公司 时间数字转换器
CN102291138B (zh) * 2011-07-08 2013-11-27 东南大学 一种随机时间-数字转换器
CN102957422B (zh) * 2011-08-30 2015-06-03 中国科学院电子学研究所 一种数字延时锁定环电路
EP2837097A4 (de) * 2012-04-10 2015-12-23 Intel Corp Rückführung eines zeit-digital-wandlers
KR101278109B1 (ko) * 2012-04-19 2013-06-24 서울대학교산학협력단 낮은 롱텀 지터를 갖는 디지털 위상 고정 루프
CN104303420B (zh) * 2012-05-30 2017-12-26 英特尔公司 模数转换器
KR101278111B1 (ko) * 2013-04-12 2013-06-24 서울대학교산학협력단 타임 디지털 컨버터
GB2532015B (en) * 2014-11-04 2018-12-26 Cirrus Logic Int Semiconductor Ltd Improved analogue-to-digital convertor
WO2016124226A1 (en) 2015-02-03 2016-08-11 Huawei Technologies Co., Ltd. Time-to-digital converter
US9577684B1 (en) * 2015-11-25 2017-02-21 Intel IP Corporation High frequency time interleaved digital to time converter (DTC)
KR101722860B1 (ko) * 2015-12-09 2017-04-03 한양대학교 산학협력단 신호의 상승 에지와 하강 에지를 이용하여 높은 대역폭을 가지는 디지털 위상 동기 루프
DE112017007155T5 (de) * 2017-03-02 2019-11-28 Intel IP Corporation Zeit-zu-digital-wandler, digitale phasenregelschleife, verfahren zum betreiben eines zeit-zu-digital-wandlers und verfahren für eine digitale phasenregelschleife
WO2019017864A1 (en) * 2017-07-17 2019-01-24 Intel IP Corporation METHOD AND SYSTEM FOR CALIBRATING NON-LINEARITY OF THE PHASES OF A DIGITAL TIME CONVERTER
US10520901B2 (en) * 2018-02-23 2019-12-31 Qualcomm Incorporated Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation
US10348282B1 (en) * 2018-07-31 2019-07-09 Cirrus Logic, Inc. Modulators
CN110836832B (zh) * 2019-11-20 2022-03-29 苏州萃智光电设备有限公司 Tdc控制系统、方法和膜厚检测装置
CN112054800B (zh) * 2020-08-03 2023-08-08 博流智能科技（南京）有限公司 数字时间转换方法、数字时间转换器以及数字锁相环
CN115016243B (zh) * 2022-05-12 2023-03-10 北京大学 一种随机型时间数字转换器的线性度增强方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429693B1 (en) * 2000-06-30 2002-08-06 Texas Instruments Incorporated Digital fractional phase detector
KR100750126B1 (ko) * 2005-08-29 2007-08-21 삼성전자주식회사 위상 동기 루프 회로 및 위상 동기 루프 제어 방법
US7332973B2 (en) * 2005-11-02 2008-02-19 Skyworks Solutions, Inc. Circuit and method for digital phase-frequency error detection
TWI328932B (en) * 2006-11-10 2010-08-11 Ind Tech Res Inst Cycle time to digital converter
KR100852180B1 (ko) * 2006-11-24 2008-08-13 삼성전자주식회사 타임투디지털컨버터
JP2008160594A (ja) * 2006-12-25 2008-07-10 Sharp Corp 時間デジタル変換装置およびデジタル位相同期ループ装置、受信機

Also Published As

Publication number Publication date
CN101753142A (zh) 2010-06-23
CN101753142B (zh) 2014-03-19
KR20100062893A (ko) 2010-06-10
KR101632657B1 (ko) 2016-06-23

Similar Documents

Publication Publication Date Title
ATE542300T1 (de) Zeit-digital-wandler und vollständig digitaler phasenregelkreis
US8890738B2 (en) Time-to-digital converter and conversion method
JP2011023804A5 (ja) 位相同期ループ回路
ATE553532T1 (de) Digitaler phasendetektor für einen phasenregelkreis
WO2010033436A3 (en) Techniques for generating fractional clock signals
WO2010032184A3 (en) Signal processing using timing comparison
WO2010117739A3 (en) Time-to-digital converter (tdc) with improved resolution
AR068602A1 (es) Aparatos y metodos para el control de la frecuencia en un sintetizador de frecuencia de multiples salidas
DE602008001895D1 (de) Mehrphasentaktsystem
ATE536662T1 (de) Phasenregelkreis mit selbstkorrigierender übertragungsfunktion von phase-zu-digital
WO2009124145A3 (en) Fractional and integer pll architectures
TW200703337A (en) Duty cycle correction device
KR101212625B1 (ko) 시간-디지털 컨버터 및 그것의 동작 방법
BRPI0409107A (pt) loop travado por fase digital
ATE504114T1 (de) Schaltungsanordnung, insbesondere phasenregelkreis, sowie entsprechendes verfahren
SE0301005D0 (sv) Method and system of jitter compensation
WO2012117295A3 (en) Methods and devices for implementing all-digital phase locked loop
JP2015527013A5 (de)
TW200705820A (en) Phase locked loop having cycle slip detector capable of compensating for errors caused by cycle slips
TW200625821A (en) Oscillator circuit and semiconductor device having oscillator circuit
JP2010273187A5 (ja) Ｐｌｌ回路
JP2012114736A5 (de)
ATE470936T1 (de) Digitaler datenpuffer
JP2012109845A (ja) 周波数シンセサイザおよび時間デジタル変換器
TW200709572A (en) Clock loop circuit with community counters and method thereof